Merge from master

Changes

@@ -14,6 +14,8 @@ The contributors that suggested a given feature are shown in []. Thanks!
 
 ****  Fix internals to avoid 'using namespace std'.
 
+***   Renamed --profile-cfuncs to --prof-cfuncs.
+
 ****  Report interface ports connected to wrong interface, bug1294. [Todd Strader]
 
 ****  When tracing, use scalars on single bit arrays to appease vcddiff.
@@ -2204,7 +2206,7 @@ Bug fixes:
 
 * Verilator 3.501 2005/11/16 Stable
 
-***  Add --profile-cfuncs for correlating profiles back to Verilog.
+***  Add --prof-cfuncs for correlating profiles back to Verilog.
 
 **** Fixed functions where regs are declared before inputs.  [Danny Ding]
 

bin/verilator

@@ -337,7 +337,7 @@ detailed descriptions in L</"VERILATION ARGUMENTS"> for more information.
     --pins-uint8                Specify types for top level ports
     --pipe-filter <command>     Filter all input through a script
     --prefix <topname>          Name of top level class
-    --profile-cfuncs            Name functions for profiling
+    --prof-cfuncs               Name functions for profiling
     --private                   Debugging; see docs
     --public                    Debugging; see docs
      -pvalue+<name>=<value>     Overwrite toplevel parameter
@@ -1070,7 +1070,7 @@ Specifies the name of the top level class and makefile.  Defaults to V
 prepended to the name of the --top-module switch, or V prepended to the
 first Verilog filename passed on the command line.
 
-=item --profile-cfuncs
+=item --prof-cfuncs
 
 Modify the created C++ functions to support profiling.  The functions will
 be minimized to contain one "basic" statement, generally a single always
@@ -1688,7 +1688,7 @@ code with -DVL_INLINE_OPT=inline. This will inline functions, however this
 requires that all cpp files be compiled in a single compiler run.
 
 You may uncover further tuning possibilities by profiling the Verilog code.
-Use Verilator's --profile-cfuncs, then GCC's -g -pg.  You can then run
+Use Verilator's --prof-cfuncs, then GCC's -g -pg.  You can then run
 either oprofile or gprof to see where in the C++ code the time is spent.
 Run the gprof output through verilator_profcfunc and it will tell you what
 Verilog line numbers on which most of the time is being spent.
@@ -3760,7 +3760,7 @@ For example:
 will toggle forever and thus the executable will give the didn't converge
 error to prevent an infinite loop.
 
-To debug this, run Verilator with --profile-cfuncs.  Run make on the
+To debug this, run Verilator with --prof-cfuncs.  Run make on the
 generated files with "OPT=-DVL_DEBUG". Then call Verilated::debug(1) in
 your main.cpp.
 

bin/verilator_profcfunc

@@ -199,11 +199,11 @@ __END__
 
 =head1 NAME
 
-verilator_profcfunc - Read gprof report created with --profile-cfuncs
+verilator_profcfunc - Read gprof report created with --prof-cfuncs
 
 =head1 SYNOPSIS
 
-  verilator --profile-cfuncs ....
+  verilator --prof-cfuncs ....
   gcc --ggdb -pg ....
   {run executable}
   gprof
@@ -213,7 +213,7 @@ verilator_profcfunc - Read gprof report created with --profile-cfuncs
 
 Verilator_profcfunc reads a profile report created by gprof.  The names of
 the functions are then transformed, assuming the user used verilator's
---profile-cfuncs, and a report printed showing the percentage of time, etc,
+--prof-cfuncs, and a report printed showing the percentage of time, etc,
 in each Verilog block.
 
 =head1 ARGUMENTS

src/V3Options.cpp

@@ -676,7 +676,8 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc, char
 	    else if ( onoff   (sw, "-pins-sc-biguint", flag/*ref*/) ){ m_pinsScBigUint = flag; m_pinsBv = 513; }
 	    else if ( onoff   (sw, "-pins-uint8", flag/*ref*/) ){ m_pinsUint8 = flag; }
 	    else if ( !strcmp (sw, "-private") )		{ m_public = false; }
-	    else if ( onoff   (sw, "-profile-cfuncs", flag/*ref*/) )	{ m_profileCFuncs = flag; }
+            else if ( onoff   (sw, "-prof-cfuncs", flag/*ref*/) )       { m_profCFuncs = flag; }
+            else if ( onoff   (sw, "-profile-cfuncs", flag/*ref*/) )    { m_profCFuncs = flag; }  // Undocumented, for backward compat
 	    else if ( onoff   (sw, "-public", flag/*ref*/) )		{ m_public = flag; }
             else if ( !strncmp(sw, "-pvalue+", strlen("-pvalue+")))	{ addParameter(string(sw+strlen("-pvalue+")), false); }
             else if ( onoff   (sw, "-relative-cfuncs", flag/*ref*/) )   { m_relativeCFuncs = flag; }
@@ -1234,7 +1235,7 @@ V3Options::V3Options() {
     m_pinsScUint = false;
     m_pinsScBigUint = false;
     m_pinsUint8 = false;
-    m_profileCFuncs = false;
+    m_profCFuncs = false;
     m_preprocOnly = false;
     m_preprocNoLine = false;
     m_public = false;

src/V3Options.h

@@ -86,7 +86,7 @@ class V3Options {
     bool	m_pinsScUint;   // main switch: --pins-sc-uint
     bool	m_pinsScBigUint;// main switch: --pins-sc-biguint
     bool	m_pinsUint8;	// main switch: --pins-uint8
-    bool	m_profileCFuncs;// main switch: --profile-cfuncs
+    bool        m_profCFuncs;   // main switch: --prof-cfuncs
     bool	m_public;	// main switch: --public
     bool	m_relativeCFuncs; // main switch: --relative-cfuncs
     bool	m_relativeIncludes; // main switch: --relative-includes
@@ -244,7 +244,7 @@ class V3Options {
     bool pinsScUint() const { return m_pinsScUint; }
     bool pinsScBigUint() const { return m_pinsScBigUint; }
     bool pinsUint8() const { return m_pinsUint8; }
-    bool profileCFuncs() const { return m_profileCFuncs; }
+    bool profCFuncs() const { return m_profCFuncs; }
     bool allPublic() const { return m_public; }
     bool lintOnly() const { return m_lintOnly; }
     bool ignc() const { return m_ignc; }

src/V3Order.cpp

@@ -536,7 +536,7 @@ private:
 			  : (domainp->hasSettle() ? "_settle"
 			     : (domainp->isMulti() ? "_multiclk" : "_sequent"))));
 	name = name+"__"+scopep->nameDotless()+"__"+cvtToStr(funcnum);
-	if (v3Global.opt.profileCFuncs()) {
+        if (v3Global.opt.profCFuncs()) {
 	    name += "__PROF__"+forWhatp->fileline()->profileFuncname();
 	}
 	return name;
@@ -1513,7 +1513,7 @@ void OrderVisitor::processMoveOne(OrderMoveVertex* vertexp, OrderMoveDomScope* d
     }
     else {  // Normal logic
 	// Make or borrow a CFunc to contain the new statements
-	if (v3Global.opt.profileCFuncs()
+        if (v3Global.opt.profCFuncs()
 	    || (v3Global.opt.outputSplitCFuncs()
 		&& v3Global.opt.outputSplitCFuncs() < m_pomNewStmts)) {
 	    // Put every statement into a unique function to ease profiling or reduce function size

test_regress/t/t_case_huge_prof.pl

@@ -12,7 +12,7 @@ scenarios(vlt_all => 1);
 top_filename("t/t_case_huge.v");
 
 compile(
-    verilator_flags2 => ["--stats --profile-cfuncs -CFLAGS '-pg' -LDFLAGS '-pg'"],
+    verilator_flags2 => ["--stats --prof-cfuncs -CFLAGS '-pg' -LDFLAGS '-pg'"],
     );
 
 file_grep ($Self->{stats}, qr/Optimizations, Tables created\s+(\d+)/i, 10);