Internals: Remove single-statement braces. No functional change.

This commit is contained in:
Wilson Snyder 2025-03-19 22:55:11 -04:00
parent 62afbed3cd
commit c508fd5d24
24 changed files with 39 additions and 37 deletions

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@ -921,7 +921,7 @@ void _vl_vsformat(std::string& output, const std::string& format, va_list ap) VL
const int lbits = va_arg(ap, int);
const std::string* const cstr = va_arg(ap, const std::string*);
std::ostringstream oss;
for (unsigned char c : *cstr) { oss << std::hex << static_cast<int>(c); }
for (unsigned char c : *cstr) oss << std::hex << static_cast<int>(c);
std::string hex_str = oss.str();
if (width > 0 && widthSet) {
hex_str = hex_str.size() > width

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@ -157,7 +157,7 @@ void VlExecutionProfiler::dump(const char* filenamep, uint64_t tickEnd)
VL_DEBUG_IF(VL_DBG_MSGF("+prof+exec writing to '%s'\n", filenamep););
FILE* const fp = std::fopen(filenamep, "w");
if (VL_UNLIKELY(!fp)) { VL_FATAL_MT(filenamep, 0, "", "+prof+exec+file file not writable"); }
if (VL_UNLIKELY(!fp)) VL_FATAL_MT(filenamep, 0, "", "+prof+exec+file file not writable");
// TODO Perhaps merge with verilated_coverage output format, so can
// have a common merging and reporting tool, etc.

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@ -166,7 +166,7 @@ public:
s << "(Array (_ BitVec " << idxWidths[i] << ") ";
}
s << "(_ BitVec " << width() << ")";
for (int i = 0; i < dimension(); ++i) { s << ")"; }
for (int i = 0; i < dimension(); ++i) s << ")";
}
} else {
VL_FATAL_MT(__FILE__, __LINE__, "randomize", "indexed_name not found in m_arr_vars");

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@ -340,7 +340,7 @@ void VerilatedSaif::finalizeSaifFileContents() {
void VerilatedSaif::recursivelyPrintScopes(const VerilatedSaifActivityScope& scope) {
openInstanceScope(scope.name());
printScopeActivities(scope);
for (const auto& childScope : scope.childScopes()) { recursivelyPrintScopes(*childScope); }
for (const auto& childScope : scope.childScopes()) recursivelyPrintScopes(*childScope);
closeInstanceScope();
}

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@ -421,7 +421,7 @@ public:
const char* fullname() const override {
static thread_local std::string t_out;
t_out = std::string{scopep()->name()} + "." + name();
for (auto idx : index()) { t_out += "[" + std::to_string(idx) + "]"; }
for (auto idx : index()) t_out += "[" + std::to_string(idx) + "]";
return t_out.c_str();
}
void* prevDatap() const { return m_prevDatap; }

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@ -228,7 +228,7 @@ string AstNode::vpiName(const string& namein) {
// we change that identifier to an escaped identifier, wrapping it with '\' and ' '
// as specified in LRM 23.6
string name = namein;
if (0 == namein.substr(0, 7).compare("__SYM__")) { name = namein.substr(7); }
if (0 == namein.substr(0, 7).compare("__SYM__")) name = namein.substr(7);
string pretty;
pretty.reserve(name.length());
bool inEscapedIdent = false;

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@ -377,7 +377,7 @@ void V3Begin::debeginAll(AstNetlist* nodep) {
{
BeginState state;
{ BeginVisitor{nodep, &state}; }
if (state.anyFuncInBegin()) { BeginRelinkVisitor{nodep, &state}; }
if (state.anyFuncInBegin()) BeginRelinkVisitor{nodep, &state};
} // Destruct before checking
V3Global::dumpCheckGlobalTree("begin", 0, dumpTreeEitherLevel() >= 3);
}

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@ -40,7 +40,7 @@ class ExprCoverageEligibleVisitor final : public VNVisitor {
bool m_eligible = true;
void visit(AstNode* nodep) override {
if (!nodep->isExprCoverageEligible()) { m_eligible = false; }
if (!nodep->isExprCoverageEligible()) m_eligible = false;
iterateChildren(nodep);
}
@ -928,11 +928,11 @@ class CoverageVisitor final : public VNVisitor {
UINFO(9, "unsupported: " << why << " " << nodep << endl);
bool wasSeeking = m_seeking == SEEKING;
Objective oldSeeking = m_seeking;
if (wasSeeking) { abortExprCoverage(); }
if (wasSeeking) abortExprCoverage();
m_seeking = ABORTED;
iterateChildren(nodep);
lineTrack(nodep);
if (!wasSeeking) { m_seeking = oldSeeking; }
if (!wasSeeking) m_seeking = oldSeeking;
}
public:

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@ -115,7 +115,7 @@ class V3EmitMkJsonEmitter final {
Printer& putList(const std::string& name, const T& list) {
if (list.empty()) return *this;
begin(name, '[');
for (auto it = list.begin(); it != list.end(); ++it) { put(*it); }
for (auto it = list.begin(); it != list.end(); ++it) put(*it);
return end();
}
@ -181,7 +181,9 @@ class V3EmitMkJsonEmitter final {
const std::string verilatorRoot
= V3Os::filenameSlashPath(V3Os::filenameRealPath(V3Options::getenvVERILATOR_ROOT()));
global.emplace_back(verilatorRoot + "/include/verilated.cpp");
if (v3Global.dpi()) { global.emplace_back(verilatorRoot + "/include/verilated_dpi.cpp"); }
if (v3Global.dpi()) { //
global.emplace_back(verilatorRoot + "/include/verilated_dpi.cpp");
}
if (v3Global.opt.vpi()) {
global.emplace_back(verilatorRoot + "/include/verilated_vpi.cpp");
}
@ -264,7 +266,7 @@ class V3EmitMkJsonEmitter final {
}
const string vFile = hblockp->vFileIfNecessary();
if (!vFile.empty()) { sources.emplace_back(vFile); }
if (!vFile.empty()) sources.emplace_back(vFile);
const V3StringList& vFiles = v3Global.opt.vFiles();
for (const string& i : vFiles)

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@ -487,5 +487,5 @@ string V3HierBlockPlan::topCommandArgsFilename(bool forCMake) {
}
void V3HierBlockPlan::writeParametersFiles() const {
for (const auto& block : *this) { block.second->writeParametersFile(); }
for (const auto& block : *this) block.second->writeParametersFile();
}

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@ -237,7 +237,7 @@ class LinkCellsVisitor final : public VNVisitor {
if (modp) {
if (VN_IS(modp, Iface)) {
// Track module depths, so can sort list from parent down to children
if (!nodep->isVirtual()) { newEdge(vertex(m_modp), vertex(modp), 1, false); }
if (!nodep->isVirtual()) newEdge(vertex(m_modp), vertex(modp), 1, false);
if (!nodep->cellp()) nodep->ifacep(VN_AS(modp, Iface));
} else if (VN_IS(modp, NotFoundModule)) { // Will error out later
} else {

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@ -1614,7 +1614,7 @@ class LinkDotFindVisitor final : public VNVisitor {
}
} else {
VSymEnt* const impp = srcp->findIdFlat(nodep->name());
if (!impp) { nodep->v3error("Import object not found: " << nodep->prettyPkgNameQ()); }
if (!impp) nodep->v3error("Import object not found: " << nodep->prettyPkgNameQ());
}
m_curSymp->importFromPackage(m_statep->symsp(), srcp, nodep->name());
UINFO(9, " Link Done: " << nodep << endl);

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@ -1049,7 +1049,7 @@ string V3Options::argString(int argc, char** argv) {
void V3Options::parseOpts(FileLine* fl, int argc, char** argv) VL_MT_DISABLED {
// Save command line options
for (int i = 0; i < argc; ++i) { addLineArg(argv[i]); }
for (int i = 0; i < argc; ++i) addLineArg(argv[i]);
// Parse all options
// Initial entry point from Verilator.cpp

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@ -509,7 +509,7 @@ class ParamProcessor final {
checkSupportedParam(modp, pinp);
if (const AstVar* const varp = pinp->modVarp()) {
if (!pinp->exprp()) continue;
if (varp->isGParam()) { pins.emplace(varp->name(), pinp->exprp()); }
if (varp->isGParam()) pins.emplace(varp->name(), pinp->exprp());
} else if (VN_IS(pinp->exprp(), BasicDType) || VN_IS(pinp->exprp(), NodeDType)) {
pins.emplace(pinp->name(), pinp->exprp());
}
@ -1255,7 +1255,7 @@ class ParamVisitor final : public VNVisitor {
break;
}
if (const AstVar* const varp = VN_CAST(backp, Var)) {
if (!varp->isIfaceRef()) { continue; }
if (!varp->isIfaceRef()) continue;
const AstIfaceRefDType* ifacerefp = nullptr;
if (const AstNodeDType* const typep = varp->childDTypep()) {
ifacerefp = VN_CAST(typep, IfaceRefDType);
@ -1272,7 +1272,7 @@ class ParamVisitor final : public VNVisitor {
}
}
}
if (!ifacerefp) { continue; }
if (!ifacerefp) continue;
// Interfaces passed in on the port map have ifaces
if (const AstIface* const ifacep = ifacerefp->ifacep()) {
if (dotted == backp->name()) {

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@ -529,7 +529,7 @@ int V3ParseImp::tokenPipelineId(int token) {
const int nexttok = nexttokp->token;
UINFO(9, "tokenPipelineId tok=" << yylval.token << endl);
UASSERT(yylval.token == yaID__LEX, "Start with ID");
if (nexttok == yP_COLONCOLON) { return yaID__CC; }
if (nexttok == yP_COLONCOLON) return yaID__CC;
VL_RESTORER(yylval); // Remember value, as about to read ahead
if (m_tokenLastBison.token != '@' && m_tokenLastBison.token != '#'
&& m_tokenLastBison.token != '.') {

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@ -1024,7 +1024,7 @@ class CaptureVisitor final : public VNVisitor {
AstVar* getVar(AstVar* const varp) const {
const auto it = m_varCloneMap.find(varp);
if (it == m_varCloneMap.end()) { return nullptr; }
if (it == m_varCloneMap.end()) return nullptr;
return it->second;
}

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@ -129,7 +129,7 @@ int main(int argc, char** argv) {
VerilatedVpi::callCbs(cbReadOnlySynch);
#if VM_TRACE
if (traceOn) { tfp->dump(contextp->time()); }
if (traceOn) tfp->dump(contextp->time());
#endif
// cocotb controls the clock inputs using cbAfterDelay so
// skip ahead to the next registered callback
@ -165,7 +165,7 @@ int main(int argc, char** argv) {
top->final();
#if VM_TRACE
if (traceOn) { tfp->close(); }
if (traceOn) tfp->close();
#endif
// VM_COVERAGE is a define which is set if Verilator is

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@ -30,7 +30,7 @@ int sc_main(int argc, char* argv[]) {
tb->final();
VL_DO_DANGLING(delete tb, tb);
if (pass) { VL_PRINTF("*-* All Finished *-*\n"); }
if (pass) VL_PRINTF("*-* All Finished *-*\n");
return 0;
}

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@ -66,7 +66,7 @@ int main(int argc, char** argv, char**) {
// Loop back if verilog is driving
// Verilator will not do this for itself
// We must implement the top-level resolution
if (topp->sub_io__en) { topp->sub_io = topp->sub_io__out; }
if (topp->sub_io__en) topp->sub_io = topp->sub_io__out;
if (topp->bidir_single_bit_io__en) {
topp->bidir_single_bit_io = topp->bidir_single_bit_io__out;
}
@ -158,7 +158,7 @@ int main(int argc, char** argv, char**) {
// Invert the input side
topp->bidir_single_bit_io = (~topp->bidir_single_bit_io) & 0x1;
topp->bidir_bus_64_io = ~topp->bidir_bus_64_io;
for (int i = 0; i < 4; i++) { topp->bidir_bus_128_io[i] = ~topp->bidir_bus_128_io[i]; }
for (int i = 0; i < 4; i++) topp->bidir_bus_128_io[i] = ~topp->bidir_bus_128_io[i];
} // if (loop_done)
if (errors != 0) break;
}

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@ -26,7 +26,7 @@ void compareWls(int obits, WDataInP const lwp, WDataInP const rwp) {
bool same = true;
for (int i = 0; (i < (words - 1)); ++i) {
if (lwp[i] != rwp[i]) { same = false; }
if (lwp[i] != rwp[i]) same = false;
}
if ((lwp[words - 1] & VL_MASK_E(obits)) != (rwp[words - 1] & VL_MASK_E(obits))) {
same = false;

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@ -131,10 +131,10 @@ void modDump(TestVpiHandle& it, int n) {
if (type == vpiParameter || type == vpiConstType) {
printf(" vpiConstType=%s", strFromVpiConstType(vpi_get(vpiConstType, hndl)));
}
if (type == vpiModule) { printf(" vpiDefName=%s", vpi_get_str(vpiDefName, hndl)); }
if (type == vpiModule) printf(" vpiDefName=%s", vpi_get_str(vpiDefName, hndl));
printf("\n");
if (iterate_over.find(type) == iterate_over.end()) { continue; }
if (iterate_over.find(type) == iterate_over.end()) continue;
for (int type : iterate_over.at(type)) {
TestVpiHandle subIt = vpi_iterate(type, hndl);
if (subIt) {

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@ -75,7 +75,7 @@ static const char* cb_reason_to_string(int cb_name) {
bool cb_time_is_delay(int cb_name) {
// For some callbacks, time is interpreted as a delay from current time
// instead of an absolute time
if (cb_name == cbReadOnlySynch || cb_name == cbReadWriteSynch) { return true; }
if (cb_name == cbReadOnlySynch || cb_name == cbReadWriteSynch) return true;
return false;
}
@ -137,7 +137,7 @@ static PLI_INT32 TheCallback(s_cb_data* data) {
cb_data.cb_rtn = AtEndOfSimTimeCallback;
} else {
next_time = stats->exp_times[stats->count];
if (cb_time_is_delay(data->reason)) { next_time -= t.low; }
if (cb_time_is_delay(data->reason)) next_time -= t.low;
cb_data.reason = data->reason;
cb_data.cb_rtn = TheCallback;
}
@ -228,14 +228,14 @@ static int EndOfSimulationCallback(p_cb_data cb_data) {
CHECK_RESULT(CallbackStats[cbAtEndOfSimTime].count, 8);
CHECK_RESULT(CallbackStats[cbEndOfSimulation].count, 1);
if (!got_error) { printf("*-* All Finished *-*\n"); }
if (!got_error) printf("*-* All Finished *-*\n");
return 0;
}
// cver entry
static void VPIRegister(void) {
// Clear stats
for (int cb = 1; cb <= cbAtEndOfSimTime; cb++) { CallbackStats[cb].count = 0; }
for (int cb = 1; cb <= cbAtEndOfSimTime; cb++) CallbackStats[cb].count = 0;
CallbackStats[cbStartOfSimulation].exp_times = new PLI_UINT32(0);
CallbackStats[cbEndOfSimulation].exp_times = new PLI_UINT32(22);
s_cb_data cb_data;

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@ -153,7 +153,7 @@ static int register_cb(const int next_state) {
}
void reset_expected() {
for (int idx = 0; idx < CB_COUNT; idx++) { callbacks_expected_called[idx] = false; }
for (int idx = 0; idx < CB_COUNT; idx++) callbacks_expected_called[idx] = false;
}
void cb_will_be_called(const int cb) {
@ -291,7 +291,7 @@ static int register_test_callback(p_cb_data data) {
#ifdef IS_VPI
static int end_of_sim_cb(p_cb_data cb_data) {
if (!got_error) { fprintf(stdout, "*-* All Finished *-*\n"); }
if (!got_error) fprintf(stdout, "*-* All Finished *-*\n");
return 0;
}

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@ -59,7 +59,7 @@ int main(int argc, char** argv) {
topp->reset = 1;
topp->is_parent = 0;
for (int i = 0; i < 5; i++) { single_cycle(topp); }
for (int i = 0; i < 5; i++) single_cycle(topp);
topp->reset = 0;
while (!contextp->gotFinish()) {