Fix matching language extension options including dots.

This commit is contained in:
Wilson Snyder 2025-01-05 22:52:29 -05:00
parent 76b2ac9cc1
commit dcaf6476e8
4 changed files with 41 additions and 2 deletions

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@ -21,6 +21,7 @@ Verilator 5.033 devel
* Fix pattern assignment to real inside struct (#5713).
* Fix %p format output for real inside struct (#5713).
* Fix segfault when only enum value referenced in package (#5714). [Dan Katz]
* Fix matching language extension options including dots.
Verilator 5.032 2025-01-01

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@ -99,8 +99,10 @@ public:
}
void addLangExt(const string& langext, const V3LangCode& lc) {
// New language extension replaces any pre-existing one.
(void)m_langExts.erase(langext);
m_langExts[langext] = lc;
string addext = langext;
if (addext[0] == '.') addext = addext.substr(1);
(void)m_langExts.erase(addext);
m_langExts[addext] = lc;
}
void addLibExtV(const string& libext) {

18
test_regress/t/t_langext_1d.py Executable file
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@ -0,0 +1,18 @@
#!/usr/bin/env python3
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2024 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
import vltest_bootstrap
test.scenarios('simulator')
test.top_filename = "t/t_langext_1.v"
# This is a compile only test.
test.compile(v_flags2=["+verilog2001ext+.v"])
test.passes()

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@ -0,0 +1,18 @@
#!/usr/bin/env python3
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2024 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
import vltest_bootstrap
test.scenarios('linter')
test.top_filename = "t/t_langext_1.v"
# This is a lint only test.
test.lint(v_flags2=["+verilog1995ext+.v"], fails=True)
test.passes()