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Change error messages to more often suggest documentation

This commit is contained in:
Wilson Snyder 2025-04-05 17:10:28 -04:00
parent eccfd8c6f9
commit e9fe8f65a8
419 changed files with 530 additions and 62 deletions
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74
src/V3Error.cpp
View File

@ -72,7 +72,7 @@ string V3ErrorGuarded::msgPrefix() VL_REQUIRES(m_mutex) {
return "-Info: ";
} else if (code == V3ErrorCode::EC_FATAL) {
return "%Error: ";
} else if (code == V3ErrorCode::EC_FATALEXIT) {
} else if (code == V3ErrorCode::EC_FATALMANY) {
return "%Error: ";
} else if (code == V3ErrorCode::EC_FATALSRC) {
return "%Error: Internal Error: ";
@ -162,7 +162,7 @@ void V3ErrorGuarded::v3errorEnd(std::ostringstream& sstr, const string& extra)
// Output
if (
#ifndef V3ERROR_NO_GLOBAL_
!(v3Global.opt.quietExit() && m_errorCode == V3ErrorCode::EC_FATALEXIT)
!(v3Global.opt.quietExit() && m_errorCode == V3ErrorCode::EC_FATALMANY)
#else
true
#endif
@ -172,54 +172,54 @@ void V3ErrorGuarded::v3errorEnd(std::ostringstream& sstr, const string& extra)
if (!m_errorSuppressed
&& !(m_errorCode == V3ErrorCode::EC_INFO || m_errorCode == V3ErrorCode::USERINFO)) {
const bool anError = isError(m_errorCode, m_errorSuppressed);
if (m_errorCode >= V3ErrorCode::EC_FIRST_NAMED && !m_describedWeb) {
m_describedWeb = true;
std::cerr << warnMore() << "... For " << (anError ? "error" : "warning")
<< " description see https://verilator.org/warn/" << m_errorCode.ascii()
<< "?v=" << PACKAGE_VERSION_NUMBER_STRING << endl;
}
if (!m_describedEachWarn[m_errorCode] && !m_pretendError[m_errorCode]) {
if (m_errorCode != V3ErrorCode::EC_FATALMANY // Not verbose on final too-many-errors error
&& !m_describedEachWarn[m_errorCode]) {
m_describedEachWarn[m_errorCode] = true;
if (!m_errorCode.hardError() && !m_describedWarnings) {
m_describedWarnings = true;
const string docUrl = "https://verilator.org/verilator_doc.html"s
+ "?v=" + PACKAGE_VERSION_NUMBER_STRING;
const string warnUrl = "https://verilator.org/warn/"s + m_errorCode.ascii()
+ "?v=" + PACKAGE_VERSION_NUMBER_STRING;
if (m_errorCode >= V3ErrorCode::EC_FIRST_NAMED) {
std::cerr << warnMore() << "... For " << (anError ? "error" : "warning")
<< " description see " << warnUrl << endl;
} else if (m_errCount >= 1
&& (m_errorCode == V3ErrorCode::EC_FATAL
|| m_errorCode == V3ErrorCode::EC_FATALMANY
|| m_errorCode == V3ErrorCode::EC_FATALSRC)
&& !m_tellInternal) {
m_tellInternal = true;
std::cerr << warnMore()
<< "... This fatal error may be caused by the earlier error(s);"
" resolve those first."
<< endl;
} else if (!m_tellManual) {
m_tellManual = true;
std::cerr << warnMore() << "... See the manual at " << docUrl
<< " for more assistance." << endl;
}
if (!m_pretendError[m_errorCode] && !m_errorCode.hardError()) {
std::cerr << warnMore() << "... Use \"/* verilator lint_off "
<< m_errorCode.ascii()
<< " */\" and lint_on around source to disable this message." << endl;
}
if (m_errorCode.dangerous()) {
std::cerr << warnMore() << "*** See https://verilator.org/warn/"
<< m_errorCode.ascii() << " before disabling this,\n";
std::cerr << warnMore() << "else you may end up with different sim results."
<< endl;
if (m_errorCode.dangerous()) {
std::cerr << warnMore() << "*** See " << warnUrl
<< " before disabling this,\n";
std::cerr << warnMore() << "else you may end up with different sim results."
<< endl;
}
}
}
if (!msg_additional.empty()) std::cerr << msg_additional;
// If first warning is not the user's fault (internal/unsupported) then give the website
// Not later warnings, as a internal may be caused by an earlier problem
if (tellManual() == 0) {
if (m_errorCode.mentionManual() || sstr.str().find("Unsupported") != string::npos) {
tellManual(1);
} else {
tellManual(2);
}
}
if (anError) {
incErrors();
} else {
incWarnings();
}
if (m_errorCode == V3ErrorCode::EC_FATAL || m_errorCode == V3ErrorCode::EC_FATALEXIT
if (m_errorCode == V3ErrorCode::EC_FATAL || m_errorCode == V3ErrorCode::EC_FATALMANY
|| m_errorCode == V3ErrorCode::EC_FATALSRC) {
static bool inFatal = false;
if (!inFatal) {
inFatal = true;
if (tellManual() == 1) {
std::cerr << warnMore()
<< "... See the manual at https://verilator.org/verilator_doc.html "
"for more assistance."
<< endl;
tellManual(2);
}
#ifndef V3ERROR_NO_GLOBAL_
if (dumpTreeLevel() || dumpTreeJsonLevel() || debug()) {
V3Broken::allowMidvisitorCheck(true);
@ -271,12 +271,12 @@ string V3Error::lineStr(const char* filename, int lineno) VL_PURE {
void V3Error::abortIfWarnings() {
const bool exwarn = warnFatal() && warnCount();
if (errorCount() && exwarn) {
v3fatalExit("Exiting due to " << std::dec << V3Error::s().errorCount() << " error(s), " //
v3fatalMany("Exiting due to " << std::dec << V3Error::s().errorCount() << " error(s), " //
<< V3Error::s().warnCount() << " warning(s)\n");
} else if (errorCount()) {
v3fatalExit("Exiting due to " << std::dec << V3Error::s().errorCount() << " error(s)\n");
v3fatalMany("Exiting due to " << std::dec << V3Error::s().errorCount() << " error(s)\n");
} else if (exwarn) {
v3fatalExit("Exiting due to " << std::dec << V3Error::s().warnCount() << " warning(s)\n");
v3fatalMany("Exiting due to " << std::dec << V3Error::s().warnCount() << " warning(s)\n");
}
}

19
src/V3Error.h
View File

@ -44,7 +44,7 @@ public:
//
EC_INFO, // General information out
EC_FATAL, // Kill the program
EC_FATALEXIT, // Kill the program, suppress with --quiet-exit
EC_FATALMANY, // Kill the program, due to too many errors, suppress with --quiet-exit
EC_FATALSRC, // Kill the program, for internal source errors
EC_ERROR, // General error out, can't suppress
EC_FIRST_NAMED, // Just a code so the program knows where to start info/errors
@ -186,7 +186,7 @@ public:
// clang-format off
static const char* const names[] = {
// Leading spaces indicate it can't be disabled.
" MIN", " INFO", " FATAL", " FATALEXIT", " FATALSRC", " ERROR", " FIRST_NAMED",
" MIN", " INFO", " FATAL", " FATALMANY", " FATALSRC", " ERROR", " FIRST_NAMED",
// Boolean
" I_CELLDEFINE", " I_COVERAGE", " I_DEF_NETTYPE_WIRE", " I_LINT", " I_TIMING", " I_TRACING", " I_UNUSED",
// Errors
@ -313,9 +313,9 @@ public:
private:
static constexpr unsigned MAX_ERRORS = 50; // Fatal after this may errors
bool m_describedWarnings VL_GUARDED_BY(m_mutex) = false; // Told user how to disable warns
// Tell user to see manual, 0=not yet, 1=doit, 2=disable
int m_tellManual VL_GUARDED_BY(m_mutex) = 0;
bool m_tellManual VL_GUARDED_BY(m_mutex) = false;
bool m_tellInternal VL_GUARDED_BY(m_mutex) = false;
V3ErrorCode m_errorCode VL_GUARDED_BY(m_mutex)
= V3ErrorCode::EC_FATAL; // Error string being formed will abort
bool m_errorSuppressed VL_GUARDED_BY(m_mutex)
@ -328,7 +328,6 @@ private:
int m_errCount VL_GUARDED_BY(m_mutex) = 0; // Error count
// Pretend this warning is an error
std::array<bool, V3ErrorCode::_ENUM_MAX> m_pretendError VL_GUARDED_BY(m_mutex);
bool m_describedWeb VL_GUARDED_BY(m_mutex) = false; // Told user to see web
// Told user specifics about this warning
std::array<bool, V3ErrorCode::_ENUM_MAX> m_describedEachWarn VL_GUARDED_BY(m_mutex);
int m_debugDefault = 0; // Option: --debugi Default debugging level
@ -364,7 +363,7 @@ public:
m_errCount++;
if (errorCount() == errorLimit()) { // Not >= as would otherwise recurse
v3errorEnd(
(v3errorPrep(V3ErrorCode::EC_FATALEXIT),
(v3errorPrep(V3ErrorCode::EC_FATALMANY),
(v3errorStr() << "Exiting due to too many errors encountered; --error-limit="
<< errorCount() << std::endl),
v3errorStr()));
@ -393,18 +392,12 @@ public:
int warnCount() VL_REQUIRES(m_mutex) { return m_warnCount; }
bool errorSuppressed() VL_REQUIRES(m_mutex) { return m_errorSuppressed; }
void errorSuppressed(bool flag) VL_REQUIRES(m_mutex) { m_errorSuppressed = flag; }
bool describedWeb() VL_REQUIRES(m_mutex) { return m_describedWeb; }
void describedWeb(bool flag) VL_REQUIRES(m_mutex) { m_describedWeb = flag; }
bool describedEachWarn(V3ErrorCode code) VL_REQUIRES(m_mutex) {
return m_describedEachWarn[code];
}
void describedEachWarn(V3ErrorCode code, bool flag) VL_REQUIRES(m_mutex) {
m_describedEachWarn[code] = flag;
}
bool describedWarnings() VL_REQUIRES(m_mutex) { return m_describedWarnings; }
void describedWarnings(bool flag) VL_REQUIRES(m_mutex) { m_describedWarnings = flag; }
int tellManual() VL_REQUIRES(m_mutex) { return m_tellManual; }
void tellManual(int level) VL_REQUIRES(m_mutex) { m_tellManual = level; }
void suppressThisWarning() VL_REQUIRES(m_mutex);
string warnContextNone() VL_REQUIRES(m_mutex) {
errorContexted(true);
@ -567,7 +560,7 @@ void v3errorEndFatal(std::ostringstream& sstr)
#define v3error(msg) v3warnCode(V3ErrorCode::EC_ERROR, msg)
#define v3fatal(msg) v3warnCodeFatal(V3ErrorCode::EC_FATAL, msg)
// Fatal exit; used instead of fatal() if message gets suppressed with --quiet-exit
#define v3fatalExit(msg) v3warnCodeFatal(V3ErrorCode::EC_FATALEXIT, msg)
#define v3fatalMany(msg) v3warnCodeFatal(V3ErrorCode::EC_FATALMANY, msg)
// Fatal exit; used instead of fatal() to mention the source code line
#define v3fatalSrc(msg) \
v3errorEndFatal(v3errorBuildMessage( \

1
test_regress/t/t_array_backw_index_bad.out
View File

@ -2,6 +2,7 @@
: ... note: In instance 't'
17 | array_assign[1:3] = '{32'd4, 32'd3, 32'd2};
| ^
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_array_backw_index_bad.v:18:20: Slice selection '[3:1]' has reversed range order versus data type's '[0:3]'
: ... note: In instance 't'
18 | larray_assign[3:1] = '{32'd4, 32'd3, 32'd2};

1
test_regress/t/t_array_list_bad.out
View File

@ -2,6 +2,7 @@
: ... note: In instance 't'
38 | test_out <= '{'0, '0};
| ^~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Warning-WIDTHEXPAND: t/t_array_list_bad.v:38:22: Operator ASSIGNDLY expects 3 bits on the Assign RHS, but Assign RHS's CONCAT generates 2 bits.
: ... note: In instance 't'
38 | test_out <= '{'0, '0};

1
test_regress/t/t_array_method_bad.out
View File

@ -2,4 +2,5 @@
: ... note: In instance 't'
11 | q.mex;
| ^~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_array_method_map.out
View File

@ -7,4 +7,5 @@
: ... note: In instance 't'
17 | res = a.map(el) with (el == 200);
| ^~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_array_method_unsup.out
View File

@ -2,6 +2,7 @@
: ... note: In instance 't'
23 | i = q.sum with (item + 1); do if ((i) !== (32'h11)) begin $write("%%Error: %s:%0d: got='h%x exp='h%x\n", "t/t_array_method_unsup.v",23, (i), (32'h11)); $stop; end while(0);;
| ^~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_array_method_unsup.v:24:21: 'with' not legal on this method
: ... note: In instance 't'
24 | i = q.product with (item + 1); do if ((i) !== (32'h168)) begin $write("%%Error: %s:%0d: got='h%x exp='h%x\n", "t/t_array_method_unsup.v",24, (i), (32'h168)); $stop; end while(0);;

1
test_regress/t/t_array_pattern_bad.out
View File

@ -2,4 +2,5 @@
: ... note: In instance 't'
24 | valids: '1};
| ^~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_array_pattern_bad2.out
View File

@ -2,4 +2,5 @@
: ... note: In instance 't'
22 | myinfo = '{default: '0,
| ^~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_array_pattern_bad3.out
View File

@ -2,6 +2,7 @@
: ... note: In instance 't'
20 | 1: '1};
| ^
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_array_pattern_bad3.v:21:13: Assignment pattern with too many elements
: ... note: In instance 't'
21 | arr = '{'0, '1, '0, '1};

4
test_regress/t/t_assert_comp_bad.out
View File

@ -24,6 +24,8 @@
: ... note: In instance 't'
15 | $error;
| ^~~~~~
... For warning description see https://verilator.org/warn/USERERROR?v=latest
... Use "/* verilator lint_off USERERROR */" and lint_on around source to disable this message.
%Warning-USERERROR: t/t_assert_comp_bad.v:16:7: User elaboration-time error
: ... note: In instance 't'
16 | $error("User elaboration-time error");
@ -32,6 +34,8 @@
: ... note: In instance 't'
17 | $fatal(0, "User elaboration-time fatal");
| ^~~~~~
... For warning description see https://verilator.org/warn/USERFATAL?v=latest
... Use "/* verilator lint_off USERFATAL */" and lint_on around source to disable this message.
%Warning-USERFATAL: t/t_assert_comp_bad.v:18:7: Elaboration system task message (IEEE 1800-2023 20.11)
: ... note: In instance 't'
18 | $fatal;

1
test_regress/t/t_assert_ctl_unsup.out
View File

@ -31,6 +31,7 @@
%Error: t/t_assert_ctl_unsup.v:38:7: Bad assertcontrol control_type (IEEE 1800-2023 Table 20-5)
38 | $assertcontrol(0);
| ^~~~~~~~~~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_assert_ctl_unsup.v:39:7: Bad assertcontrol control_type (IEEE 1800-2023 Table 20-5)
39 | $assertcontrol(100);
| ^~~~~~~~~~~~~~

1
test_regress/t/t_assert_disable_bad.out
View File

@ -2,4 +2,5 @@
: ... note: In instance 't'
27 | assert property (disable iff (val == 0) check(1, 1));
| ^~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_assert_dup_bad.out
View File

@ -4,4 +4,5 @@
t/t_assert_dup_bad.v:15:4: ... Location of original declaration
15 | covlabel:
| ^~~~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_assert_imm_nz_bad.out
View File

@ -1,4 +1,5 @@
%Error: t/t_assert_imm_nz_bad.v:13:26: Deferred assertions must use '#0' (IEEE 1800-2023 16.4)
13 | labeled_imas: assert #1 (clk);
| ^
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_assert_procedural_clk_bad.out
View File

@ -2,6 +2,7 @@
: ... note: In instance 't'
21 | assume property (@(posedge clk) cyc == 9);
| ^~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_assert_procedural_clk_bad.v:22:13: Unsupported: Procedural concurrent assertion with clocking event inside always (IEEE 1800-2023 16.14.6)
: ... note: In instance 't'
22 | assume property (@(negedge clk) cyc == 9);

3
test_regress/t/t_assert_property_var_unsup.out
View File

@ -5,10 +5,11 @@
%Error: t/t_assert_property_var_unsup.v:18:7: syntax error, unexpected '(', expecting endproperty
18 | (valid, prevcyc = cyc) |=> (cyc == prevcyc + 1);
| ^
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error-UNSUPPORTED: t/t_assert_property_var_unsup.v:24:31: Unsupported: property variable default value
24 | property with_def(int nine = 9);
| ^
%Error: Internal Error: t/t_assert_property_var_unsup.v:7:8: ../V3ParseSym.h:#: Symbols suggest ending PROPERTY 'prop' but parser thinks ending MODULE 't'
7 | module t (
| ^
... See the manual at https://verilator.org/verilator_doc.html for more assistance.
... This fatal error may be caused by the earlier error(s); resolve those first.

1
test_regress/t/t_assoc_method_bad.out
View File

@ -2,6 +2,7 @@
: ... note: In instance 't'
14 | v = a.num("badarg");
| ^~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_assoc_method_bad.v:15:13: The 1 arguments passed to .size method does not match its requiring 0 arguments
: ... note: In instance 't'
15 | v = a.size("badarg");

1
test_regress/t/t_assoc_nokey_bad.out
View File

@ -2,6 +2,7 @@
: ... note: In instance 't'
12 | int dict[string] = '{1, 2};
| ^
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_assoc_nokey_bad.v:12:31: Missing pattern key (need an expression then a ':')
: ... note: In instance 't'
12 | int dict[string] = '{1, 2};

1
test_regress/t/t_assoc_wildcard_bad.out
View File

@ -2,6 +2,7 @@
: ... note: In instance 't'
23 | v = a.num("badarg");
| ^~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_assoc_wildcard_bad.v:24:13: The 1 arguments passed to .size method does not match its requiring 0 arguments
: ... note: In instance 't'
24 | v = a.size("badarg");

1
test_regress/t/t_bigmem_bad.out
View File

@ -2,6 +2,7 @@
: ... note: In instance 't_bigmem'
14 | if (wen) mem[addr] <= data;
| ^
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Warning-WIDTHTRUNC: t/t_bigmem_bad.v:14:26: Operator ASSIGNDLY expects 1 bits on the Assign RHS, but Assign RHS's VARREF 'data' generates 256 bits.
: ... note: In instance 't_bigmem'
14 | if (wen) mem[addr] <= data;

1
test_regress/t/t_bitsel_const_bad.out
View File

@ -2,4 +2,5 @@
: ... note: In instance 't'
16 | assign a = b[0];
| ^
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_bitsel_wire_array_bad.out
View File

@ -2,4 +2,5 @@
: ... note: In instance 't'
16 | assign b = a[0];
| ^
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_case_default_bad.out
View File

@ -1,4 +1,5 @@
%Error: t/t_case_default_bad.v:16:9: Multiple default statements in case statement.
16 | default: $stop;
| ^~~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_case_genx_bad.out
View File

@ -2,4 +2,5 @@
: ... note: In instance 't'
14 | 32'b1xxx: initial begin end
| ^~~~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_case_inside_bad.out
View File

@ -1,4 +1,5 @@
%Error: t/t_case_inside_bad.v:9:20: Illegal to have inside on a casex/casez
9 | casex (1'bx) inside
| ^~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

2
test_regress/t/t_case_x_bad.out
View File

@ -6,4 +6,6 @@
%Warning-CASEWITHX: t/t_case_x_bad.v:19:9: Use of x/? constant in case statement, (perhaps intended casex/casez)
19 | 4'b1xxx: $stop;
| ^~~~~~~
... For warning description see https://verilator.org/warn/CASEWITHX?v=latest
... Use "/* verilator lint_off CASEWITHX */" and lint_on around source to disable this message.
%Error: Exiting due to

1
test_regress/t/t_cast_class_incompat_bad.out
View File

@ -3,6 +3,7 @@
: ... Suggest dynamic $cast
26 | cls_ab = BaseExtended'(cls_a);
| ^
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_cast_class_incompat_bad.v:27:20: Incompatible types to static cast to 'class{}Other' from 'class{}BaseExtended'
: ... note: In instance 't'
27 | other = Other'(cls_ab);

1
test_regress/t/t_cast_size_bad.out
View File

@ -2,6 +2,7 @@
: ... note: In instance 't'
14 | b = (-1)'(a);
| ^
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Warning-WIDTHEXPAND: t/t_cast_size_bad.v:14:9: Operator ASSIGN expects 4 bits on the Assign RHS, but Assign RHS's SEL generates 1 bits.
: ... note: In instance 't'
14 | b = (-1)'(a);

1
test_regress/t/t_class_assign_bad.out
View File

@ -2,6 +2,7 @@
: ... note: In instance 't'
28 | c = 0;
| ^
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_class_assign_bad.v:29:9: Assign RHS expects a CLASSREFDTYPE 'Cls', got BASICDTYPE 'logic'
: ... note: In instance 't'
29 | c = 1;

1
test_regress/t/t_class_assign_cond_bad.out
View File

@ -2,6 +2,7 @@
: ... note: In instance 't'
22 | c1 = (c1 != null) ? c1 : c2;
| ^
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_class_assign_cond_bad.v:23:10: Assign RHS expects a CLASSREFDTYPE 'Cls1', got CLASSREFDTYPE 'Cls2'
: ... note: In instance 't'
23 | c1 = (c1 != null) ? c2 : c2;

1
test_regress/t/t_class_builtin_bad.out
View File

@ -2,6 +2,7 @@
: ... note: In instance 't'
8 | function int rand_mode(bit onoff);
| ^~~~~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_class_builtin_bad.v:11:17: The 'constraint_mode' method is built-in and cannot be overridden (IEEE 1800-2023 18.9)
: ... note: In instance 't'
11 | function int constraint_mode(bit onoff);

1
test_regress/t/t_class_copy_bad.out
View File

@ -2,4 +2,5 @@
: ... note: In instance 't'
19 | c1 = new co;
| ^~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_class_extends_aliased_real_bad.out
View File

@ -2,4 +2,5 @@
: ... note: In instance 't'
14 | bar #(real_t) bar_real_t;
| ^~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_class_extends_bad.out
View File

@ -1,4 +1,5 @@
%Error: t/t_class_extends_bad.v:13:26: Multiple inheritance illegal on non-interface classes (IEEE 1800-2023 8.13)
13 | class Cls extends Base1, Base2;
| ^~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_class_extends_int_param_bad.out
View File

@ -2,4 +2,5 @@
: ... note: In instance 't'
9 | class Bar #(type T=int) extends T;
| ^~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_class_extends_nf_bad.out
View File

@ -2,6 +2,7 @@
: ... Suggested alternative: 'IsFound'
15 | class Cls extends IsNotFound;
| ^~~~~~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_class_extends_nf_bad.v:18:25: Class for 'extends' not found: 'NotFound2'
: ... Suggested alternative: 'otFound2'
18 | class Cls2 extends Pkg::NotFound2;

1
test_regress/t/t_class_extends_rec_bad.out
View File

@ -1,4 +1,5 @@
%Error: t/t_class_extends_rec_bad.v:7:31: Attempting to extend class 'RecursiveExtCls' from itself
7 | class RecursiveExtCls extends RecursiveExtCls;
| ^~~~~~~~~~~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_class_extern_bad.out
View File

@ -4,6 +4,7 @@
t/t_class_extern_bad.v:8:16: ... Location of original declaration
8 | extern task nodef();
| ^~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_class_extern_bad.v:8:16: Definition not found for extern 'nodef'
8 | extern task nodef();
| ^~~~~

1
test_regress/t/t_class_func_nvoid_bad.out
View File

@ -2,6 +2,7 @@
: ... note: In instance 't'
47 | if (mod_fv() == 10) $stop;
| ^~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_class_func_nvoid_bad.v:50:11: Cannot call a task/void-function as a function: 'mod_t'
: ... note: In instance 't'
50 | if (mod_t() == 10) $stop;

1
test_regress/t/t_class_member_bad.out
View File

@ -3,6 +3,7 @@
: ... Suggested alternative: 'memb2'
18 | c.memb3 = 3;
| ^~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Warning-WIDTHTRUNC: t/t_class_member_bad.v:18:15: Operator ASSIGN expects 1 bits on the Assign RHS, but Assign RHS's CONST '?32?sh3' generates 32 or 2 bits.
: ... note: In instance 't'
18 | c.memb3 = 3;

1
test_regress/t/t_class_member_bad2.out
View File

@ -4,6 +4,7 @@
t/t_class_member_bad2.v:8:8: ... Location of original declaration
8 | int vardup;
| ^~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_class_member_bad2.v:12:9: Duplicate declaration of task: 'memdup'
12 | task memdup;
| ^~~~~~

1
test_regress/t/t_class_member_var_virt_bad.out
View File

@ -1,4 +1,5 @@
%Error: t/t_class_member_var_virt_bad.v:8:16: Syntax error: 'virtual' not allowed before var declaration
8 | virtual int member;
| ^~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_class_method_bad.out
View File

@ -3,4 +3,5 @@
: ... Suggested alternative: 'meth2'
18 | c.meth3();
| ^~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_class_mispure_bad.out
View File

@ -4,4 +4,5 @@
t/t_class_mispure_bad.v:8:31: ... Location of interface class's function
8 | pure virtual function void pvfunc();
| ^~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_class_misstatic_bad.out
View File

@ -2,6 +2,7 @@
: ... note: In instance 't'
31 | nonstatic();
| ^~~~~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_class_misstatic_bad.v:38:12: Cannot call non-static member function 'nonstatic' without object (IEEE 1800-2023 8.10)
: ... note: In instance 't'
38 | Cls::nonstatic();

1
test_regress/t/t_class_mod_bad.out
View File

@ -1,6 +1,7 @@
%Error: t/t_class_mod_bad.v:21:7: Package/class for ':: reference' not found: 'M'
21 | M::Cls p;
| ^
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_class_mod_bad.v:21:7: Package/class for 'class/package reference' not found: 'M'
21 | M::Cls p;
| ^

2
test_regress/t/t_class_new_bad.out
View File

@ -2,6 +2,7 @@
: ... note: In instance 't'
31 | c1 = new(3);
| ^
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_class_new_bad.v:32:16: Too many arguments in function call to FUNC 'new'
: ... note: In instance 't'
32 | c2 = new(3);
@ -18,3 +19,4 @@
: ... note: In instance 't'
34 | c1 = new[2];
| ^~~
... This fatal error may be caused by the earlier error(s); resolve those first.

1
test_regress/t/t_class_new_ref_bad.out
View File

@ -2,6 +2,7 @@
: ... note: In instance 't'
16 | txn_type_t txn = new;
| ^~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_class_new_ref_bad.v:17:25: new() cannot copy from non-class data type 'int'
: ... note: In instance 't'
17 | txn_type_t copy = new txn;

1
test_regress/t/t_class_new_scoped.out
View File

@ -1,6 +1,7 @@
%Error: t/t_class_new_scoped.v:45:21: syntax error, unexpected new, expecting IDENTIFIER-for-type
45 | b = ClsNoArg::new;
| ^~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_class_new_scoped.v:50:19: syntax error, unexpected new-then-paren, expecting IDENTIFIER-for-type
50 | b = ClsArg::new(20, 1);
| ^~~

1
test_regress/t/t_class_override_bad.out
View File

@ -2,6 +2,7 @@
: ... note: In instance 't'
22 | function :extends int get_e; return 1; endfunction
| ^~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_class_override_bad.v:24:33: Member 'get_ef' marked ':extends' but no base class function is being extend (IEEE 1800-2023 8.20)
: ... note: In instance 't'
24 | function :extends :final int get_ef; return 1; endfunction

1
test_regress/t/t_class_param_bad2.out
View File

@ -2,6 +2,7 @@
: ... note: In instance 't'
12 | Cls c;
| ^~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_class_param_bad2.v:7:18: Parameter type without default value is never given value (IEEE 1800-2023 6.20.1): 'PARAMB'
: ... note: In instance 't'
7 | class Cls #(type PARAMB);

1
test_regress/t/t_class_param_bad_paren.out
View File

@ -2,4 +2,5 @@
: ... Suggest use 'Cls#()'
28 | if (Cls::OTHER != 12) $stop;
| ^~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

2
test_regress/t/t_class_param_circ_bad.out
View File

@ -2,4 +2,6 @@
: ... note: In instance 't'
14 | ClsA #(PARAM+1) a;
| ^~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Internal Error: ../V3Param.cpp:#: should find just-made module
... This fatal error may be caused by the earlier error(s); resolve those first.

1
test_regress/t/t_class_param_comma_bad.out
View File

@ -1,6 +1,7 @@
%Error: t/t_class_param_comma_bad.v:16:22: syntax error, unexpected ')', expecting IDENTIFIER-for-type
16 | Cls #(.PARAMB(14),) ce;
| ^
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_class_param_comma_bad.v:17:13: syntax error, unexpected ')', expecting IDENTIFIER-for-type
17 | Cls #(14,) cf;
| ^

1
test_regress/t/t_class_param_enum_bad.out
View File

@ -2,6 +2,7 @@
: ... note: In instance 't'
20 | Converter#(bit) conv2 = conv1;
| ^~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error-ENUMVALUE: t/t_class_param_enum_bad.v:21:19: Implicit conversion to enum 'enum{}$unit::enum_t' from 'logic[31:0]' (IEEE 1800-2023 6.19.3)
: ... note: In instance 't'
: ... Suggest use enum's mnemonic, or static cast

1
test_regress/t/t_class_param_nconst_bad.out
View File

@ -2,6 +2,7 @@
: ... note: In instance 't'
12 | Cls #(.PARAM($random)) c;
| ^~~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_class_param_nconst_bad.v:12:11: Can't convert defparam value to constant: Param 'PARAM' of 'Cls'
: ... note: In instance 't'
12 | Cls #(.PARAM($random)) c;

1
test_regress/t/t_class_param_nested_bad.out
View File

@ -8,3 +8,4 @@
: ... note: In instance 't'
51 | Wrap2 #(Wrap#(19)::PBASE * 2) w38;
| ^
... This fatal error may be caused by the earlier error(s); resolve those first.

1
test_regress/t/t_class_param_noinit_bad.out
View File

@ -2,6 +2,7 @@
: ... note: In instance 't'
13 | Cls #(1) c;
| ^~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_class_param_noinit_bad.v:13:7: Class parameter type without default value is never given value (IEEE 1800-2023 6.20.1): 'T'
: ... note: In instance 't'
13 | Cls #(1) c;

1
test_regress/t/t_class_param_subtype_bad_paren.out
View File

@ -2,4 +2,5 @@
: ... Suggest use 'CParam#()'
32 | CParam::type_t val_0 = 100;
| ^~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_class_param_virtual_bad.out
View File

@ -2,6 +2,7 @@
: ... note: In instance 't'
13 | t = new;
| ^~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_class_param_virtual_bad.v:23:28: Illegal to call 'new' using an abstract virtual class 'ClsVirt' (IEEE 1800-2023 8.21)
: ... note: In instance 't'
23 | ClsVirt#(VBase) cv = new;

1
test_regress/t/t_class_ref_bad.out
View File

@ -2,4 +2,5 @@
: ... Suggested alternative: 'ClsRight'
15 | s = ClsRigh::m_s;
| ^~~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_class_scope_import.out
View File

@ -1,4 +1,5 @@
%Error: t/t_class_scope_import.v:11:14: Import statement directly within a class scope is illegal
11 | import pkg::*;
| ^~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_class_super_bad.out
View File

@ -1,4 +1,5 @@
%Error: t/t_class_super_bad.v:12:12: 'super' used outside class (IEEE 1800-2023 8.15)
12 | super.addr = 2;
| ^
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_class_super_bad2.out
View File

@ -1,4 +1,5 @@
%Error: t/t_class_super_bad2.v:10:12: 'super' used on non-extended class (IEEE 1800-2023 8.15)
10 | super.i = 1;
| ^
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_class_super_new_bad_nfirst.out
View File

@ -4,4 +4,5 @@
t/t_class_super_new_bad_nfirst.v:17:16: ... Location of earlier statement
17 | imemberc = 10;
| ^
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_class_unsup_bad.out
View File

@ -1,6 +1,7 @@
%Error: t/t_class_unsup_bad.v:24:21: Syntax error: 'static'/'virtual'/'rand'/'randc' not allowed before typedef declaration
24 | rand typedef int irand_t;
| ^~~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_class_unsup_bad.v:25:22: Syntax error: 'static'/'virtual'/'rand'/'randc' not allowed before typedef declaration
25 | randc typedef int icrand_t;
| ^~~~~~~~

1
test_regress/t/t_class_uses_this_bad.out
View File

@ -1,4 +1,5 @@
%Error: t/t_class_uses_this_bad.v:11:12: 'this' used outside class (IEEE 1800-2023 8.11)
11 | this.addr = 2;
| ^
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_class_virtual_bad.out
View File

@ -2,4 +2,5 @@
: ... note: In instance 't'
12 | VBase b = new;
| ^~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_class_virtual_pure_bad.out
View File

@ -1,4 +1,5 @@
%Error: t/t_class_virtual_pure_bad.v:8:22: Illegal to have 'pure virtual' in non-virtual class (IEEE 1800-2023 8.21)
8 | pure virtual task pure_task;
| ^~~~~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_clocking_bad1.out
View File

@ -2,4 +2,5 @@
: ... note: In instance 't'
16 | default clocking @(posedge clk);
| ^~~~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_clocking_bad2.out
View File

@ -1,6 +1,7 @@
%Error: t/t_clocking_bad2.v:15:32: 1step not allowed as output skew
15 | default input #1 output #1step;
| ^
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_clocking_bad2.v:16:23: Multiple default input skews not allowed
16 | default input #2 output #2;
| ^

1
test_regress/t/t_clocking_bad3.out
View File

@ -1,6 +1,7 @@
%Error: t/t_clocking_bad3.v:14:14: Corresponding variable 'in' does not exist
14 | input in;
| ^~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_clocking_bad3.v:15:15: Corresponding variable 'out' does not exist
15 | output out;
| ^~~

1
test_regress/t/t_clocking_bad4.out
View File

@ -2,6 +2,7 @@
: ... note: In instance 't'
23 | input #cyc in;
| ^~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_clocking_bad4.v:24:16: Skew cannot be negative
: ... note: In instance 't'
24 | input #(-1) out;

1
test_regress/t/t_clocking_bad5.out
View File

@ -4,6 +4,7 @@
t/t_clocking_bad5.v:26:20: ... Location of original declaration
26 | global clocking ck @(posedge clk); endclocking
| ^~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_clocking_bad5.v:32:20: Duplicate declaration of CLOCKING 'ogck': '$global_clock'
32 | global clocking ck @(posedge clk); endclocking
| ^~

1
test_regress/t/t_concat_link_bad.out
View File

@ -4,6 +4,7 @@
t/t_concat_link_bad.v:13:34: ... Resolving this reference
13 | assign bar_s = {foo_s, foo_s}.f1;
| ^
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_concat_link_bad.v:13:26: Syntax error: Not expecting CONCAT under a REPLICATE in dotted expression
13 | assign bar_s = {foo_s, foo_s}.f1;
| ^

1
test_regress/t/t_const_dec_mixed_bad.out
View File

@ -1,4 +1,5 @@
%Error: t/t_const_dec_mixed_bad.v:9:30: Mixing X/Z/? with digits not legal in decimal constant: x_1
9 | parameter [200:0] MIXED = 32'dx_1;
| ^~~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_const_number_bad.out
View File

@ -1,6 +1,7 @@
%Error: t/t_const_number_bad.v:9:29: Number is missing value digits: 32'd
9 | parameter integer FOO2 = 32'd-6;
| ^~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_const_number_bad.v:10:29: Number is missing value digits: 32'd
10 | parameter integer FOO3 = 32'd;
| ^~~~

1
test_regress/t/t_const_overflow_bad.out
View File

@ -1,6 +1,7 @@
%Error: t/t_const_overflow_bad.v:9:34: Too many digits for 94 bit number: '94'd123456789012345678901234567890'
9 | parameter [200:0] TOO_SMALL = 94'd123456789012345678901234567890;
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_const_overflow_bad.v:11:31: Too many digits for 8 bit number: '8'habc'
11 | parameter [200:0] SMALLH = 8'habc;
| ^~~~~~

1
test_regress/t/t_constraint_assoc_arr_bad.out
View File

@ -6,6 +6,7 @@
%Error: t/t_constraint_assoc_arr_bad.v:30:26: Illegal non-integral expression or subexpression in random constraint. (IEEE 1800-2023 18.3)
30 | constraint c1 { data[cl] > 0;}
| ^~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_constraint_assoc_arr_bad.v:44:44: Illegal non-integral expression or subexpression in random constraint. (IEEE 1800-2023 18.3)
44 | constraint c2 { foreach (data[i]) data[i] < 100; }
| ^

1
test_regress/t/t_constraint_before_randc_bad.out
View File

@ -4,4 +4,5 @@
t/t_constraint_before_randc_bad.v:11:29: ... Location of restricting expression
11 | constraint raint2_bad { solve b1 before b2; }
| ^~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_constraint_dist_randc_bad.out
View File

@ -4,4 +4,5 @@
t/t_constraint_dist_randc_bad.v:10:26: ... Location of restricting expression
10 | constraint c_bad { rc dist {3 := 0, 10 := 5}; }
| ^~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_constraint_extern_bad.out
View File

@ -1,6 +1,7 @@
%Error: t/t_constraint_extern_bad.v:8:22: Definition not found for extern 'missing_bad'
8 | extern constraint missing_bad;
| ^~~~~~~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_constraint_extern_bad.v:11:20: extern not found that declares 'missing_extern'
11 | constraint Packet::missing_extern { }
| ^~~~~~~~~~~~~~

1
test_regress/t/t_constraint_method_bad.out
View File

@ -2,4 +2,5 @@
: ... note: In instance 't'
13 | cons.bad_method(1);
| ^~~~~~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_constraint_mode_bad.out
View File

@ -2,6 +2,7 @@
: ... note: In instance 't'
21 | p.m_one.constraint_mode(0);
| ^~~~~~~~~~~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_constraint_mode_bad.v:22:45: Cannot call 'constraint_mode()' as a function on a variable
: ... note: In instance 't'
22 | $display("p.constraint_mode()=%0d", p.constraint_mode());

1
test_regress/t/t_constraint_pure_missing_bad.out
View File

@ -4,4 +4,5 @@
t/t_constraint_pure_missing_bad.v:8:21: ... Location of interface class's pure constraint
8 | pure constraint raint;
| ^~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_constraint_pure_nonabs_bad.out
View File

@ -2,4 +2,5 @@
: ... note: In instance 't'
8 | pure constraint raintBad;
| ^~~~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_constraint_soft_randc_bad.out
View File

@ -4,4 +4,5 @@
t/t_constraint_soft_randc_bad.v:10:23: ... Location of restricting expression
10 | constraint c_bad { soft rc > 4; }
| ^~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

2
test_regress/t/t_debug_width.out
View File

@ -1,4 +1,4 @@
%Error: Internal Error: t/t_opt_const.v:12:8: ../V3Ast.cpp:#: widthMismatch detected 'lhsp()->widthMin() != rhsp()->widthMin()' @ ../V3AstNodes.cpp:#OUT:(G/wu32/1) LHS:(G/w32) RHS:(G/wu32/1)
12 | module t(
| ^
... See the manual at https://verilator.org/verilator_doc.html for more assistance.
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.

2
test_regress/t/t_define_override.out
View File

@ -4,6 +4,8 @@
... Use "/* verilator lint_off REDEFMACRO */" and lint_on around source to disable this message.
%Warning-DEFOVERRIDE: t/t_define_override.v:9:23: Overriding define: 'TEST_MACRO' with value: '10' to existing command line define value: '50'
... Location of previous definition, with value: '50'
... For warning description see https://verilator.org/warn/DEFOVERRIDE?v=latest
... Use "/* verilator lint_off DEFOVERRIDE */" and lint_on around source to disable this message.
%Warning-DEFOVERRIDE: t/t_define_override.v:10:24: Overriding define: 'TEST_MACRO' with value: '100' to existing command line define value: '50'
... Location of previous definition, with value: '50'
%Error: Exiting due to

6
test_regress/t/t_delay_stmtdly_bad.out
View File

@ -28,10 +28,14 @@
: ... note: In instance 't'
52 | #100 $finish;
| ^
... For warning description see https://verilator.org/warn/STMTDLY?v=latest
... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.
%Warning-UNUSEDSIGNAL: t/t_delay.v:21:16: Signal is not used: 'dly4'
: ... note: In instance 't'
21 | wire [31:0] dly4;
| ^~~~
... For warning description see https://verilator.org/warn/UNUSEDSIGNAL?v=latest
... Use "/* verilator lint_off UNUSEDSIGNAL */" and lint_on around source to disable this message.
%Warning-UNUSEDSIGNAL: t/t_delay.v:24:12: Signal is not used: 'dly_s'
: ... note: In instance 't'
24 | dly_s_t dly_s;
@ -44,4 +48,6 @@
: ... Suggest using delayed assignment '<='
45 | dly_s.dly = 55;
| ^
... For warning description see https://verilator.org/warn/BLKSEQ?v=latest
... Use "/* verilator lint_off BLKSEQ */" and lint_on around source to disable this message.
%Error: Exiting due to

1
test_regress/t/t_disable_iff_multi_bad.out
View File

@ -2,4 +2,5 @@
: ... note: In instance 't'
14 | default disable iff (!rstn);
| ^~~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_display_bad.out
View File

@ -1,6 +1,7 @@
%Error: t/t_display_bad.v:11:7: Missing arguments for $display-like format
11 | $display("%x");
| ^~~~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_display_bad.v:13:7: Unknown $display-like format code: '%q'
13 | $display("%q");
| ^~~~~~~~

1
test_regress/t/t_display_esc_bad.out
View File

@ -1,4 +1,5 @@
%Error: t/t_display_esc_bad.v:9:16: Unknown escape sequence: \x
9 | $display("\x\y\z");
| ^~~~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_display_type_bad.out
View File

@ -3,6 +3,7 @@
: ... Suggest use '%s'
10 | $display("%d %x %f %t", s, s, s, s);
| ^
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_display_type_bad.v:10:34: $display-line format of '%x' illegal with string argument
: ... note: In instance 't'
: ... Suggest use '%s'

1
test_regress/t/t_dpi_2exp_bad.out
View File

@ -1,4 +1,5 @@
%Error: t/t_dpi_2exp_bad.v:12:45: Function was already DPI Exported, duplicate not allowed: 'dpix_twice'
12 | export "DPI-C" dpix_t_int_renamed = task dpix_twice;
| ^~~~~~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

3
test_regress/t/t_dpi_2exparg_bad.out
View File

@ -8,6 +8,8 @@
: ... note: In instance 't.a'
12 | task dpix_twice(input int i, output [2:0] o); o = ~i; endtask
| ^
... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest
... Use "/* verilator lint_off WIDTHTRUNC */" and lint_on around source to disable this message.
%Error: t/t_dpi_2exparg_bad.v:19:9: Duplicate declaration of DPI function with different signature: 'dpix_twice'
19 | task dpix_twice(input int i, output [63:0] o); o = ~i; endtask
| ^~~~~~~~~~
@ -15,4 +17,5 @@
t/t_dpi_2exparg_bad.v:12:9: ... Original signature: void dpix_twice (int, svLogicVecVal* /* logic[2:0] */ )
12 | task dpix_twice(input int i, output [2:0] o); o = ~i; endtask
| ^~~~~~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_dpi_dup_bad.out
View File

@ -5,4 +5,5 @@
t/t_dpi_dup_bad.v:12:47: ... Original signature: int dpii_fa_bit (int)
12 | import "DPI-C" dpii_fa_bit = function int oth_f_int1(input int i);
| ^~~~~~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_dpi_export_bad.out
View File

@ -1,4 +1,5 @@
%Error: t/t_dpi_export_bad.v:10:24: Can't find definition of exported task/function: 'dpix_bad_missing'
10 | export "DPI-C" task dpix_bad_missing;
| ^~~~~~~~~~~~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

1
test_regress/t/t_dpi_import_mix_bad.out
View File

@ -1,4 +1,5 @@
%Error: t/t_dpi_import_mix_bad.v:11:32: Cannot mix DPI import, DPI export, class methods, and/or public on same function: 't.foo'
11 | import "DPI-C" function int foo (int i);
| ^~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: Exiting due to

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