Removed --trace-lxt2, use --trace-fst instead.
This commit is contained in:
Wilson Snyder
parent
ede7236945
commit
f0cdae129e
2
Changes
2
Changes
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@ -5,6 +5,8 @@ The contributors that suggested a given feature are shown in []. Thanks!
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* Verilator 4.009 devel
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*** Removed --trace-lxt2, use --trace-fst instead.
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**** For --xml, add additional var information, bug1372. [Jonathan Kimmitt]
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@ -81,7 +81,7 @@ instead.)
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To use Verilator you will need the C<perl>, C<make> (or C<gmake>), and
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C<g++> (or C<clang>) packages.
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To use Verilator LXT2 or FST tracing you will need the C<gtkwave> and C<libgz> (on
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To use Verilator FST tracing you will need the C<gtkwave> and C<libgz> (on
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Ubuntu C<zlibc> C<zlib1g> C<zlib1g-dev>) packages installed.
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To compile Verilator in addition to the above you need the C<flex>,
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@ -361,7 +361,6 @@ detailed descriptions in L</"VERILATION ARGUMENTS"> for more information.
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--top-module <topname> Name of top level input module
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--trace Enable waveform creation
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--trace-fst Enable FST waveform creation
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--trace-lxt2 Enable LXT2 waveform creation
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--trace-depth <levels> Depth of tracing
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--trace-max-array <depth> Maximum bit width for tracing
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--trace-max-width <width> Maximum array depth for tracing
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@ -1269,7 +1268,7 @@ designs with only one top.
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=item --trace
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Adds waveform tracing code to the model using VCD format. This overrides
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C<--trace-fst> and C<--trace-lxt2>.
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C<--trace-fst>.
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Verilator will generate additional {prefix}__Trace*.cpp files that will
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need to be compiled. In addition verilated_vcd_sc.cpp (for SystemC traces)
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@ -1283,13 +1282,7 @@ even when waveforms are not turned on during model execution.
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=item --trace-fst
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Enable FST waveform tracing in the model. This overrides C<--trace> and C<--trace-lxt2>.
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=item --trace-lxt2
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Enable LXT2 waveform tracing in the model. This overrides C<--trace> and
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C<--trace-fst>. This option is deprecated in favor of FST traces and may
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be removed in the near future.
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Enable FST waveform tracing in the model. This overrides C<--trace>.
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=item --trace-depth I<levels>
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@ -4225,29 +4218,12 @@ but such requirement could be rare.
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The FST library from GTKWave does not currently support SystemC; use VCD
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format instead.
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=item How do I generate LXT2 waveforms (traces) in C++?
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LXT2 a format by GTKWave, which is usually 10x smaller than VCD format.
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This version provides a basic LXT2 support.
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To dump LXT2 format, add the --trace switch to Verilator and change the include path in the testbench to:
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#include "verilated_lxt2_c.h"
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VerilatedLxt2C* tfp = new VerilatedLxt2C;
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Note that currently supporting both LXT2 and VCD in a single simulation is impossible,
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but such requirement could be rare.
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=item How do I generate LXT2 waveforms (traces) in SystemC?
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The LXT2 library from GTKWave does not currently support SystemC; use VCD
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format instead.
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=item How do I view waveforms (traces)?
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Verilator makes standard VCD (Value Change Dump), LXT2 and FST files. VCD files are viewable
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Verilator makes standard VCD (Value Change Dump) and FST files. VCD files are viewable
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with the public domain GTKWave (recommended) or Dinotrace (legacy)
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programs, or any of the many commercial offerings;
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LXT2 and FST are supported by GTKWave only.
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FST is supported by GTKWave only.
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=item How do I reduce the size of large waveform (trace) files?
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File diff suppressed because it is too large
Load Diff
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@ -1,314 +0,0 @@
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/*
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* Copyright (c) 2003-2012 Tony Bybell.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef DEFS_LXTW_H
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#define DEFS_LXTW_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <ctype.h>
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#include <errno.h>
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#include <unistd.h>
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#include <stdint.h>
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#include <zlib.h>
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#ifndef HAVE_FSEEKO
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#define fseeko fseek
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#define ftello ftell
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#endif
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#include "wavealloca.h"
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#define LXT2_WR_HDRID (0x1380)
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#define LXT2_WR_VERSION (0x0001)
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#define LXT2_WR_GRANULE_SIZE (64)
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#define LXT2_WR_GRANULE_NUM (256)
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#define LXT2_WR_PARTIAL_SIZE (2048)
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#define LXT2_WR_GRAN_SECT_TIME 0
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#define LXT2_WR_GRAN_SECT_DICT 1
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#define LXT2_WR_GRAN_SECT_TIME_PARTIAL 2
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#define LXT2_WR_GZWRITE_BUFFER 4096
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#define LXT2_WR_SYMPRIME 500009
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typedef uint64_t lxttime_t;
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typedef int64_t lxtstime_t;
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#ifndef _MSC_VER
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#ifdef __MINGW32__
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#define LXT2_WR_LLD "%I64d"
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#else
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#define LXT2_WR_LLD "%lld"
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#endif
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#define LXT2_WR_LLDESC(x) x##LL
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#define LXT2_WR_ULLDESC(x) x##ULL
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#else
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#define LXT2_WR_LLD "%I64d"
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#define LXT2_WR_LLDESC(x) x##i64
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#define LXT2_WR_ULLDESC(x) x##i64
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#endif
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#if LXT2_WR_GRANULE_SIZE > 32
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typedef unsigned long long granmsk_t;
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#define LXT2_WR_GRAN_0VAL (LXT2_WR_ULLDESC(0))
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#define LXT2_WR_GRAN_1VAL (LXT2_WR_ULLDESC(1))
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#else
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typedef unsigned int granmsk_t;
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#define LXT2_WR_GRAN_0VAL (0)
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#define LXT2_WR_GRAN_1VAL (1)
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#endif
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enum LXT2_WR_Encodings {
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LXT2_WR_ENC_0,
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LXT2_WR_ENC_1,
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LXT2_WR_ENC_INV,
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LXT2_WR_ENC_LSH0,
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LXT2_WR_ENC_LSH1,
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LXT2_WR_ENC_RSH0,
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LXT2_WR_ENC_RSH1,
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LXT2_WR_ENC_ADD1,
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LXT2_WR_ENC_ADD2,
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LXT2_WR_ENC_ADD3,
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LXT2_WR_ENC_ADD4,
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LXT2_WR_ENC_SUB1,
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LXT2_WR_ENC_SUB2,
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LXT2_WR_ENC_SUB3,
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LXT2_WR_ENC_SUB4,
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LXT2_WR_ENC_X,
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LXT2_WR_ENC_Z,
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LXT2_WR_ENC_BLACKOUT,
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LXT2_WR_DICT_START
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};
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/*
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* integer splay
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*/
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typedef struct lxt2_wr_ds_tree_node lxt2_wr_ds_Tree;
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struct lxt2_wr_ds_tree_node {
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lxt2_wr_ds_Tree * left, * right;
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granmsk_t item;
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int val;
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lxt2_wr_ds_Tree * next;
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};
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/*
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* string splay
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*/
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typedef struct lxt2_wr_dslxt_tree_node lxt2_wr_dslxt_Tree;
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struct lxt2_wr_dslxt_tree_node {
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lxt2_wr_dslxt_Tree * left, * right;
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char *item;
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unsigned int val;
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lxt2_wr_dslxt_Tree * next;
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};
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struct lxt2_wr_trace
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{
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FILE *handle;
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gzFile zhandle;
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lxt2_wr_dslxt_Tree *dict; /* dictionary manipulation */
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unsigned int num_dict_entries;
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unsigned int dict_string_mem_required;
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lxt2_wr_dslxt_Tree *dict_head;
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lxt2_wr_dslxt_Tree *dict_curr;
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lxt2_wr_ds_Tree *mapdict; /* bitmap compression */
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unsigned int num_map_entries;
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lxt2_wr_ds_Tree *mapdict_head;
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lxt2_wr_ds_Tree *mapdict_curr;
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off_t position;
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off_t zfacname_predec_size, zfacname_size, zfacgeometry_size;
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off_t zpackcount, zpackcount_cumulative;
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off_t current_chunk, current_chunkz;
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struct lxt2_wr_symbol *sym[LXT2_WR_SYMPRIME];
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struct lxt2_wr_symbol **sorted_facs;
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struct lxt2_wr_symbol *symchain;
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unsigned int numfacs, numalias;
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int numfacbytes;
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int longestname;
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int numsections, numblock;
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off_t facname_offset, facgeometry_offset;
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lxttime_t mintime, maxtime;
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lxtstime_t timezero;
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unsigned int timegranule;
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int timescale;
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unsigned int timepos;
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unsigned int maxgranule;
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lxttime_t firsttime, lasttime;
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lxttime_t timetable[LXT2_WR_GRANULE_SIZE];
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unsigned int partial_iter;
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char *compress_fac_str;
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int compress_fac_len;
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lxttime_t flushtime;
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unsigned flush_valid : 1;
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unsigned do_strip_brackets : 1;
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unsigned emitted : 1; /* gate off change field zmode changes when set */
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unsigned timeset : 1; /* time has been modified from 0..0 */
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unsigned bumptime : 1; /* says that must go to next time position in granule as value change exists for current time */
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unsigned granule_dirty : 1; /* for flushing out final block */
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unsigned blackout : 1; /* blackout on/off */
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unsigned partial : 1; /* partial (vertical) trace support */
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unsigned partial_zip : 1; /* partial (vertical) trace support for zip subregions */
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unsigned no_checkpoint : 1; /* turns off interblock checkpointing */
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unsigned partial_preference : 1; /* partial preference encountered on some facs */
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char initial_value;
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char zmode[4]; /* fills in with "wb0".."wb9" */
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unsigned int gzbufpnt;
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unsigned char gzdest[LXT2_WR_GZWRITE_BUFFER + 4]; /* enough for zlib buffering */
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char *lxtname;
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off_t break_size;
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off_t break_header_size;
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unsigned int break_number;
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};
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struct lxt2_wr_symbol
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{
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struct lxt2_wr_symbol *next;
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struct lxt2_wr_symbol *symchain;
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char *name;
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int namlen;
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int facnum;
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struct lxt2_wr_symbol *aliased_to;
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char *value; /* fac's actual value */
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unsigned int rows;
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int msb, lsb;
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int len;
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int flags;
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unsigned partial_preference : 1; /* in order to shove nets to the first partial group */
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unsigned int chgpos;
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granmsk_t msk; /* must contain LXT2_WR_GRANULE_SIZE bits! */
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unsigned int chg[LXT2_WR_GRANULE_SIZE];
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};
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#define LXT2_WR_SYM_F_BITS (0)
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#define LXT2_WR_SYM_F_INTEGER (1<<0)
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#define LXT2_WR_SYM_F_DOUBLE (1<<1)
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#define LXT2_WR_SYM_F_STRING (1<<2)
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#define LXT2_WR_SYM_F_TIME (LXT2_WR_SYM_F_STRING) /* user must correctly format this as a string */
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#define LXT2_WR_SYM_F_ALIAS (1<<3)
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#define LXT2_WR_SYM_F_SIGNED (1<<4)
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#define LXT2_WR_SYM_F_BOOLEAN (1<<5)
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#define LXT2_WR_SYM_F_NATURAL ((1<<6)|(LXT2_WR_SYM_F_INTEGER))
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#define LXT2_WR_SYM_F_POSITIVE ((1<<7)|(LXT2_WR_SYM_F_INTEGER))
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#define LXT2_WR_SYM_F_CHARACTER (1<<8)
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#define LXT2_WR_SYM_F_CONSTANT (1<<9)
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#define LXT2_WR_SYM_F_VARIABLE (1<<10)
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#define LXT2_WR_SYM_F_SIGNAL (1<<11)
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#define LXT2_WR_SYM_F_IN (1<<12)
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#define LXT2_WR_SYM_F_OUT (1<<13)
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#define LXT2_WR_SYM_F_INOUT (1<<14)
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#define LXT2_WR_SYM_F_WIRE (1<<15)
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#define LXT2_WR_SYM_F_REG (1<<16)
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/* file I/O */
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struct lxt2_wr_trace * lxt2_wr_init(const char *name);
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void lxt2_wr_flush(struct lxt2_wr_trace *lt);
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void lxt2_wr_close(struct lxt2_wr_trace *lt);
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/* for dealing with very large traces, split into multiple files approximately "siz" in length */
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void lxt2_wr_set_break_size(struct lxt2_wr_trace *lt, off_t siz);
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/* 0 = no compression, 9 = best compression, 4 = default */
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void lxt2_wr_set_compression_depth(struct lxt2_wr_trace *lt, unsigned int depth);
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/* default is partial off, turning on makes for faster trace reads, nonzero zipmode causes vertical compression */
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void lxt2_wr_set_partial_off(struct lxt2_wr_trace *lt);
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void lxt2_wr_set_partial_on(struct lxt2_wr_trace *lt, int zipmode);
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void lxt2_wr_set_partial_preference(struct lxt2_wr_trace *lt, const char *name);
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/* turning off checkpointing makes for smaller files */
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void lxt2_wr_set_checkpoint_off(struct lxt2_wr_trace *lt);
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void lxt2_wr_set_checkpoint_on(struct lxt2_wr_trace *lt);
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/* facility creation */
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void lxt2_wr_set_initial_value(struct lxt2_wr_trace *lt, char value);
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struct lxt2_wr_symbol * lxt2_wr_symbol_find(struct lxt2_wr_trace *lt, const char *name);
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struct lxt2_wr_symbol * lxt2_wr_symbol_add(struct lxt2_wr_trace *lt, const char *name, unsigned int rows, int msb, int lsb, int flags);
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struct lxt2_wr_symbol * lxt2_wr_symbol_alias(struct lxt2_wr_trace *lt, const char *existing_name, const char *alias, int msb, int lsb);
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void lxt2_wr_symbol_bracket_stripping(struct lxt2_wr_trace *lt, int doit);
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/* each granule is LXT2_WR_GRANULE_SIZE (32 or 64) timesteps, default is 256 per section */
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void lxt2_wr_set_maxgranule(struct lxt2_wr_trace *lt, unsigned int maxgranule);
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/* time ops */
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void lxt2_wr_set_timescale(struct lxt2_wr_trace *lt, int timescale);
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void lxt2_wr_set_timezero(struct lxt2_wr_trace *lt, lxtstime_t timeval);
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int lxt2_wr_set_time(struct lxt2_wr_trace *lt, unsigned int timeval);
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int lxt2_wr_inc_time_by_delta(struct lxt2_wr_trace *lt, unsigned int timeval);
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int lxt2_wr_set_time64(struct lxt2_wr_trace *lt, lxttime_t timeval);
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int lxt2_wr_inc_time_by_delta64(struct lxt2_wr_trace *lt, lxttime_t timeval);
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/* allows blackout regions in LXT files */
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void lxt2_wr_set_dumpoff(struct lxt2_wr_trace *lt);
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void lxt2_wr_set_dumpon(struct lxt2_wr_trace *lt);
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/* left fill on bit_string uses vcd semantics (left fill with value[0] unless value[0]=='1', then use '0') */
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int lxt2_wr_emit_value_int(struct lxt2_wr_trace *lt, struct lxt2_wr_symbol *s, unsigned int row, int value);
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int lxt2_wr_emit_value_double(struct lxt2_wr_trace *lt, struct lxt2_wr_symbol *s, unsigned int row, double value);
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int lxt2_wr_emit_value_string(struct lxt2_wr_trace *lt, struct lxt2_wr_symbol *s, unsigned int row, char *value);
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int lxt2_wr_emit_value_bit_string(struct lxt2_wr_trace *lt, struct lxt2_wr_symbol *s, unsigned int row, char *value);
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#ifdef __cplusplus
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}
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#endif
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#endif
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@ -78,8 +78,6 @@ class VerilatedVar;
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class VerilatedVarNameMap;
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class VerilatedVcd;
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class VerilatedVcdC;
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class VerilatedLxt2;
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class VerilatedLxt2C;
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class VerilatedFst;
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class VerilatedFstC;
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@ -1,180 +0,0 @@
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// -*- mode: C++; c-file-style: "cc-mode" -*-
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//=============================================================================
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//
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// THIS MODULE IS PUBLICLY LICENSED
|
||||
//
|
||||
// Copyright 2001-2018 by Wilson Snyder. This program is free software;
|
||||
// you can redistribute it and/or modify it under the terms of either the GNU
|
||||
// Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
|
||||
//
|
||||
// This is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
// for more details.
|
||||
//
|
||||
//=============================================================================
|
||||
///
|
||||
/// \file
|
||||
/// \brief C++ Tracing in LXT2 Format
|
||||
///
|
||||
//=============================================================================
|
||||
// SPDIFF_OFF
|
||||
|
||||
#include "verilatedos.h"
|
||||
#include "verilated.h"
|
||||
#include "verilated_lxt2_c.h"
|
||||
|
||||
// Include the GTKWave implementation directly
|
||||
#include "gtkwave/lxt2_write.cpp"
|
||||
|
||||
#include <algorithm>
|
||||
#include <cerrno>
|
||||
#include <ctime>
|
||||
#include <fcntl.h>
|
||||
#include <sstream>
|
||||
#include <sys/stat.h>
|
||||
|
||||
#if defined(_WIN32) && !defined(__MINGW32__) && !defined(__CYGWIN__)
|
||||
# include <io.h>
|
||||
#else
|
||||
# include <unistd.h>
|
||||
#endif
|
||||
|
||||
//=============================================================================
|
||||
|
||||
class VerilatedLxt2CallInfo {
|
||||
protected:
|
||||
friend class VerilatedLxt2;
|
||||
VerilatedLxt2Callback_t m_initcb; ///< Initialization Callback function
|
||||
VerilatedLxt2Callback_t m_fullcb; ///< Full Dumping Callback function
|
||||
VerilatedLxt2Callback_t m_changecb; ///< Incremental Dumping Callback function
|
||||
void* m_userthis; ///< Fake "this" for caller
|
||||
vluint32_t m_code; ///< Starting code number
|
||||
// CONSTRUCTORS
|
||||
VerilatedLxt2CallInfo(VerilatedLxt2Callback_t icb, VerilatedLxt2Callback_t fcb,
|
||||
VerilatedLxt2Callback_t changecb,
|
||||
void* ut, vluint32_t code)
|
||||
: m_initcb(icb), m_fullcb(fcb), m_changecb(changecb), m_userthis(ut), m_code(code) {};
|
||||
~VerilatedLxt2CallInfo() {}
|
||||
};
|
||||
|
||||
//=============================================================================
|
||||
// VerilatedLxt2
|
||||
|
||||
VerilatedLxt2::VerilatedLxt2(lxt2_wr_trace* lxt2)
|
||||
: m_lxt2(lxt2),
|
||||
m_fullDump(true),
|
||||
m_scopeEscape('.') {}
|
||||
|
||||
void VerilatedLxt2::open(const char* filename) VL_MT_UNSAFE {
|
||||
m_assertOne.check();
|
||||
m_lxt2 = lxt2_wr_init(filename);
|
||||
for (vluint32_t ent = 0; ent< m_callbacks.size(); ent++) {
|
||||
VerilatedLxt2CallInfo* cip = m_callbacks[ent];
|
||||
cip->m_code = 1;
|
||||
(cip->m_initcb)(this, cip->m_userthis, cip->m_code);
|
||||
}
|
||||
}
|
||||
|
||||
void VerilatedLxt2::module(const std::string& name) {
|
||||
m_module = name;
|
||||
}
|
||||
|
||||
//=============================================================================
|
||||
// Decl
|
||||
|
||||
void VerilatedLxt2::declSymbol(vluint32_t code, const char* name, int arraynum, int msb, int lsb, int flags) {
|
||||
if (msb == 0 && lsb == 0) {
|
||||
msb = lsb = -1;
|
||||
}
|
||||
std::pair<Code2SymbolType::iterator, bool> p
|
||||
= m_code2symbol.insert(std::make_pair(code, (lxt2_wr_symbol*)(NULL)));
|
||||
std::stringstream name_ss;
|
||||
name_ss <<m_module<<"."<<name;
|
||||
if (arraynum >= 0) {
|
||||
name_ss <<"("<<arraynum<<")";
|
||||
}
|
||||
std::string name_s = name_ss.str();
|
||||
for (std::string::iterator it = name_s.begin(); it != name_s.end(); ++it) {
|
||||
if (isScopeEscape(*it)) {
|
||||
*it = '.';
|
||||
}
|
||||
}
|
||||
if (p.second) { // New
|
||||
p.first->second = lxt2_wr_symbol_add(m_lxt2, name_s.c_str(), 0, msb, lsb, flags);
|
||||
assert(p.first->second);
|
||||
} else { // Alias
|
||||
lxt2_wr_symbol_alias(m_lxt2, p.first->second->name, name_s.c_str(), msb, lsb);
|
||||
}
|
||||
}
|
||||
|
||||
//=============================================================================
|
||||
// Callbacks
|
||||
|
||||
void VerilatedLxt2::addCallback(
|
||||
VerilatedLxt2Callback_t initcb, VerilatedLxt2Callback_t fullcb,
|
||||
VerilatedLxt2Callback_t changecb, void* userthis) VL_MT_UNSAFE_ONE {
|
||||
m_assertOne.check();
|
||||
if (VL_UNLIKELY(isOpen())) {
|
||||
std::string msg = std::string("Internal: ")+__FILE__+"::"+__FUNCTION__+" called with already open file";
|
||||
VL_FATAL_MT(__FILE__,__LINE__,"",msg.c_str());
|
||||
}
|
||||
VerilatedLxt2CallInfo* vci = new VerilatedLxt2CallInfo(initcb, fullcb, changecb, userthis, 1);
|
||||
m_callbacks.push_back(vci);
|
||||
}
|
||||
|
||||
//=============================================================================
|
||||
// Dumping
|
||||
|
||||
void VerilatedLxt2::dump(vluint64_t timeui) {
|
||||
if (!isOpen()) return;
|
||||
if (VL_UNLIKELY(m_fullDump)) {
|
||||
m_fullDump = false; // No need for more full dumps
|
||||
for (vluint32_t ent = 0; ent< m_callbacks.size(); ent++) {
|
||||
VerilatedLxt2CallInfo* cip = m_callbacks[ent];
|
||||
(cip->m_fullcb)(this, cip->m_userthis, cip->m_code);
|
||||
}
|
||||
return;
|
||||
}
|
||||
lxt2_wr_set_time64(m_lxt2, timeui);
|
||||
for (vluint32_t ent = 0; ent< m_callbacks.size(); ++ent) {
|
||||
VerilatedLxt2CallInfo* cip = m_callbacks[ent];
|
||||
(cip->m_changecb)(this, cip->m_userthis, cip->m_code);
|
||||
}
|
||||
}
|
||||
|
||||
//=============================================================================
|
||||
// Helpers
|
||||
|
||||
char* VerilatedLxt2::quad2Str(vluint64_t newval, int bits) {
|
||||
m_valueStrBuffer.resize(bits+1);
|
||||
char* s = m_valueStrBuffer.data();
|
||||
for (int i = 0; i < bits; ++i) {
|
||||
*s = '0' + ((newval>>(bits-i-1))&1);
|
||||
++s;
|
||||
}
|
||||
*s = '\0';
|
||||
return m_valueStrBuffer.data();
|
||||
}
|
||||
|
||||
char* VerilatedLxt2::array2Str(const vluint32_t* newval, int bits) {
|
||||
int bq = bits/32, br = bits%32;
|
||||
m_valueStrBuffer.resize(bits+1);
|
||||
char* s = m_valueStrBuffer.data();
|
||||
for (int w = bq-1; w >= 0; --w) {
|
||||
for (int i = 0; i < 32; ++i) {
|
||||
*s = '0' + ((newval[w]>>(32-i-1))&1);
|
||||
++s;
|
||||
}
|
||||
}
|
||||
for (int i = 0; i < br; ++i) {
|
||||
*s = '0' + ((newval[bq]>>(br-i-1))&1);
|
||||
++s;
|
||||
}
|
||||
*s = '\0';
|
||||
return m_valueStrBuffer.data();
|
||||
}
|
||||
|
||||
//********************************************************************
|
||||
// Local Variables:
|
||||
// End:
|
||||
|
|
@ -1,205 +0,0 @@
|
|||
// -*- mode: C++; c-file-style: "cc-mode" -*-
|
||||
//=============================================================================
|
||||
//
|
||||
// THIS MODULE IS PUBLICLY LICENSED
|
||||
//
|
||||
// Copyright 2001-2018 by Wilson Snyder. This program is free software;
|
||||
// you can redistribute it and/or modify it under the terms of either the GNU
|
||||
// Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
|
||||
//
|
||||
// This is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
// for more details.
|
||||
//
|
||||
//=============================================================================
|
||||
///
|
||||
/// \file
|
||||
/// \brief C++ Tracing in LXT2 Format
|
||||
///
|
||||
//=============================================================================
|
||||
// SPDIFF_OFF
|
||||
|
||||
#ifndef _VERILATED_LXT2_C_H_
|
||||
#define _VERILATED_LXT2_C_H_ 1
|
||||
|
||||
#include "verilatedos.h"
|
||||
#include "verilated.h"
|
||||
|
||||
#include "gtkwave/lxt2_write.h"
|
||||
|
||||
#include <map>
|
||||
#include <string>
|
||||
#include <vector>
|
||||
|
||||
class VerilatedLxt2;
|
||||
class VerilatedLxt2CallInfo;
|
||||
typedef void (*VerilatedLxt2Callback_t)(VerilatedLxt2* vcdp, void* userthis, vluint32_t code);
|
||||
|
||||
//=============================================================================
|
||||
// VerilatedLxt2
|
||||
/// Base class to create a Verilator LXT2 dump
|
||||
/// This is an internally used class - see VerilatedLxt2C for what to call from applications
|
||||
|
||||
class VerilatedLxt2 {
|
||||
typedef std::map<vluint32_t, lxt2_wr_symbol*> Code2SymbolType;
|
||||
typedef std::vector<VerilatedLxt2CallInfo*> CallbackVec;
|
||||
private:
|
||||
lxt2_wr_trace* m_lxt2;
|
||||
VerilatedAssertOneThread m_assertOne; ///< Assert only called from single thread
|
||||
bool m_fullDump;
|
||||
char m_scopeEscape;
|
||||
std::string m_module;
|
||||
CallbackVec m_callbacks; ///< Routines to perform dumping
|
||||
Code2SymbolType m_code2symbol;
|
||||
// CONSTRUCTORS
|
||||
VL_UNCOPYABLE(VerilatedLxt2);
|
||||
void declSymbol(vluint32_t code, const char* name, int arraynum, int msb, int lsb, int flags);
|
||||
// helpers
|
||||
std::vector<char> m_valueStrBuffer;
|
||||
char* quad2Str(vluint64_t newval, int bits);
|
||||
char* array2Str(const vluint32_t *newval, int bits);
|
||||
public:
|
||||
explicit VerilatedLxt2(lxt2_wr_trace* lxt2=NULL);
|
||||
~VerilatedLxt2() { if (m_lxt2 == NULL) { lxt2_wr_close(m_lxt2); } }
|
||||
bool isOpen() const { return m_lxt2 != NULL; }
|
||||
void open(const char* filename) VL_MT_UNSAFE;
|
||||
void flush() VL_MT_UNSAFE { lxt2_wr_flush(m_lxt2); }
|
||||
void close() VL_MT_UNSAFE {
|
||||
m_assertOne.check();
|
||||
lxt2_wr_close(m_lxt2);
|
||||
m_lxt2 = NULL;
|
||||
}
|
||||
// void set_time_unit(const char* unitp); ///< Set time units (s/ms, defaults to ns)
|
||||
// void set_time_unit(const std::string& unit) { set_time_unit(unit.c_str()); }
|
||||
|
||||
// void set_time_resolution(const char* unitp); ///< Set time resolution (s/ms, defaults to ns)
|
||||
// void set_time_resolution(const std::string& unit) { set_time_resolution(unit.c_str()); }
|
||||
|
||||
// double timescaleToDouble(const char* unitp);
|
||||
// std::string doubleToTimescale(double value);
|
||||
|
||||
/// Change character that splits scopes. Note whitespace are ALWAYS escapes.
|
||||
void scopeEscape(char flag) { m_scopeEscape = flag; }
|
||||
/// Is this an escape?
|
||||
bool isScopeEscape(char c) { return isspace(c) || c==m_scopeEscape; }
|
||||
/// Inside dumping routines, called each cycle to make the dump
|
||||
void dump(vluint64_t timeui);
|
||||
/// Inside dumping routines, declare callbacks for tracings
|
||||
void addCallback(VerilatedLxt2Callback_t initcb, VerilatedLxt2Callback_t fullcb,
|
||||
VerilatedLxt2Callback_t changecb,
|
||||
void* userthis) VL_MT_UNSAFE_ONE;
|
||||
|
||||
/// Inside dumping routines, declare a module
|
||||
void module(const std::string& name);
|
||||
/// Inside dumping routines, declare a signal
|
||||
void declBit(vluint32_t code, const char* name, int arraynum) {
|
||||
declSymbol(code, name, arraynum, 0, 0, LXT2_WR_SYM_F_BITS);
|
||||
}
|
||||
void declBus(vluint32_t code, const char* name, int arraynum, int msb, int lsb) {
|
||||
declSymbol(code, name, arraynum, msb, lsb, LXT2_WR_SYM_F_BITS);
|
||||
}
|
||||
void declDouble(vluint32_t code, const char* name, int arraynum) {
|
||||
declSymbol(code, name, arraynum, 63, 0, LXT2_WR_SYM_F_DOUBLE);
|
||||
}
|
||||
void declFloat(vluint32_t code, const char* name, int arraynum) {
|
||||
declSymbol(code, name, arraynum, 63, 0, LXT2_WR_SYM_F_DOUBLE);
|
||||
}
|
||||
void declQuad(vluint32_t code, const char* name, int arraynum, int msb, int lsb) {
|
||||
declSymbol(code, name, arraynum, msb, lsb, LXT2_WR_SYM_F_BITS);
|
||||
}
|
||||
void declArray(vluint32_t code, const char* name, int arraynum, int msb, int lsb) {
|
||||
declSymbol(code, name, arraynum, msb, lsb, LXT2_WR_SYM_F_BITS);
|
||||
}
|
||||
|
||||
/// Inside dumping routines, dump one signal if it has changed
|
||||
void chgBit(vluint32_t code, const vluint32_t newval) {
|
||||
lxt2_wr_emit_value_int(m_lxt2, m_code2symbol[code], 0, newval);
|
||||
}
|
||||
void chgBus(vluint32_t code, const vluint32_t newval, int bits) {
|
||||
lxt2_wr_emit_value_int(m_lxt2, m_code2symbol[code], 0, newval);
|
||||
}
|
||||
void chgDouble(vluint32_t code, const double newval) {
|
||||
lxt2_wr_emit_value_double(m_lxt2, m_code2symbol[code], 0, newval);
|
||||
}
|
||||
void chgFloat(vluint32_t code, const float newval) {
|
||||
lxt2_wr_emit_value_double(m_lxt2, m_code2symbol[code], 0, newval);
|
||||
}
|
||||
void chgQuad(vluint32_t code, const vluint64_t newval, int bits) {
|
||||
lxt2_wr_emit_value_bit_string(m_lxt2, m_code2symbol[code], 0, quad2Str(newval, bits));
|
||||
}
|
||||
void chgArray(vluint32_t code, const vluint32_t* newval, int bits) {
|
||||
lxt2_wr_emit_value_bit_string(m_lxt2, m_code2symbol[code], 0, array2Str(newval, bits));
|
||||
}
|
||||
|
||||
void fullBit(vluint32_t code, const vluint32_t newval) { chgBit(code, newval); }
|
||||
void fullBus(vluint32_t code, const vluint32_t newval, int bits) { chgBus(code, newval, bits); }
|
||||
void fullDouble(vluint32_t code, const double newval) { chgDouble(code, newval); }
|
||||
void fullFloat(vluint32_t code, const float newval) { chgFloat(code, newval); }
|
||||
void fullQuad(vluint32_t code, const vluint64_t newval, int bits) { chgQuad(code, newval, bits); }
|
||||
void fullArray(vluint32_t code, const vluint32_t* newval, int bits) { chgArray(code, newval, bits); }
|
||||
|
||||
void declTriBit(vluint32_t code, const char* name, int arraynum);
|
||||
void declTriBus(vluint32_t code, const char* name, int arraynum, int msb, int lsb);
|
||||
void declTriQuad(vluint32_t code, const char* name, int arraynum, int msb, int lsb);
|
||||
void declTriArray(vluint32_t code, const char* name, int arraynum, int msb, int lsb);
|
||||
void fullTriBit(vluint32_t code, const vluint32_t newval, const vluint32_t newtri);
|
||||
void fullTriBus(vluint32_t code, const vluint32_t newval, const vluint32_t newtri, int bits);
|
||||
void fullTriQuad(vluint32_t code, const vluint64_t newval, const vluint32_t newtri, int bits);
|
||||
void fullTriArray(vluint32_t code, const vluint32_t* newvalp, const vluint32_t* newtrip, int bits);
|
||||
void fullBitX(vluint32_t code);
|
||||
void fullBusX(vluint32_t code, int bits);
|
||||
void fullQuadX(vluint32_t code, int bits);
|
||||
void fullArrayX(vluint32_t code, int bits);
|
||||
void chgTriBit(vluint32_t code, const vluint32_t newval, const vluint32_t newtri);
|
||||
void chgTriBus(vluint32_t code, const vluint32_t newval, const vluint32_t newtri, int bits);
|
||||
void chgTriQuad(vluint32_t code, const vluint64_t newval, const vluint32_t newtri, int bits);
|
||||
void chgTriArray(vluint32_t code, const vluint32_t* newvalp, const vluint32_t* newtrip, int bits);
|
||||
};
|
||||
|
||||
//=============================================================================
|
||||
// VerilatedLxt2C
|
||||
/// Create a LXT2 dump file in C standalone (no SystemC) simulations.
|
||||
/// Also derived for use in SystemC simulations.
|
||||
/// Thread safety: Unless otherwise indicated, every function is VL_MT_UNSAFE_ONE
|
||||
|
||||
class VerilatedLxt2C {
|
||||
VerilatedLxt2 m_sptrace; ///< Trace file being created
|
||||
|
||||
// CONSTRUCTORS
|
||||
VL_UNCOPYABLE(VerilatedLxt2C);
|
||||
public:
|
||||
explicit VerilatedLxt2C(lxt2_wr_trace* filep=NULL) : m_sptrace(filep) {}
|
||||
~VerilatedLxt2C() {}
|
||||
public:
|
||||
// ACCESSORS
|
||||
/// Is file open?
|
||||
bool isOpen() const { return m_sptrace.isOpen(); }
|
||||
// METHODS
|
||||
/// Open a new LXT2 file
|
||||
void open(const char* filename) VL_MT_UNSAFE_ONE { m_sptrace.open(filename); }
|
||||
/// Close dump
|
||||
void close() VL_MT_UNSAFE_ONE { m_sptrace.close(); }
|
||||
/// Flush dump
|
||||
void flush() VL_MT_UNSAFE_ONE { m_sptrace.flush(); }
|
||||
/// Write one cycle of dump data
|
||||
void dump(vluint64_t timeui) { m_sptrace.dump(timeui); }
|
||||
/// Write one cycle of dump data - backward compatible and to reduce
|
||||
/// conversion warnings. It's better to use a vluint64_t time instead.
|
||||
void dump(double timestamp) { dump(static_cast<vluint64_t>(timestamp)); }
|
||||
void dump(vluint32_t timestamp) { dump(static_cast<vluint64_t>(timestamp)); }
|
||||
void dump(int timestamp) { dump(static_cast<vluint64_t>(timestamp)); }
|
||||
/// Set time units (s/ms, defaults to ns)
|
||||
/// See also VL_TIME_PRECISION, and VL_TIME_MULTIPLIER in verilated.h
|
||||
void set_time_unit(const char* unit) { /* TODO */ }
|
||||
void set_time_unit(const std::string& unit) { set_time_unit(unit.c_str()); }
|
||||
/// Set time resolution (s/ms, defaults to ns)
|
||||
/// See also VL_TIME_PRECISION, and VL_TIME_MULTIPLIER in verilated.h
|
||||
void set_time_resolution(const char* unit) { /* TODO */ }
|
||||
void set_time_resolution(const std::string& unit) { set_time_resolution(unit.c_str()); }
|
||||
|
||||
/// Internal class access
|
||||
inline VerilatedLxt2* spTrace() { return &m_sptrace; };
|
||||
};
|
||||
|
||||
#endif // guard
|
||||
|
|
@ -122,7 +122,7 @@ class EmitXmlFileVisitor : public AstNVisitor {
|
|||
if (nodep->isIO()) {
|
||||
puts(" dir="); putsQuoted(kw);
|
||||
puts(" vartype="); putsQuoted(!vt.empty()
|
||||
? vt : typ == AstVarType::PORT ? "port" : "unknown");
|
||||
? vt : typ == AstVarType::PORT ? "port" : "unknown");
|
||||
} else {
|
||||
puts(" vartype="); putsQuoted(!vt.empty() ? vt : kw);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -701,9 +701,6 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc, char
|
|||
else if ( onoff (sw, "-threads-coarsen", flag/*ref*/)) { m_threadsCoarsen = flag; } // Undocumented, debug
|
||||
else if ( onoff (sw, "-trace", flag/*ref*/) ) { m_trace = flag; }
|
||||
else if ( onoff (sw, "-trace-fst", flag/*ref*/) ) { m_trace = flag; m_traceFormat = TraceFormat::FST; addLdLibs("-lz"); }
|
||||
else if ( onoff (sw, "-trace-lxt2", flag/*ref*/) ) {
|
||||
std::cerr<<"-Note: --trace-lxt2 format is deprecated, please use --trace-fst.\n";
|
||||
m_trace = flag; m_traceFormat = TraceFormat::LXT2; addLdLibs("-lz"); }
|
||||
else if ( onoff (sw, "-trace-dups", flag/*ref*/) ) { m_traceDups = flag; }
|
||||
else if ( onoff (sw, "-trace-params", flag/*ref*/) ) { m_traceParams = flag; }
|
||||
else if ( onoff (sw, "-trace-structs", flag/*ref*/) ) { m_traceStructs = flag; }
|
||||
|
|
|
|||
|
|
@ -41,7 +41,6 @@ class TraceFormat {
|
|||
public:
|
||||
enum en {
|
||||
VCD = 0,
|
||||
LXT2,
|
||||
FST
|
||||
} m_e;
|
||||
inline TraceFormat(en _e = VCD) : m_e(_e) {}
|
||||
|
|
@ -50,7 +49,6 @@ public:
|
|||
string classBase() const {
|
||||
static const char* const names[] = {
|
||||
"VerilatedVcd",
|
||||
"VerilatedLxt2",
|
||||
"VerilatedFst"
|
||||
};
|
||||
return names[m_e];
|
||||
|
|
@ -58,7 +56,6 @@ public:
|
|||
string sourceName() const {
|
||||
static const char* const names[] = {
|
||||
"verilated_vcd",
|
||||
"verilated_lxt2",
|
||||
"verilated_fst"
|
||||
};
|
||||
return names[m_e];
|
||||
|
|
@ -164,9 +161,9 @@ class V3Options {
|
|||
int m_pinsBv; // main switch: --pins-bv
|
||||
int m_threads; // main switch: --threads (0 == --no-threads)
|
||||
int m_threadsMaxMTasks; // main switch: --threads-max-mtasks
|
||||
int m_traceDepth; // main switch: --trace-depth
|
||||
TraceFormat m_traceFormat; // main switch: --trace or --trace-lxt2
|
||||
int m_traceMaxArray;// main switch: --trace-max-array
|
||||
int m_traceDepth; // main switch: --trace-depth
|
||||
TraceFormat m_traceFormat; // main switch: --trace or --trace-fst
|
||||
int m_traceMaxArray;// main switch: --trace-max-array
|
||||
int m_traceMaxWidth;// main switch: --trace-max-width
|
||||
int m_unrollCount; // main switch: --unroll-count
|
||||
int m_unrollStmts; // main switch: --unroll-stmts
|
||||
|
|
|
|||
|
|
@ -140,7 +140,6 @@ sub _suppress {
|
|||
return 1 if $id eq "unusedFunction" && $filename =~ m!verilated_vpi.cpp!;
|
||||
return 1 if $id eq "unreachableCode" && $filename =~ /V3ParseBison.c/;
|
||||
return 1 if $id eq 'variableScope' && $filename =~ /fstapi.c/;
|
||||
return 1 if $id eq 'variableScope' && $filename =~ /lxt2_write.c/;
|
||||
|
||||
my $fh = IO::File->new("<$filename");
|
||||
if (!$fh) {
|
||||
|
|
|
|||
|
|
@ -590,10 +590,8 @@ sub compile_vlt_flags {
|
|||
@{$param{verilator_flags3}});
|
||||
$self->{sc} = 1 if ($checkflags =~ /-sc\b/);
|
||||
$self->{trace} = ($opt_trace || $checkflags =~ /-trace\b/
|
||||
|| $checkflags =~ /-trace-fst\b/
|
||||
|| $checkflags =~ /-trace-lxt2\b/);
|
||||
|| $checkflags =~ /-trace-fst\b/);
|
||||
$self->{trace_format} = (($checkflags =~ /-trace-fst\b/ && 'fst-c')
|
||||
|| ($checkflags =~ /-trace-lxt2\b/ && 'lxt2-c')
|
||||
|| ($self->{sc} && 'vcd-sc')
|
||||
|| (!$self->{sc} && 'vcd-c'));
|
||||
$self->{savable} = 1 if ($checkflags =~ /-savable\b/);
|
||||
|
|
@ -1029,7 +1027,6 @@ sub have_sc {
|
|||
sub trace_filename {
|
||||
my $self = shift;
|
||||
return "$self->{obj_dir}/simx.fst" if $self->{trace_format} =~ /^fst/;
|
||||
return "$self->{obj_dir}/simx.lxt2" if $self->{trace_format} =~ /^lxt2/;
|
||||
return "$self->{obj_dir}/simx.vcd";
|
||||
}
|
||||
|
||||
|
|
@ -1204,7 +1201,6 @@ sub _make_main {
|
|||
print $fh "#include \"verilated.h\"\n";
|
||||
print $fh "#include \"systemc.h\"\n" if $self->sc;
|
||||
print $fh "#include \"verilated_fst_c.h\"\n" if $self->{trace} && $self->{trace_format} eq 'fst-c';
|
||||
print $fh "#include \"verilated_lxt2_c.h\"\n" if $self->{trace} && $self->{trace_format} eq 'lxt2-c';
|
||||
print $fh "#include \"verilated_vcd_c.h\"\n" if $self->{trace} && $self->{trace_format} eq 'vcd-c';
|
||||
print $fh "#include \"verilated_vcd_sc.h\"\n" if $self->{trace} && $self->{trace_format} eq 'vcd-sc';
|
||||
print $fh "#include \"verilated_save.h\"\n" if $self->{savable};
|
||||
|
|
@ -1269,7 +1265,6 @@ sub _make_main {
|
|||
$fh->print("#if VM_TRACE\n");
|
||||
$fh->print(" Verilated::traceEverOn(true);\n");
|
||||
$fh->print(" VerilatedFstC* tfp = new VerilatedFstC;\n") if $self->{trace_format} eq 'fst-c';
|
||||
$fh->print(" VerilatedLxt2C* tfp = new VerilatedLxt2C;\n") if $self->{trace_format} eq 'lxt2-c';
|
||||
$fh->print(" VerilatedVcdC* tfp = new VerilatedVcdC;\n") if $self->{trace_format} eq 'vcd-c';
|
||||
$fh->print(" VerilatedVcdSc* tfp = new VerilatedVcdSc;\n") if $self->{trace_format} eq 'vcd-sc';
|
||||
$fh->print(" topp->trace(tfp, 99);\n");
|
||||
|
|
@ -1683,22 +1678,6 @@ sub fst2vcd {
|
|||
return 1;
|
||||
}
|
||||
|
||||
sub lxt2vcd {
|
||||
my $self = (ref $_[0]? shift : $Self);
|
||||
my $fn1 = shift;
|
||||
my $fn2 = shift;
|
||||
if (!-r $fn1) { $self->error("File does not exist $fn1\n"); return 0; }
|
||||
my $cmd = qq{lxt2vcd --help};
|
||||
print "\t$cmd\n" if $::Debug;
|
||||
my $out = `$cmd`;
|
||||
if (!$out || $out !~ /Usage:/) { $self->skip("No lxt2vcd installed\n"); return 0; }
|
||||
|
||||
$cmd = qq{lxt2vcd "$fn1" -o "$fn2"};
|
||||
print "\t$cmd\n" if $::Debug;
|
||||
$out = `$cmd`;
|
||||
return 1;
|
||||
}
|
||||
|
||||
sub _vcd_read {
|
||||
my $self = (ref $_[0]? shift : $Self);
|
||||
my $filename = shift;
|
||||
|
|
|
|||
|
|
@ -1,57 +0,0 @@
|
|||
$date
|
||||
Tue Aug 28 17:08:13 2018
|
||||
$end
|
||||
$version
|
||||
lxt2vcd
|
||||
$end
|
||||
$timescale 1ns $end
|
||||
$scope module top $end
|
||||
$var wire 1 ! clk $end
|
||||
$scope module t $end
|
||||
$scope module biggie $end
|
||||
$var wire 1048577 " d [1048576:0] $end
|
||||
$upscope $end
|
||||
$var wire 32 # cyc [31:0] $end
|
||||
$var wire 1 ! clk $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
$dumpvars
|
||||
#0
|
||||
0!
|
||||
b0 "
|
||||
b0 #
|
||||
#10
|
||||
b1 #
|
||||
b111111101110110111111010110011100 "
|
||||
1!
|
||||
#15
|
||||
0!
|
||||
#20
|
||||
1!
|
||||
b1111111011101101111110101100111000 "
|
||||
b10 #
|
||||
#25
|
||||
0!
|
||||
#30
|
||||
1!
|
||||
b11 #
|
||||
b11111110111011011111101011001110000 "
|
||||
#35
|
||||
0!
|
||||
#40
|
||||
1!
|
||||
b111111101110110111111010110011100000 "
|
||||
b100 #
|
||||
#45
|
||||
0!
|
||||
#50
|
||||
1!
|
||||
b101 #
|
||||
b1111111011101101111110101100111000000 "
|
||||
#55
|
||||
0!
|
||||
#60
|
||||
1!
|
||||
b11111110111011011111101011001110000000 "
|
||||
b110 #
|
||||
|
|
@ -1,26 +0,0 @@
|
|||
#!/usr/bin/perl
|
||||
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
|
||||
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
|
||||
#
|
||||
# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
|
||||
# redistribute it and/or modify it under the terms of either the GNU
|
||||
# Lesser General Public License Version 3 or the Perl Artistic License
|
||||
# Version 2.0.
|
||||
|
||||
scenarios(vlt => 1);
|
||||
|
||||
top_filename("t/t_trace_array.v");
|
||||
|
||||
compile(
|
||||
verilator_flags2 => ['--cc --trace-lxt2 --trace-structs'],
|
||||
);
|
||||
|
||||
execute(
|
||||
check_finished => 1,
|
||||
);
|
||||
|
||||
lxt2vcd($Self->trace_filename, "$Self->{obj_dir}/simx-lxt2vcd.vcd");
|
||||
vcd_identical("$Self->{obj_dir}/simx-lxt2vcd.vcd", "t/$Self->{name}.out");
|
||||
|
||||
ok(1);
|
||||
1;
|
||||
|
|
@ -1,209 +0,0 @@
|
|||
$date
|
||||
Sun Oct 7 21:58:06 2018
|
||||
$end
|
||||
$version
|
||||
lxt2vcd
|
||||
$end
|
||||
$timescale 1ns $end
|
||||
$scope module top $end
|
||||
$scope module $unit $end
|
||||
$var wire 1 ! global_bit $end
|
||||
$upscope $end
|
||||
$var wire 1 " clk $end
|
||||
$scope module t $end
|
||||
$var wire 32 # cyc [31:0] $end
|
||||
$scope module p2 $end
|
||||
$var wire 32 $ PARAM [31:0] $end
|
||||
$upscope $end
|
||||
$scope module p3 $end
|
||||
$var wire 32 % PARAM [31:0] $end
|
||||
$upscope $end
|
||||
$scope module unnamedblk1 $end
|
||||
$var wire 32 & b [31:0] $end
|
||||
$scope module unnamedblk2 $end
|
||||
$var wire 32 ' a [31:0] $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$var real 1 ( v_arr_real(0) $end
|
||||
$var real 1 ) v_arr_real(1) $end
|
||||
$var wire 2 * v_arrp [2:1] $end
|
||||
$var wire 4 + v_arrp_arrp [3:0] $end
|
||||
$var wire 4 , v_arrp_strp [3:0] $end
|
||||
$var wire 1 - v_arru(1) $end
|
||||
$var wire 1 . v_arru(2) $end
|
||||
$var wire 2 / v_arru_arrp(3) [2:1] $end
|
||||
$var wire 2 0 v_arru_arrp(4) [2:1] $end
|
||||
$var wire 1 1 v_arru_arru(3)(1) $end
|
||||
$var wire 1 2 v_arru_arru(3)(2) $end
|
||||
$var wire 1 3 v_arru_arru(4)(1) $end
|
||||
$var wire 1 4 v_arru_arru(4)(2) $end
|
||||
$var wire 2 5 v_arru_strp(3) [1:0] $end
|
||||
$var wire 2 6 v_arru_strp(4) [1:0] $end
|
||||
$var wire 32 7 v_enumed [31:0] $end
|
||||
$var wire 32 8 v_enumed2 [31:0] $end
|
||||
$var real 1 9 v_real $end
|
||||
$var wire 64 : v_str32x2 [63:0] $end
|
||||
$var wire 2 ; v_strp [1:0] $end
|
||||
$var wire 4 < v_strp_strp [3:0] $end
|
||||
$var wire 2 = v_unip_strp [1:0] $end
|
||||
$var wire 1 " clk $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
$dumpvars
|
||||
#0
|
||||
1!
|
||||
0"
|
||||
b0 #
|
||||
b10 $
|
||||
b11 %
|
||||
b0 &
|
||||
b0 '
|
||||
r0 (
|
||||
r0 )
|
||||
b0 *
|
||||
b0 +
|
||||
b0 ,
|
||||
0-
|
||||
0.
|
||||
b0 /
|
||||
b0 0
|
||||
01
|
||||
02
|
||||
03
|
||||
04
|
||||
b0 5
|
||||
b0 6
|
||||
b0 7
|
||||
b0 8
|
||||
r0 9
|
||||
b11111111 :
|
||||
b0 ;
|
||||
b0 <
|
||||
b0 =
|
||||
#10
|
||||
b11 =
|
||||
b1111 <
|
||||
b11 ;
|
||||
b100000000000000000000000011111110 :
|
||||
r0.1 9
|
||||
b10 8
|
||||
b1 7
|
||||
b11 6
|
||||
b11 5
|
||||
b11 0
|
||||
b11 /
|
||||
b1111 ,
|
||||
b1111 +
|
||||
b11 *
|
||||
r0.3 )
|
||||
r0.2 (
|
||||
b101 '
|
||||
b101 &
|
||||
b1 #
|
||||
1"
|
||||
#15
|
||||
0"
|
||||
#20
|
||||
1"
|
||||
b10 #
|
||||
r0.4 (
|
||||
r0.6 )
|
||||
b0 *
|
||||
b0 +
|
||||
b0 ,
|
||||
b0 /
|
||||
b0 0
|
||||
b0 5
|
||||
b0 6
|
||||
b10 7
|
||||
b100 8
|
||||
r0.2 9
|
||||
b1000000000000000000000000011111101 :
|
||||
b0 ;
|
||||
b0 <
|
||||
b0 =
|
||||
#25
|
||||
0"
|
||||
#30
|
||||
1"
|
||||
b11 =
|
||||
b1111 <
|
||||
b11 ;
|
||||
b1100000000000000000000000011111100 :
|
||||
r0.3 9
|
||||
b110 8
|
||||
b11 7
|
||||
b11 6
|
||||
b11 5
|
||||
b11 0
|
||||
b11 /
|
||||
b1111 ,
|
||||
b1111 +
|
||||
b11 *
|
||||
r0.8999999999999999 )
|
||||
r0.6000000000000001 (
|
||||
b11 #
|
||||
#35
|
||||
0"
|
||||
#40
|
||||
1"
|
||||
b100 #
|
||||
r0.8 (
|
||||
r1.2 )
|
||||
b0 *
|
||||
b0 +
|
||||
b0 ,
|
||||
b0 /
|
||||
b0 0
|
||||
b0 5
|
||||
b0 6
|
||||
b100 7
|
||||
b1000 8
|
||||
r0.4 9
|
||||
b10000000000000000000000000011111011 :
|
||||
b0 ;
|
||||
b0 <
|
||||
b0 =
|
||||
#45
|
||||
0"
|
||||
#50
|
||||
1"
|
||||
b11 =
|
||||
b1111 <
|
||||
b11 ;
|
||||
b10100000000000000000000000011111010 :
|
||||
r0.5 9
|
||||
b1010 8
|
||||
b101 7
|
||||
b11 6
|
||||
b11 5
|
||||
b11 0
|
||||
b11 /
|
||||
b1111 ,
|
||||
b1111 +
|
||||
b11 *
|
||||
r1.5 )
|
||||
r1 (
|
||||
b101 #
|
||||
#55
|
||||
0"
|
||||
#60
|
||||
1"
|
||||
b110 #
|
||||
r1.2 (
|
||||
r1.8 )
|
||||
b0 *
|
||||
b0 +
|
||||
b0 ,
|
||||
b0 /
|
||||
b0 0
|
||||
b0 5
|
||||
b0 6
|
||||
b110 7
|
||||
b1100 8
|
||||
r0.6 9
|
||||
b11000000000000000000000000011111001 :
|
||||
b0 ;
|
||||
b0 <
|
||||
b0 =
|
||||
|
|
@ -1,26 +0,0 @@
|
|||
#!/usr/bin/perl
|
||||
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
|
||||
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
|
||||
#
|
||||
# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
|
||||
# redistribute it and/or modify it under the terms of either the GNU
|
||||
# Lesser General Public License Version 3 or the Perl Artistic License
|
||||
# Version 2.0.
|
||||
|
||||
scenarios(simulator => 1);
|
||||
|
||||
top_filename("t/t_trace_complex.v");
|
||||
|
||||
compile(
|
||||
verilator_flags2 => ['--cc --trace-lxt2'],
|
||||
);
|
||||
|
||||
execute(
|
||||
check_finished => 1,
|
||||
);
|
||||
|
||||
lxt2vcd($Self->trace_filename, "$Self->{obj_dir}/simx-lxt2vcd.vcd");
|
||||
vcd_identical("$Self->{obj_dir}/simx-lxt2vcd.vcd", "t/$Self->{name}.out");
|
||||
|
||||
ok(1);
|
||||
1;
|
||||
|
|
@ -1,209 +0,0 @@
|
|||
$date
|
||||
Sun Oct 7 21:58:07 2018
|
||||
$end
|
||||
$version
|
||||
lxt2vcd
|
||||
$end
|
||||
$timescale 1ns $end
|
||||
$scope module top $end
|
||||
$scope module $unit $end
|
||||
$var wire 1 ! global_bit $end
|
||||
$upscope $end
|
||||
$var wire 1 " clk $end
|
||||
$scope module t $end
|
||||
$var wire 32 # cyc [31:0] $end
|
||||
$scope module p2 $end
|
||||
$var wire 32 $ PARAM [31:0] $end
|
||||
$upscope $end
|
||||
$scope module p3 $end
|
||||
$var wire 32 % PARAM [31:0] $end
|
||||
$upscope $end
|
||||
$scope module unnamedblk1 $end
|
||||
$var wire 32 & b [31:0] $end
|
||||
$scope module unnamedblk2 $end
|
||||
$var wire 32 ' a [31:0] $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$var real 1 ( v_arr_real(0) $end
|
||||
$var real 1 ) v_arr_real(1) $end
|
||||
$var wire 2 * v_arrp [2:1] $end
|
||||
$var wire 4 + v_arrp_arrp [3:0] $end
|
||||
$var wire 4 , v_arrp_strp [3:0] $end
|
||||
$var wire 1 - v_arru(1) $end
|
||||
$var wire 1 . v_arru(2) $end
|
||||
$var wire 2 / v_arru_arrp(3) [2:1] $end
|
||||
$var wire 2 0 v_arru_arrp(4) [2:1] $end
|
||||
$var wire 1 1 v_arru_arru(3)(1) $end
|
||||
$var wire 1 2 v_arru_arru(3)(2) $end
|
||||
$var wire 1 3 v_arru_arru(4)(1) $end
|
||||
$var wire 1 4 v_arru_arru(4)(2) $end
|
||||
$var wire 2 5 v_arru_strp(3) [1:0] $end
|
||||
$var wire 2 6 v_arru_strp(4) [1:0] $end
|
||||
$var wire 32 7 v_enumed [31:0] $end
|
||||
$var wire 32 8 v_enumed2 [31:0] $end
|
||||
$var real 1 9 v_real $end
|
||||
$var wire 64 : v_str32x2 [63:0] $end
|
||||
$var wire 2 ; v_strp [1:0] $end
|
||||
$var wire 4 < v_strp_strp [3:0] $end
|
||||
$var wire 2 = v_unip_strp [1:0] $end
|
||||
$var wire 1 " clk $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
$dumpvars
|
||||
#0
|
||||
1!
|
||||
0"
|
||||
b0 #
|
||||
b10 $
|
||||
b11 %
|
||||
b0 &
|
||||
b0 '
|
||||
r0 (
|
||||
r0 )
|
||||
b0 *
|
||||
b0 +
|
||||
b0 ,
|
||||
0-
|
||||
0.
|
||||
b0 /
|
||||
b0 0
|
||||
01
|
||||
02
|
||||
03
|
||||
04
|
||||
b0 5
|
||||
b0 6
|
||||
b0 7
|
||||
b0 8
|
||||
r0 9
|
||||
b11111111 :
|
||||
b0 ;
|
||||
b0 <
|
||||
b0 =
|
||||
#10
|
||||
b11 =
|
||||
b1111 <
|
||||
b11 ;
|
||||
b100000000000000000000000011111110 :
|
||||
r0.1 9
|
||||
b10 8
|
||||
b1 7
|
||||
b11 6
|
||||
b11 5
|
||||
b11 0
|
||||
b11 /
|
||||
b1111 ,
|
||||
b1111 +
|
||||
b11 *
|
||||
r0.3 )
|
||||
r0.2 (
|
||||
b101 '
|
||||
b101 &
|
||||
b1 #
|
||||
1"
|
||||
#15
|
||||
0"
|
||||
#20
|
||||
1"
|
||||
b10 #
|
||||
r0.4 (
|
||||
r0.6 )
|
||||
b0 *
|
||||
b0 +
|
||||
b0 ,
|
||||
b0 /
|
||||
b0 0
|
||||
b0 5
|
||||
b0 6
|
||||
b10 7
|
||||
b100 8
|
||||
r0.2 9
|
||||
b1000000000000000000000000011111101 :
|
||||
b0 ;
|
||||
b0 <
|
||||
b0 =
|
||||
#25
|
||||
0"
|
||||
#30
|
||||
1"
|
||||
b11 =
|
||||
b1111 <
|
||||
b11 ;
|
||||
b1100000000000000000000000011111100 :
|
||||
r0.3 9
|
||||
b110 8
|
||||
b11 7
|
||||
b11 6
|
||||
b11 5
|
||||
b11 0
|
||||
b11 /
|
||||
b1111 ,
|
||||
b1111 +
|
||||
b11 *
|
||||
r0.8999999999999999 )
|
||||
r0.6000000000000001 (
|
||||
b11 #
|
||||
#35
|
||||
0"
|
||||
#40
|
||||
1"
|
||||
b100 #
|
||||
r0.8 (
|
||||
r1.2 )
|
||||
b0 *
|
||||
b0 +
|
||||
b0 ,
|
||||
b0 /
|
||||
b0 0
|
||||
b0 5
|
||||
b0 6
|
||||
b100 7
|
||||
b1000 8
|
||||
r0.4 9
|
||||
b10000000000000000000000000011111011 :
|
||||
b0 ;
|
||||
b0 <
|
||||
b0 =
|
||||
#45
|
||||
0"
|
||||
#50
|
||||
1"
|
||||
b11 =
|
||||
b1111 <
|
||||
b11 ;
|
||||
b10100000000000000000000000011111010 :
|
||||
r0.5 9
|
||||
b1010 8
|
||||
b101 7
|
||||
b11 6
|
||||
b11 5
|
||||
b11 0
|
||||
b11 /
|
||||
b1111 ,
|
||||
b1111 +
|
||||
b11 *
|
||||
r1.5 )
|
||||
r1 (
|
||||
b101 #
|
||||
#55
|
||||
0"
|
||||
#60
|
||||
1"
|
||||
b110 #
|
||||
r1.2 (
|
||||
r1.8 )
|
||||
b0 *
|
||||
b0 +
|
||||
b0 ,
|
||||
b0 /
|
||||
b0 0
|
||||
b0 5
|
||||
b0 6
|
||||
b110 7
|
||||
b1100 8
|
||||
r0.6 9
|
||||
b11000000000000000000000000011111001 :
|
||||
b0 ;
|
||||
b0 <
|
||||
b0 =
|
||||
|
|
@ -1,26 +0,0 @@
|
|||
#!/usr/bin/perl
|
||||
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
|
||||
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
|
||||
#
|
||||
# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
|
||||
# redistribute it and/or modify it under the terms of either the GNU
|
||||
# Lesser General Public License Version 3 or the Perl Artistic License
|
||||
# Version 2.0.
|
||||
|
||||
scenarios(simulator => 1);
|
||||
|
||||
top_filename("t_trace_complex.v");
|
||||
|
||||
compile(
|
||||
verilator_flags2 => ['--cc --trace-lxt2 --no-trace-structs --trace-params'],
|
||||
);
|
||||
|
||||
execute(
|
||||
check_finished => 1,
|
||||
);
|
||||
|
||||
lxt2vcd($Self->trace_filename, "$Self->{obj_dir}/simx-lxt2vcd.vcd");
|
||||
vcd_identical("$Self->{obj_dir}/simx-lxt2vcd.vcd", "t/$Self->{name}.out");
|
||||
|
||||
ok(1);
|
||||
1;
|
||||
|
|
@ -1,327 +0,0 @@
|
|||
$date
|
||||
Sun Oct 7 21:58:08 2018
|
||||
$end
|
||||
$version
|
||||
lxt2vcd
|
||||
$end
|
||||
$timescale 1ns $end
|
||||
$scope module top $end
|
||||
$scope module $unit $end
|
||||
$var wire 1 ! global_bit $end
|
||||
$upscope $end
|
||||
$var wire 1 " clk $end
|
||||
$scope module t $end
|
||||
$var wire 32 # cyc [31:0] $end
|
||||
$scope module unnamedblk1 $end
|
||||
$var wire 32 $ b [31:0] $end
|
||||
$scope module unnamedblk2 $end
|
||||
$var wire 32 % a [31:0] $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$var real 1 & v_arr_real(0) $end
|
||||
$var real 1 ' v_arr_real(1) $end
|
||||
$var wire 2 ( v_arrp [2:1] $end
|
||||
$var wire 2 ) v_arrp_arrp(3) [1:0] $end
|
||||
$var wire 2 * v_arrp_arrp(4) [1:0] $end
|
||||
$scope module v_arrp_strp(3) $end
|
||||
$var wire 1 + b0 $end
|
||||
$var wire 1 , b1 $end
|
||||
$upscope $end
|
||||
$scope module v_arrp_strp(4) $end
|
||||
$var wire 1 - b0 $end
|
||||
$var wire 1 . b1 $end
|
||||
$upscope $end
|
||||
$var wire 1 / v_arru(1) $end
|
||||
$var wire 1 0 v_arru(2) $end
|
||||
$var wire 2 1 v_arru_arrp(3) [2:1] $end
|
||||
$var wire 2 2 v_arru_arrp(4) [2:1] $end
|
||||
$var wire 1 3 v_arru_arru(3)(1) $end
|
||||
$var wire 1 4 v_arru_arru(3)(2) $end
|
||||
$var wire 1 5 v_arru_arru(4)(1) $end
|
||||
$var wire 1 6 v_arru_arru(4)(2) $end
|
||||
$scope module v_arru_strp(3) $end
|
||||
$var wire 1 7 b0 $end
|
||||
$var wire 1 8 b1 $end
|
||||
$upscope $end
|
||||
$scope module v_arru_strp(4) $end
|
||||
$var wire 1 9 b0 $end
|
||||
$var wire 1 : b1 $end
|
||||
$upscope $end
|
||||
$var wire 32 ; v_enumed [31:0] $end
|
||||
$var wire 32 < v_enumed2 [31:0] $end
|
||||
$var real 1 = v_real $end
|
||||
$scope module v_str32x2(0) $end
|
||||
$var wire 32 > data [31:0] $end
|
||||
$upscope $end
|
||||
$scope module v_str32x2(1) $end
|
||||
$var wire 32 ? data [31:0] $end
|
||||
$upscope $end
|
||||
$scope module v_strp $end
|
||||
$var wire 1 @ b0 $end
|
||||
$var wire 1 A b1 $end
|
||||
$upscope $end
|
||||
$scope module v_strp_strp $end
|
||||
$scope module x0 $end
|
||||
$var wire 1 B b0 $end
|
||||
$var wire 1 C b1 $end
|
||||
$upscope $end
|
||||
$scope module x1 $end
|
||||
$var wire 1 D b0 $end
|
||||
$var wire 1 E b1 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope module v_unip_strp $end
|
||||
$scope module x1 $end
|
||||
$var wire 1 F b0 $end
|
||||
$var wire 1 G b1 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$var wire 1 " clk $end
|
||||
$scope module v_unip_strp $end
|
||||
$scope module x0 $end
|
||||
$var wire 1 F b0 $end
|
||||
$var wire 1 G b1 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
$dumpvars
|
||||
#0
|
||||
1!
|
||||
0"
|
||||
b0 #
|
||||
b0 $
|
||||
b0 %
|
||||
r0 &
|
||||
r0 '
|
||||
b0 (
|
||||
b0 )
|
||||
b0 *
|
||||
0+
|
||||
0,
|
||||
0-
|
||||
0.
|
||||
0/
|
||||
00
|
||||
b0 1
|
||||
b0 2
|
||||
03
|
||||
04
|
||||
05
|
||||
06
|
||||
07
|
||||
08
|
||||
09
|
||||
0:
|
||||
b0 ;
|
||||
b0 <
|
||||
r0 =
|
||||
b11111111 >
|
||||
b0 ?
|
||||
0@
|
||||
0A
|
||||
0B
|
||||
0C
|
||||
0D
|
||||
0E
|
||||
0F
|
||||
0G
|
||||
#10
|
||||
1G
|
||||
1F
|
||||
1E
|
||||
1D
|
||||
1C
|
||||
1B
|
||||
1A
|
||||
1@
|
||||
b1 ?
|
||||
b11111110 >
|
||||
r0.1 =
|
||||
b10 <
|
||||
b1 ;
|
||||
1:
|
||||
19
|
||||
18
|
||||
17
|
||||
b11 2
|
||||
b11 1
|
||||
1.
|
||||
1-
|
||||
1,
|
||||
1+
|
||||
b11 *
|
||||
b11 )
|
||||
b11 (
|
||||
r0.3 '
|
||||
r0.2 &
|
||||
b101 %
|
||||
b101 $
|
||||
b1 #
|
||||
1"
|
||||
#15
|
||||
0"
|
||||
#20
|
||||
1"
|
||||
b10 #
|
||||
r0.4 &
|
||||
r0.6 '
|
||||
b0 (
|
||||
b0 )
|
||||
b0 *
|
||||
0+
|
||||
0,
|
||||
0-
|
||||
0.
|
||||
b0 1
|
||||
b0 2
|
||||
07
|
||||
08
|
||||
09
|
||||
0:
|
||||
b10 ;
|
||||
b100 <
|
||||
r0.2 =
|
||||
b11111101 >
|
||||
b10 ?
|
||||
0@
|
||||
0A
|
||||
0B
|
||||
0C
|
||||
0D
|
||||
0E
|
||||
0F
|
||||
0G
|
||||
#25
|
||||
0"
|
||||
#30
|
||||
1"
|
||||
1G
|
||||
1F
|
||||
1E
|
||||
1D
|
||||
1C
|
||||
1B
|
||||
1A
|
||||
1@
|
||||
b11 ?
|
||||
b11111100 >
|
||||
r0.3 =
|
||||
b110 <
|
||||
b11 ;
|
||||
1:
|
||||
19
|
||||
18
|
||||
17
|
||||
b11 2
|
||||
b11 1
|
||||
1.
|
||||
1-
|
||||
1,
|
||||
1+
|
||||
b11 *
|
||||
b11 )
|
||||
b11 (
|
||||
r0.8999999999999999 '
|
||||
r0.6000000000000001 &
|
||||
b11 #
|
||||
#35
|
||||
0"
|
||||
#40
|
||||
1"
|
||||
b100 #
|
||||
r0.8 &
|
||||
r1.2 '
|
||||
b0 (
|
||||
b0 )
|
||||
b0 *
|
||||
0+
|
||||
0,
|
||||
0-
|
||||
0.
|
||||
b0 1
|
||||
b0 2
|
||||
07
|
||||
08
|
||||
09
|
||||
0:
|
||||
b100 ;
|
||||
b1000 <
|
||||
r0.4 =
|
||||
b11111011 >
|
||||
b100 ?
|
||||
0@
|
||||
0A
|
||||
0B
|
||||
0C
|
||||
0D
|
||||
0E
|
||||
0F
|
||||
0G
|
||||
#45
|
||||
0"
|
||||
#50
|
||||
1"
|
||||
1G
|
||||
1F
|
||||
1E
|
||||
1D
|
||||
1C
|
||||
1B
|
||||
1A
|
||||
1@
|
||||
b101 ?
|
||||
b11111010 >
|
||||
r0.5 =
|
||||
b1010 <
|
||||
b101 ;
|
||||
1:
|
||||
19
|
||||
18
|
||||
17
|
||||
b11 2
|
||||
b11 1
|
||||
1.
|
||||
1-
|
||||
1,
|
||||
1+
|
||||
b11 *
|
||||
b11 )
|
||||
b11 (
|
||||
r1.5 '
|
||||
r1 &
|
||||
b101 #
|
||||
#55
|
||||
0"
|
||||
#60
|
||||
1"
|
||||
b110 #
|
||||
r1.2 &
|
||||
r1.8 '
|
||||
b0 (
|
||||
b0 )
|
||||
b0 *
|
||||
0+
|
||||
0,
|
||||
0-
|
||||
0.
|
||||
b0 1
|
||||
b0 2
|
||||
07
|
||||
08
|
||||
09
|
||||
0:
|
||||
b110 ;
|
||||
b1100 <
|
||||
r0.6 =
|
||||
b11111001 >
|
||||
b110 ?
|
||||
0@
|
||||
0A
|
||||
0B
|
||||
0C
|
||||
0D
|
||||
0E
|
||||
0F
|
||||
0G
|
||||
|
|
@ -1,26 +0,0 @@
|
|||
#!/usr/bin/perl
|
||||
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
|
||||
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
|
||||
#
|
||||
# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
|
||||
# redistribute it and/or modify it under the terms of either the GNU
|
||||
# Lesser General Public License Version 3 or the Perl Artistic License
|
||||
# Version 2.0.
|
||||
|
||||
scenarios(simulator => 1);
|
||||
|
||||
top_filename("t_trace_complex.v");
|
||||
|
||||
compile(
|
||||
verilator_flags2 => ['--cc --trace-lxt2 --trace-structs --no-trace-params'],
|
||||
);
|
||||
|
||||
execute(
|
||||
check_finished => 1,
|
||||
);
|
||||
|
||||
lxt2vcd($Self->trace_filename, "$Self->{obj_dir}/simx-lxt2vcd.vcd");
|
||||
vcd_identical("$Self->{obj_dir}/simx-lxt2vcd.vcd", "t/$Self->{name}.out");
|
||||
|
||||
ok(1);
|
||||
1;
|
||||
|
|
@ -1,993 +0,0 @@
|
|||
$date
|
||||
Tue Aug 28 05:58:13 2018
|
||||
$end
|
||||
$version
|
||||
lxt2vcd
|
||||
$end
|
||||
$timescale 1ns $end
|
||||
$scope module top $end
|
||||
$var wire 1 ! clk $end
|
||||
$var wire 5 " state [4:0] $end
|
||||
$scope module t $end
|
||||
$var wire 32 # cyc [31:0] $end
|
||||
$var wire 1 $ rstn $end
|
||||
$scope module test $end
|
||||
$var wire 5 % state_array(0) [4:0] $end
|
||||
$var wire 5 & state_array(1) [4:0] $end
|
||||
$var wire 5 ' state_array(2) [4:0] $end
|
||||
$var wire 5 ( state_w [4:0] $end
|
||||
$scope module unnamedblk1 $end
|
||||
$var wire 32 ) i [31:0] $end
|
||||
$upscope $end
|
||||
$scope module unnamedblk2 $end
|
||||
$var wire 32 * i [31:0] $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$var wire 1 ! clk $end
|
||||
$var wire 5 " state [4:0] $end
|
||||
$scope module test $end
|
||||
$var wire 1 ! clk $end
|
||||
$var wire 1 $ rstn $end
|
||||
$var wire 5 " state [4:0] $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
$dumpvars
|
||||
#0
|
||||
0!
|
||||
b0 "
|
||||
b0 #
|
||||
0$
|
||||
b0 %
|
||||
b0 &
|
||||
b0 '
|
||||
b0 (
|
||||
b0 )
|
||||
b0 *
|
||||
#10
|
||||
b11 )
|
||||
b10100 (
|
||||
b1 '
|
||||
b1 &
|
||||
b1 %
|
||||
b1 #
|
||||
b1 "
|
||||
1!
|
||||
#15
|
||||
0!
|
||||
#20
|
||||
1!
|
||||
b10 #
|
||||
#25
|
||||
0!
|
||||
#30
|
||||
1!
|
||||
b11 #
|
||||
#35
|
||||
0!
|
||||
#40
|
||||
1!
|
||||
b100 #
|
||||
#45
|
||||
0!
|
||||
#50
|
||||
1!
|
||||
b101 #
|
||||
#55
|
||||
0!
|
||||
#60
|
||||
1!
|
||||
b110 #
|
||||
#65
|
||||
0!
|
||||
#70
|
||||
1!
|
||||
b111 #
|
||||
#75
|
||||
0!
|
||||
#80
|
||||
1!
|
||||
b1000 #
|
||||
#85
|
||||
0!
|
||||
#90
|
||||
1!
|
||||
b1001 #
|
||||
#95
|
||||
0!
|
||||
#100
|
||||
1!
|
||||
b1010 #
|
||||
#105
|
||||
0!
|
||||
#110
|
||||
1!
|
||||
b1011 #
|
||||
1$
|
||||
#115
|
||||
0!
|
||||
#120
|
||||
1!
|
||||
b1100 #
|
||||
b10100 '
|
||||
b1010 (
|
||||
b10 *
|
||||
#125
|
||||
0!
|
||||
#130
|
||||
1!
|
||||
b101 (
|
||||
b1010 '
|
||||
b1101 #
|
||||
b10100 &
|
||||
#135
|
||||
0!
|
||||
#140
|
||||
1!
|
||||
b1010 &
|
||||
b1110 #
|
||||
b101 '
|
||||
b10110 (
|
||||
b10100 "
|
||||
b10100 %
|
||||
#145
|
||||
0!
|
||||
#150
|
||||
1!
|
||||
b1010 %
|
||||
b1010 "
|
||||
b1011 (
|
||||
b10110 '
|
||||
b1111 #
|
||||
b101 &
|
||||
#155
|
||||
0!
|
||||
#160
|
||||
1!
|
||||
b10110 &
|
||||
b10000 #
|
||||
b1011 '
|
||||
b10001 (
|
||||
b101 "
|
||||
b101 %
|
||||
#165
|
||||
0!
|
||||
#170
|
||||
1!
|
||||
b10110 %
|
||||
b10110 "
|
||||
b11100 (
|
||||
b10001 '
|
||||
b10001 #
|
||||
b1011 &
|
||||
#175
|
||||
0!
|
||||
#180
|
||||
1!
|
||||
b10001 &
|
||||
b10010 #
|
||||
b11100 '
|
||||
b1110 (
|
||||
b1011 "
|
||||
b1011 %
|
||||
#185
|
||||
0!
|
||||
#190
|
||||
1!
|
||||
b10001 %
|
||||
b10001 "
|
||||
b111 (
|
||||
b1110 '
|
||||
b10011 #
|
||||
b11100 &
|
||||
#195
|
||||
0!
|
||||
#200
|
||||
1!
|
||||
b1110 &
|
||||
b10100 #
|
||||
b111 '
|
||||
b10111 (
|
||||
b11100 "
|
||||
b11100 %
|
||||
#205
|
||||
0!
|
||||
#210
|
||||
1!
|
||||
b1110 %
|
||||
b1110 "
|
||||
b11111 (
|
||||
b10111 '
|
||||
b10101 #
|
||||
b111 &
|
||||
#215
|
||||
0!
|
||||
#220
|
||||
1!
|
||||
b10111 &
|
||||
b10110 #
|
||||
b11111 '
|
||||
b11011 (
|
||||
b111 "
|
||||
b111 %
|
||||
#225
|
||||
0!
|
||||
#230
|
||||
1!
|
||||
b10111 %
|
||||
b10111 "
|
||||
b11001 (
|
||||
b11011 '
|
||||
b10111 #
|
||||
b11111 &
|
||||
#235
|
||||
0!
|
||||
#240
|
||||
1!
|
||||
b11011 &
|
||||
b11000 #
|
||||
b11001 '
|
||||
b11000 (
|
||||
b11111 "
|
||||
b11111 %
|
||||
#245
|
||||
0!
|
||||
#250
|
||||
1!
|
||||
b11011 %
|
||||
b11011 "
|
||||
b1100 (
|
||||
b11000 '
|
||||
b11001 #
|
||||
b11001 &
|
||||
#255
|
||||
0!
|
||||
#260
|
||||
1!
|
||||
b11000 &
|
||||
b11010 #
|
||||
b1100 '
|
||||
b110 (
|
||||
b11001 "
|
||||
b11001 %
|
||||
#265
|
||||
0!
|
||||
#270
|
||||
1!
|
||||
b11000 %
|
||||
b11000 "
|
||||
b11 (
|
||||
b110 '
|
||||
b11011 #
|
||||
b1100 &
|
||||
#275
|
||||
0!
|
||||
#280
|
||||
1!
|
||||
b110 &
|
||||
b11100 #
|
||||
b11 '
|
||||
b10101 (
|
||||
b1100 "
|
||||
b1100 %
|
||||
#285
|
||||
0!
|
||||
#290
|
||||
1!
|
||||
b110 %
|
||||
b110 "
|
||||
b11110 (
|
||||
b10101 '
|
||||
b11101 #
|
||||
b11 &
|
||||
#295
|
||||
0!
|
||||
#300
|
||||
1!
|
||||
b10101 &
|
||||
b11110 #
|
||||
b11110 '
|
||||
b1111 (
|
||||
b11 "
|
||||
b11 %
|
||||
#305
|
||||
0!
|
||||
#310
|
||||
1!
|
||||
b10101 %
|
||||
b10101 "
|
||||
b10011 (
|
||||
b1111 '
|
||||
b11111 #
|
||||
b11110 &
|
||||
#315
|
||||
0!
|
||||
#320
|
||||
1!
|
||||
b1111 &
|
||||
b100000 #
|
||||
b10011 '
|
||||
b11101 (
|
||||
b11110 "
|
||||
b11110 %
|
||||
#325
|
||||
0!
|
||||
#330
|
||||
1!
|
||||
b11010 (
|
||||
b11101 '
|
||||
b10011 &
|
||||
b1111 %
|
||||
b100001 #
|
||||
b1111 "
|
||||
#335
|
||||
0!
|
||||
#340
|
||||
1!
|
||||
b10011 "
|
||||
b100010 #
|
||||
b10011 %
|
||||
b11101 &
|
||||
b11010 '
|
||||
b1101 (
|
||||
#345
|
||||
0!
|
||||
#350
|
||||
1!
|
||||
b10010 (
|
||||
b1101 '
|
||||
b11010 &
|
||||
b11101 %
|
||||
b100011 #
|
||||
b11101 "
|
||||
#355
|
||||
0!
|
||||
#360
|
||||
1!
|
||||
b11010 "
|
||||
b100100 #
|
||||
b11010 %
|
||||
b1101 &
|
||||
b10010 '
|
||||
b1001 (
|
||||
#365
|
||||
0!
|
||||
#370
|
||||
1!
|
||||
b10000 (
|
||||
b1001 '
|
||||
b10010 &
|
||||
b1101 %
|
||||
b100101 #
|
||||
b1101 "
|
||||
#375
|
||||
0!
|
||||
#380
|
||||
1!
|
||||
b10010 "
|
||||
b100110 #
|
||||
b10010 %
|
||||
b1001 &
|
||||
b10000 '
|
||||
b1000 (
|
||||
#385
|
||||
0!
|
||||
#390
|
||||
1!
|
||||
b100 (
|
||||
b1000 '
|
||||
b10000 &
|
||||
b1001 %
|
||||
b100111 #
|
||||
b1001 "
|
||||
#395
|
||||
0!
|
||||
#400
|
||||
1!
|
||||
b10000 "
|
||||
b101000 #
|
||||
b10000 %
|
||||
b1000 &
|
||||
b100 '
|
||||
b10 (
|
||||
#405
|
||||
0!
|
||||
#410
|
||||
1!
|
||||
b1 (
|
||||
b10 '
|
||||
b100 &
|
||||
b1000 %
|
||||
b101001 #
|
||||
b1000 "
|
||||
#415
|
||||
0!
|
||||
#420
|
||||
1!
|
||||
b100 "
|
||||
b101010 #
|
||||
b100 %
|
||||
b10 &
|
||||
b1 '
|
||||
b10100 (
|
||||
#425
|
||||
0!
|
||||
#430
|
||||
1!
|
||||
b1010 (
|
||||
b10100 '
|
||||
b1 &
|
||||
b10 %
|
||||
b101011 #
|
||||
b10 "
|
||||
#435
|
||||
0!
|
||||
#440
|
||||
1!
|
||||
b1 "
|
||||
b101100 #
|
||||
b1 %
|
||||
b10100 &
|
||||
b1010 '
|
||||
b101 (
|
||||
#445
|
||||
0!
|
||||
#450
|
||||
1!
|
||||
b10110 (
|
||||
b101 '
|
||||
b1010 &
|
||||
b10100 %
|
||||
b101101 #
|
||||
b10100 "
|
||||
#455
|
||||
0!
|
||||
#460
|
||||
1!
|
||||
b1010 "
|
||||
b101110 #
|
||||
b1010 %
|
||||
b101 &
|
||||
b10110 '
|
||||
b1011 (
|
||||
#465
|
||||
0!
|
||||
#470
|
||||
1!
|
||||
b10001 (
|
||||
b1011 '
|
||||
b10110 &
|
||||
b101 %
|
||||
b101111 #
|
||||
b101 "
|
||||
#475
|
||||
0!
|
||||
#480
|
||||
1!
|
||||
b10110 "
|
||||
b110000 #
|
||||
b10110 %
|
||||
b1011 &
|
||||
b10001 '
|
||||
b11100 (
|
||||
#485
|
||||
0!
|
||||
#490
|
||||
1!
|
||||
b1110 (
|
||||
b11100 '
|
||||
b10001 &
|
||||
b1011 %
|
||||
b110001 #
|
||||
b1011 "
|
||||
#495
|
||||
0!
|
||||
#500
|
||||
1!
|
||||
b10001 "
|
||||
b110010 #
|
||||
b10001 %
|
||||
b11100 &
|
||||
b1110 '
|
||||
b111 (
|
||||
#505
|
||||
0!
|
||||
#510
|
||||
1!
|
||||
b10111 (
|
||||
b111 '
|
||||
b1110 &
|
||||
b11100 %
|
||||
b110011 #
|
||||
b11100 "
|
||||
#515
|
||||
0!
|
||||
#520
|
||||
1!
|
||||
b1110 "
|
||||
b110100 #
|
||||
b1110 %
|
||||
b111 &
|
||||
b10111 '
|
||||
b11111 (
|
||||
#525
|
||||
0!
|
||||
#530
|
||||
1!
|
||||
b11011 (
|
||||
b11111 '
|
||||
b10111 &
|
||||
b111 %
|
||||
b110101 #
|
||||
b111 "
|
||||
#535
|
||||
0!
|
||||
#540
|
||||
1!
|
||||
b10111 "
|
||||
b110110 #
|
||||
b10111 %
|
||||
b11111 &
|
||||
b11011 '
|
||||
b11001 (
|
||||
#545
|
||||
0!
|
||||
#550
|
||||
1!
|
||||
b11000 (
|
||||
b11001 '
|
||||
b11011 &
|
||||
b11111 %
|
||||
b110111 #
|
||||
b11111 "
|
||||
#555
|
||||
0!
|
||||
#560
|
||||
1!
|
||||
b11011 "
|
||||
b111000 #
|
||||
b11011 %
|
||||
b11001 &
|
||||
b11000 '
|
||||
b1100 (
|
||||
#565
|
||||
0!
|
||||
#570
|
||||
1!
|
||||
b110 (
|
||||
b1100 '
|
||||
b11000 &
|
||||
b11001 %
|
||||
b111001 #
|
||||
b11001 "
|
||||
#575
|
||||
0!
|
||||
#580
|
||||
1!
|
||||
b11000 "
|
||||
b111010 #
|
||||
b11000 %
|
||||
b1100 &
|
||||
b110 '
|
||||
b11 (
|
||||
#585
|
||||
0!
|
||||
#590
|
||||
1!
|
||||
b10101 (
|
||||
b11 '
|
||||
b110 &
|
||||
b1100 %
|
||||
b111011 #
|
||||
b1100 "
|
||||
#595
|
||||
0!
|
||||
#600
|
||||
1!
|
||||
b110 "
|
||||
b111100 #
|
||||
b110 %
|
||||
b11 &
|
||||
b10101 '
|
||||
b11110 (
|
||||
#605
|
||||
0!
|
||||
#610
|
||||
1!
|
||||
b1111 (
|
||||
b11110 '
|
||||
b10101 &
|
||||
b11 %
|
||||
b111101 #
|
||||
b11 "
|
||||
#615
|
||||
0!
|
||||
#620
|
||||
1!
|
||||
b10101 "
|
||||
b111110 #
|
||||
b10101 %
|
||||
b11110 &
|
||||
b1111 '
|
||||
b10011 (
|
||||
#625
|
||||
0!
|
||||
#630
|
||||
1!
|
||||
b11101 (
|
||||
b10011 '
|
||||
b1111 &
|
||||
b11110 %
|
||||
b111111 #
|
||||
b11110 "
|
||||
#635
|
||||
0!
|
||||
#640
|
||||
1!
|
||||
b1111 "
|
||||
b1000000 #
|
||||
b1111 %
|
||||
b10011 &
|
||||
b11101 '
|
||||
b11010 (
|
||||
#645
|
||||
0!
|
||||
#650
|
||||
1!
|
||||
b1101 (
|
||||
b11010 '
|
||||
b11101 &
|
||||
b10011 %
|
||||
b1000001 #
|
||||
b10011 "
|
||||
#655
|
||||
0!
|
||||
#660
|
||||
1!
|
||||
b11101 "
|
||||
b1000010 #
|
||||
b11101 %
|
||||
b11010 &
|
||||
b1101 '
|
||||
b10010 (
|
||||
#665
|
||||
0!
|
||||
#670
|
||||
1!
|
||||
b1001 (
|
||||
b10010 '
|
||||
b1101 &
|
||||
b11010 %
|
||||
b1000011 #
|
||||
b11010 "
|
||||
#675
|
||||
0!
|
||||
#680
|
||||
1!
|
||||
b1101 "
|
||||
b1000100 #
|
||||
b1101 %
|
||||
b10010 &
|
||||
b1001 '
|
||||
b10000 (
|
||||
#685
|
||||
0!
|
||||
#690
|
||||
1!
|
||||
b1000 (
|
||||
b10000 '
|
||||
b1001 &
|
||||
b10010 %
|
||||
b1000101 #
|
||||
b10010 "
|
||||
#695
|
||||
0!
|
||||
#700
|
||||
1!
|
||||
b1001 "
|
||||
b1000110 #
|
||||
b1001 %
|
||||
b10000 &
|
||||
b1000 '
|
||||
b100 (
|
||||
#705
|
||||
0!
|
||||
#710
|
||||
1!
|
||||
b10 (
|
||||
b100 '
|
||||
b1000 &
|
||||
b10000 %
|
||||
b1000111 #
|
||||
b10000 "
|
||||
#715
|
||||
0!
|
||||
#720
|
||||
1!
|
||||
b1000 "
|
||||
b1001000 #
|
||||
b1000 %
|
||||
b100 &
|
||||
b10 '
|
||||
b1 (
|
||||
#725
|
||||
0!
|
||||
#730
|
||||
1!
|
||||
b10100 (
|
||||
b1 '
|
||||
b10 &
|
||||
b100 %
|
||||
b1001001 #
|
||||
b100 "
|
||||
#735
|
||||
0!
|
||||
#740
|
||||
1!
|
||||
b10 "
|
||||
b1001010 #
|
||||
b10 %
|
||||
b1 &
|
||||
b10100 '
|
||||
b1010 (
|
||||
#745
|
||||
0!
|
||||
#750
|
||||
1!
|
||||
b101 (
|
||||
b1010 '
|
||||
b10100 &
|
||||
b1 %
|
||||
b1001011 #
|
||||
b1 "
|
||||
#755
|
||||
0!
|
||||
#760
|
||||
1!
|
||||
b10100 "
|
||||
b1001100 #
|
||||
b10100 %
|
||||
b1010 &
|
||||
b101 '
|
||||
b10110 (
|
||||
#765
|
||||
0!
|
||||
#770
|
||||
1!
|
||||
b1011 (
|
||||
b10110 '
|
||||
b101 &
|
||||
b1010 %
|
||||
b1001101 #
|
||||
b1010 "
|
||||
#775
|
||||
0!
|
||||
#780
|
||||
1!
|
||||
b101 "
|
||||
b1001110 #
|
||||
b101 %
|
||||
b10110 &
|
||||
b1011 '
|
||||
b10001 (
|
||||
#785
|
||||
0!
|
||||
#790
|
||||
1!
|
||||
b11100 (
|
||||
b10001 '
|
||||
b1011 &
|
||||
b10110 %
|
||||
b1001111 #
|
||||
b10110 "
|
||||
#795
|
||||
0!
|
||||
#800
|
||||
1!
|
||||
b1011 "
|
||||
b1010000 #
|
||||
b1011 %
|
||||
b10001 &
|
||||
b11100 '
|
||||
b1110 (
|
||||
#805
|
||||
0!
|
||||
#810
|
||||
1!
|
||||
b111 (
|
||||
b1110 '
|
||||
b11100 &
|
||||
b10001 %
|
||||
b1010001 #
|
||||
b10001 "
|
||||
#815
|
||||
0!
|
||||
#820
|
||||
1!
|
||||
b11100 "
|
||||
b1010010 #
|
||||
b11100 %
|
||||
b1110 &
|
||||
b111 '
|
||||
b10111 (
|
||||
#825
|
||||
0!
|
||||
#830
|
||||
1!
|
||||
b11111 (
|
||||
b10111 '
|
||||
b111 &
|
||||
b1110 %
|
||||
b1010011 #
|
||||
b1110 "
|
||||
#835
|
||||
0!
|
||||
#840
|
||||
1!
|
||||
b111 "
|
||||
b1010100 #
|
||||
b111 %
|
||||
b10111 &
|
||||
b11111 '
|
||||
b11011 (
|
||||
#845
|
||||
0!
|
||||
#850
|
||||
1!
|
||||
b11001 (
|
||||
b11011 '
|
||||
b11111 &
|
||||
b10111 %
|
||||
b1010101 #
|
||||
b10111 "
|
||||
#855
|
||||
0!
|
||||
#860
|
||||
1!
|
||||
b11111 "
|
||||
b1010110 #
|
||||
b11111 %
|
||||
b11011 &
|
||||
b11001 '
|
||||
b11000 (
|
||||
#865
|
||||
0!
|
||||
#870
|
||||
1!
|
||||
b1100 (
|
||||
b11000 '
|
||||
b11001 &
|
||||
b11011 %
|
||||
b1010111 #
|
||||
b11011 "
|
||||
#875
|
||||
0!
|
||||
#880
|
||||
1!
|
||||
b11001 "
|
||||
b1011000 #
|
||||
b11001 %
|
||||
b11000 &
|
||||
b1100 '
|
||||
b110 (
|
||||
#885
|
||||
0!
|
||||
#890
|
||||
1!
|
||||
b11 (
|
||||
b110 '
|
||||
b1100 &
|
||||
b11000 %
|
||||
b1011001 #
|
||||
b11000 "
|
||||
#895
|
||||
0!
|
||||
#900
|
||||
1!
|
||||
b1100 "
|
||||
b1011010 #
|
||||
b1100 %
|
||||
b110 &
|
||||
b11 '
|
||||
b10101 (
|
||||
#905
|
||||
0!
|
||||
#910
|
||||
1!
|
||||
b11110 (
|
||||
b10101 '
|
||||
b11 &
|
||||
b110 %
|
||||
b1011011 #
|
||||
b110 "
|
||||
#915
|
||||
0!
|
||||
#920
|
||||
1!
|
||||
b11 "
|
||||
b1011100 #
|
||||
b11 %
|
||||
b10101 &
|
||||
b11110 '
|
||||
b1111 (
|
||||
#925
|
||||
0!
|
||||
#930
|
||||
1!
|
||||
b10011 (
|
||||
b1111 '
|
||||
b11110 &
|
||||
b10101 %
|
||||
b1011101 #
|
||||
b10101 "
|
||||
#935
|
||||
0!
|
||||
#940
|
||||
1!
|
||||
b11110 "
|
||||
b1011110 #
|
||||
b11110 %
|
||||
b1111 &
|
||||
b10011 '
|
||||
b11101 (
|
||||
#945
|
||||
0!
|
||||
#950
|
||||
1!
|
||||
b11010 (
|
||||
b11101 '
|
||||
b10011 &
|
||||
b1111 %
|
||||
b1011111 #
|
||||
b1111 "
|
||||
#955
|
||||
0!
|
||||
#960
|
||||
1!
|
||||
b10011 "
|
||||
b1100000 #
|
||||
b10011 %
|
||||
b11101 &
|
||||
b11010 '
|
||||
b1101 (
|
||||
#965
|
||||
0!
|
||||
#970
|
||||
1!
|
||||
b10010 (
|
||||
b1101 '
|
||||
b11010 &
|
||||
b11101 %
|
||||
b1100001 #
|
||||
b11101 "
|
||||
#975
|
||||
0!
|
||||
#980
|
||||
1!
|
||||
b11010 "
|
||||
b1100010 #
|
||||
b11010 %
|
||||
b1101 &
|
||||
b10010 '
|
||||
b1001 (
|
||||
#985
|
||||
0!
|
||||
#990
|
||||
1!
|
||||
b10000 (
|
||||
b1001 '
|
||||
b10010 &
|
||||
b1101 %
|
||||
b1100011 #
|
||||
b1101 "
|
||||
#995
|
||||
0!
|
||||
#1000
|
||||
1!
|
||||
b10010 "
|
||||
b1100100 #
|
||||
b10010 %
|
||||
b1001 &
|
||||
b10000 '
|
||||
b1000 (
|
||||
|
|
@ -1,22 +0,0 @@
|
|||
#!/usr/bin/perl
|
||||
# This file ONLY is placed into the Public Domain, for any use,
|
||||
# Author: Yu-Sheng Lin johnjohnlys@media.ee.ntu.edu.tw
|
||||
|
||||
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
|
||||
|
||||
scenarios(vlt_all => 1);
|
||||
|
||||
compile(
|
||||
v_flags2 => ["--trace-lxt2"],
|
||||
);
|
||||
|
||||
execute(
|
||||
check_finished => 1,
|
||||
);
|
||||
|
||||
lxt2vcd($Self->trace_filename, "$Self->{obj_dir}/simx-lxt2vcd.vcd");
|
||||
vcd_identical("$Self->{obj_dir}/simx-lxt2vcd.vcd", "t/$Self->{name}.out");
|
||||
|
||||
ok(1);
|
||||
1;
|
||||
|
||||
|
|
@ -1,76 +0,0 @@
|
|||
// This file ONLY is placed into the Public Domain, for any use,
|
||||
// Author: Yu-Sheng Lin johnjohnlys@media.ee.ntu.edu.tw
|
||||
|
||||
module t (/*AUTOARG*/
|
||||
// Outputs
|
||||
state,
|
||||
// Inputs
|
||||
clk
|
||||
);
|
||||
|
||||
input clk;
|
||||
|
||||
int cyc;
|
||||
reg rstn;
|
||||
output [4:0] state;
|
||||
|
||||
Test test (/*AUTOINST*/
|
||||
// Outputs
|
||||
.state (state[4:0]),
|
||||
// Inputs
|
||||
.clk (clk),
|
||||
.rstn (rstn));
|
||||
|
||||
// Test loop
|
||||
always @ (posedge clk) begin
|
||||
cyc <= cyc + 1;
|
||||
if (cyc==0) begin
|
||||
// Setup
|
||||
rstn <= ~'1;
|
||||
end
|
||||
else if (cyc<10) begin
|
||||
rstn <= ~'1;
|
||||
end
|
||||
else if (cyc<90) begin
|
||||
rstn <= ~'0;
|
||||
end
|
||||
else if (cyc==99) begin
|
||||
$write("*-* All Finished *-*\n");
|
||||
$finish;
|
||||
end
|
||||
end
|
||||
|
||||
endmodule
|
||||
|
||||
|
||||
module Test (
|
||||
input clk,
|
||||
input rstn,
|
||||
output logic [4:0] state
|
||||
);
|
||||
|
||||
logic [4:0] state_w;
|
||||
logic [4:0] state_array [3];
|
||||
assign state = state_array[0];
|
||||
|
||||
always_comb begin
|
||||
state_w[4] = state_array[2][0];
|
||||
state_w[3] = state_array[2][4];
|
||||
state_w[2] = state_array[2][3] ^ state_array[2][0];
|
||||
state_w[1] = state_array[2][2];
|
||||
state_w[0] = state_array[2][1];
|
||||
end
|
||||
|
||||
always_ff @(posedge clk or negedge rstn) begin
|
||||
if (!rstn) begin
|
||||
for (int i = 0; i < 3; i++)
|
||||
state_array[i] <= 'b1;
|
||||
end
|
||||
else begin
|
||||
for (int i = 0; i < 2; i++)
|
||||
state_array[i] <= state_array[i+1];
|
||||
state_array[2] <= state_w;
|
||||
end
|
||||
end
|
||||
|
||||
endmodule
|
||||
|
|
@ -1,42 +0,0 @@
|
|||
$date
|
||||
Tue Aug 28 16:59:34 2018
|
||||
$end
|
||||
$version
|
||||
lxt2vcd
|
||||
$end
|
||||
$timescale 1ns $end
|
||||
$scope module top $end
|
||||
$var wire 1 ! clk $end
|
||||
$scope module t $end
|
||||
$var wire 32 " cnt [31:0] $end
|
||||
$var wire 96 # v(0) [95:0] $end
|
||||
$var wire 96 $ v(1) [95:0] $end
|
||||
$var wire 96 % v(2) [95:0] $end
|
||||
$var wire 1 ! clk $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
$dumpvars
|
||||
#0
|
||||
0!
|
||||
b0 "
|
||||
b1100000000000000000000000000100011000000000000000000000000000100110000000000000000000000000000 #
|
||||
b1000000000000000000000000000100010000000000000000000000000000100100000000000000000000000000000 $
|
||||
b100000000000000000000000000100001000000000000000000000000000100010000000000000000000000000000 %
|
||||
#10
|
||||
b1 "
|
||||
1!
|
||||
#15
|
||||
0!
|
||||
#20
|
||||
1!
|
||||
b10 "
|
||||
#25
|
||||
0!
|
||||
#30
|
||||
1!
|
||||
b11 "
|
||||
#35
|
||||
0!
|
||||
#40
|
||||
1!
|
||||
|
|
@ -1,26 +0,0 @@
|
|||
#!/usr/bin/perl
|
||||
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
|
||||
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
|
||||
#
|
||||
# Copyright 2003 by Wilson Snyder. This program is free software; you can
|
||||
# redistribute it and/or modify it under the terms of either the GNU
|
||||
# Lesser General Public License Version 3 or the Perl Artistic License
|
||||
# Version 2.0.
|
||||
|
||||
scenarios(simulator => 1);
|
||||
|
||||
top_filename("t/t_trace_packed_struct.v");
|
||||
|
||||
compile(
|
||||
v_flags2 => ["--trace-lxt2"]
|
||||
);
|
||||
|
||||
execute(
|
||||
check_finished => 1,
|
||||
);
|
||||
|
||||
lxt2vcd($Self->trace_filename, "$Self->{obj_dir}/simx-lxt2vcd.vcd");
|
||||
vcd_identical("$Self->{obj_dir}/simx-lxt2vcd.vcd", "t/$Self->{name}.out");
|
||||
|
||||
ok(1);
|
||||
1;
|
||||
|
|
@ -1,23 +0,0 @@
|
|||
#!/usr/bin/perl
|
||||
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
|
||||
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
|
||||
#
|
||||
# Copyright 2003-2013 by Wilson Snyder. This program is free software; you can
|
||||
# redistribute it and/or modify it under the terms of either the GNU
|
||||
# Lesser General Public License Version 3 or the Perl Artistic License
|
||||
# Version 2.0.
|
||||
|
||||
scenarios(vlt_all => 1);
|
||||
|
||||
top_filename("t/t_trace_param.v");
|
||||
|
||||
compile(
|
||||
v_flags2 => ["--trace-lxt2"],
|
||||
);
|
||||
|
||||
execute(
|
||||
check_finished => 1,
|
||||
);
|
||||
|
||||
ok(1);
|
||||
1;
|
||||
|
|
@ -1,23 +0,0 @@
|
|||
#!/usr/bin/perl
|
||||
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
|
||||
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
|
||||
#
|
||||
# Copyright 2003-2013 by Wilson Snyder. This program is free software; you can
|
||||
# redistribute it and/or modify it under the terms of either the GNU
|
||||
# Lesser General Public License Version 3 or the Perl Artistic License
|
||||
# Version 2.0.
|
||||
|
||||
scenarios(simulator => 1);
|
||||
|
||||
top_filename("t/t_trace_primitive.v");
|
||||
|
||||
compile(
|
||||
v_flags2 => ["--trace-lxt2"],
|
||||
);
|
||||
|
||||
execute(
|
||||
check_finished => 1,
|
||||
);
|
||||
|
||||
ok(1);
|
||||
1;
|
||||
|
|
@ -1,23 +0,0 @@
|
|||
#!/usr/bin/perl
|
||||
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
|
||||
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
|
||||
#
|
||||
# Copyright 2003 by Wilson Snyder. This program is free software; you can
|
||||
# redistribute it and/or modify it under the terms of either the GNU
|
||||
# Lesser General Public License Version 3 or the Perl Artistic License
|
||||
# Version 2.0.
|
||||
|
||||
scenarios(simulator => 1);
|
||||
|
||||
top_filename("t/t_trace_string.v");
|
||||
|
||||
compile(
|
||||
verilator_flags2 => ['--cc --trace'],
|
||||
);
|
||||
|
||||
execute(
|
||||
check_finished => 1,
|
||||
);
|
||||
|
||||
ok(1);
|
||||
1;
|
||||
|
|
@ -49,7 +49,6 @@ foreach my $dfile (glob("$Self->{obj_dir}/*.d")) {
|
|||
foreach my $file (sort keys %hit) {
|
||||
if (!$hit{$file}
|
||||
&& $file !~ /_sc/
|
||||
&& $file !~ /_lxt2/
|
||||
&& $file !~ /_fst/
|
||||
&& ($file !~ /_thread/ || $Self->cfg_with_threaded)) {
|
||||
error("Include file not covered by t_verilated_all test: ",$file);
|
||||
|
|
|
|||
Loading…
Reference in New Issue