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Make __Inlines.h file so we can build VL_CONST_W_#X funcs automatically 

git-svn-id: file://localhost/svn/verilator/trunk/verilator@974 77ca24e4-aefa-0310-84f0-b9a241c72d87
This commit is contained in:
Wilson Snyder 2007-11-30 22:38:21 +00:00
parent a94f1c779b
commit f23203dc96
13 changed files with 245 additions and 75 deletions
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5
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@ -3,6 +3,11 @@ Revision history for Verilator
The contributors that suggested a given feature are shown in []. [by ...]
indicates the contributor was also the author of the fix; Thanks!
* Verilator 3.655 ***
**** Wide VL_CONST_W_#X functions are now made automatically. [Bernard Deadman]
In such cases, a new {prefix}__Inlines.h file will be built and included.
* Verilator 3.655 11/27/2007
*** Support "#delay <statement>;" with associated STMTDLY warning.

1
bin/verilator
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@ -838,6 +838,7 @@ For -sp mode, instead of .cpp and .h it creates:
In certain optimization modes, it also creates:
{prefix}__Inlines.h // Inline support functions
{prefix}__Slow.cpp // Constructors and infrequent routines
{prefix}__Syms.cpp // Global symbol table C++
{prefix}__Syms.h // Global symbol table header

85
include/verilated.h
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@ -1288,123 +1288,60 @@ static inline WDataOutP VL_COND_WIWW(int obits, int, int, int,
// VL_CONST_W_#X(int obits, WDataOutP owp, IData data0, .... IData data(#-1))
// Sets wide vector words to specified constant words, zeros upper data.
// If changing the number of functions here, also change EMITCINLINES_NUM_CONSTW
#define I IData
#define _END(obits,wordsSet) \
for(int i=(wordsSet);i<VL_WORDS_I(obits);i++) o[i] = (IData)0x0; \
return o
#define VL_HAVE_CONST_W_1X
static inline WDataOutP VL_CONST_W_1X(int obits, WDataOutP o,
I d0) {
o[0]=d0;
_END(obits,1); }
#define VL_HAVE_CONST_W_2X
static inline WDataOutP VL_CONST_W_2X(int obits, WDataOutP o,
I d1,I d0) {
o[0]=d0; o[1]=d1;
_END(obits,2); }
#define VL_HAVE_CONST_W_3X
static inline WDataOutP VL_CONST_W_3X(int obits, WDataOutP o,
I d2,I d1,I d0) {
o[0]=d0; o[1]=d1; o[2]=d2;
_END(obits,3); }
#define VL_HAVE_CONST_W_4X
static inline WDataOutP VL_CONST_W_4X(int obits, WDataOutP o,
I d3,I d2,I d1,I d0) {
o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3;
_END(obits,4); }
#define VL_HAVE_CONST_W_5X
static inline WDataOutP VL_CONST_W_5X(int obits, WDataOutP o,
I d4,I d3,I d2,I d1,I d0) {
o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4;
_END(obits,5); }
#define VL_HAVE_CONST_W_6X
static inline WDataOutP VL_CONST_W_6X(int obits, WDataOutP o,
I d5,I d4,I d3,I d2,I d1,I d0) {
o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4; o[5]=d5;
_END(obits,6); }
#define VL_HAVE_CONST_W_7X
static inline WDataOutP VL_CONST_W_7X(int obits, WDataOutP o,
I d6,I d5,I d4,I d3,I d2,I d1,I d0) {
o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4; o[5]=d5; o[6]=d6;
_END(obits,7); }
#define VL_HAVE_CONST_W_8X
static inline WDataOutP VL_CONST_W_8X(int obits, WDataOutP o,
I d7,I d6,I d5,I d4,I d3,I d2,I d1,I d0) {
o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4; o[5]=d5; o[6]=d6; o[7]=d7;
_END(obits,8); }
#define VL_HAVE_CONST_W_9X
static inline WDataOutP VL_CONST_W_9X(int obits, WDataOutP o,
I d8,
I d7,I d6,I d5,I d4,I d3,I d2,I d1,I d0) {
o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4; o[5]=d5; o[6]=d6; o[7]=d7;
o[8]=d8;
_END(obits,9); }
static inline WDataOutP VL_CONST_W_10X(int obits, WDataOutP o,
I d9,I d8,
I d7,I d6,I d5,I d4,I d3,I d2,I d1,I d0) {
o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4; o[5]=d5; o[6]=d6; o[7]=d7;
o[8]=d8; o[9]=d9;
_END(obits,10); }
static inline WDataOutP VL_CONST_W_11X(int obits, WDataOutP o,
I d10,I d9,I d8,
I d7,I d6,I d5,I d4,I d3,I d2,I d1,I d0) {
o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4; o[5]=d5; o[6]=d6; o[7]=d7;
o[8]=d8; o[9]=d9; o[10]=d10;
_END(obits,11); }
static inline WDataOutP VL_CONST_W_12X(int obits, WDataOutP o,
I d11,I d10,I d9,I d8,
I d7,I d6,I d5,I d4,I d3,I d2,I d1,I d0) {
o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4; o[5]=d5; o[6]=d6; o[7]=d7;
o[8]=d8; o[9]=d9; o[10]=d10; o[11]=d11;
_END(obits,12); }
static inline WDataOutP VL_CONST_W_16X(int obits, WDataOutP o,
I d15,I d14,I d13,I d12,I d11,I d10,I d9,I d8,
I d7,I d6,I d5,I d4,I d3,I d2,I d1,I d0) {
o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4; o[5]=d5; o[6]=d6; o[7]=d7;
o[8]=d8; o[9]=d9; o[10]=d10; o[11]=d11; o[12]=d12; o[13]=d13; o[14]=d14; o[15]=d15;
_END(obits,16); }
static inline WDataOutP VL_CONST_W_17X(int obits, WDataOutP o,
I d16,
I d15,I d14,I d13,I d12,I d11,I d10,I d9,I d8,
I d7,I d6,I d5,I d4,I d3,I d2,I d1,I d0) {
o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4; o[5]=d5; o[6]=d6; o[7]=d7;
o[8]=d8; o[9]=d9; o[10]=d10; o[11]=d11; o[12]=d12; o[13]=d13; o[14]=d14; o[15]=d15;
o[16]=d16;
_END(obits,17); }
static inline WDataOutP VL_CONST_W_18X(int obits, WDataOutP o,
I d17,I d16,
I d15,I d14,I d13,I d12,I d11,I d10,I d9,I d8,
I d7,I d6,I d5,I d4,I d3,I d2,I d1,I d0) {
o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4; o[5]=d5; o[6]=d6; o[7]=d7;
o[8]=d8; o[9]=d9; o[10]=d10; o[11]=d11; o[12]=d12; o[13]=d13; o[14]=d14; o[15]=d15;
o[16]=d16; o[17]=d17;
_END(obits,18); }
static inline WDataOutP VL_CONST_W_19X(int obits, WDataOutP o,
I d18,I d17,I d16,
I d15,I d14,I d13,I d12,I d11,I d10,I d9,I d8,
I d7,I d6,I d5,I d4,I d3,I d2,I d1,I d0) {
o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4; o[5]=d5; o[6]=d6; o[7]=d7;
o[8]=d8; o[9]=d9; o[10]=d10; o[11]=d11; o[12]=d12; o[13]=d13; o[14]=d14; o[15]=d15;
o[16]=d16; o[17]=d17; o[18]=d18;
_END(obits,19); }
static inline WDataOutP VL_CONST_W_20X(int obits, WDataOutP o,
I d19,I d18,I d17,I d16,
I d15,I d14,I d13,I d12,I d11,I d10,I d9,I d8,
I d7,I d6,I d5,I d4,I d3,I d2,I d1,I d0) {
o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4; o[5]=d5; o[6]=d6; o[7]=d7;
o[8]=d8; o[9]=d9; o[10]=d10; o[11]=d11; o[12]=d12; o[13]=d13; o[14]=d14; o[15]=d15;
o[16]=d16; o[17]=d17; o[18]=d18; o[19]=d19;
_END(obits,20); }
static inline WDataOutP VL_CONST_W_24X(int obits, WDataOutP o,
I d23,I d22,I d21,I d20,I d19,I d18,I d17,I d16,
I d15,I d14,I d13,I d12,I d11,I d10,I d9,I d8,
I d7,I d6,I d5,I d4,I d3,I d2,I d1,I d0) {
o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4; o[5]=d5; o[6]=d6; o[7]=d7;
o[8]=d8; o[9]=d9; o[10]=d10; o[11]=d11; o[12]=d12; o[13]=d13; o[14]=d14; o[15]=d15;
o[16]=d16; o[17]=d17; o[18]=d18; o[19]=d19; o[20]=d20; o[21]=d21; o[22]=d22; o[23]=d23;
_END(obits,24); }
static inline WDataOutP VL_CONST_W_28X(int obits, WDataOutP o,
I d27,I d26,I d25,I d24,
I d23,I d22,I d21,I d20,I d19,I d18,I d17,I d16,
I d15,I d14,I d13,I d12,I d11,I d10,I d9,I d8,
I d7,I d6,I d5,I d4,I d3,I d2,I d1,I d0) {
o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4; o[5]=d5; o[6]=d6; o[7]=d7;
o[8]=d8; o[9]=d9; o[10]=d10; o[11]=d11; o[12]=d12; o[13]=d13; o[14]=d14; o[15]=d15;
o[16]=d16; o[17]=d17; o[18]=d18; o[19]=d19; o[20]=d20; o[21]=d21; o[22]=d22; o[23]=d23;
o[24]=d24; o[25]=d25; o[26]=d26; o[27]=d27;
_END(obits,28); }
#undef _END
#undef I

1
src/Makefile_obj.in
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@ -121,6 +121,7 @@ RAW_OBJS = \
V3DepthBlock.o \
V3Descope.o \
V3EmitC.o \
V3EmitCInlines.o \
V3EmitCSyms.o \
V3EmitMk.o \
V3EmitV.o \

3
src/V3EmitC.cpp
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@ -1428,6 +1428,9 @@ void EmitCImp::emitInt(AstModule* modp) {
if (v3Global.opt.coverage()) {
puts("#include \"SpCoverage.h\"\n");
}
if (v3Global.needHInlines()) { // Set by V3EmitCInlines; should have been called before us
puts("#include \""+topClassName()+"__Inlines.h\"\n");
}
// Declare foreign instances up front to make C++ happy
puts("class "+symClassName()+";\n");

1
src/V3EmitC.h
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@ -31,6 +31,7 @@
class V3EmitC {
public:
static void emitc();
static void emitcInlines();
static void emitcSyms();
static void emitcTrace();
};

126
src/V3EmitCInlines.cpp Normal file
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@ -0,0 +1,126 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Emit C++ for tree
//
// Code available from: http://www.veripool.com/verilator
//
// AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
//
//*************************************************************************
//
// Copyright 2003-2007 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
// Verilator is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
//*************************************************************************
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <unistd.h>
#include <math.h>
#include <map>
#include <vector>
#include "V3Global.h"
#include "V3EmitC.h"
#include "V3EmitCBase.h"
#include "V3Stats.h"
#define EMITCINLINES_NUM_CONSTW 10 // Number of VL_CONST_W_*X's in verilated.h (IE VL_CONST_W_9X is last)
//######################################################################
class EmitCInlines : EmitCBaseVisitor {
// STATE
vector<V3Double0> m_wordWidths; // What sizes are used?
// METHODS
void emitInt();
// VISITORS
virtual void visit(AstVar* nodep, AstNUser*) {
// All wide constants load into variables, so we can just hunt for them
if (nodep->widthWords() >= EMITCINLINES_NUM_CONSTW ) {
if (int(m_wordWidths.size()) <= nodep->widthWords()) {
m_wordWidths.resize(nodep->widthWords()+5);
}
++ m_wordWidths.at(nodep->widthWords());
v3Global.needHInlines(true);
}
}
// NOPs
virtual void visit(AstNodeStmt*, AstNUser*) {}
// Default
virtual void visit(AstNode* nodep, AstNUser*) {
nodep->iterateChildren(*this);
}
//---------------------------------------
// ACCESSORS
public:
EmitCInlines(AstNetlist* nodep) {
nodep->accept(*this);
if (v3Global.needHInlines()) {
emitInt();
}
}
};
void EmitCInlines::emitInt() {
string filename = v3Global.opt.makeDir()+"/"+topClassName()+"__Inlines.h";
newCFile(filename, false/*slow*/, false/*source*/);
V3OutCFile hf (filename);
m_ofp = &hf;
ofp()->putsHeader();
puts("#ifndef _"+topClassName()+"__Inlines_H_\n");
puts("#define _"+topClassName()+"__Inlines_H_\n");
puts("\n");
puts("#include \"verilated.h\"\n");
puts("\n//======================\n\n");
for (unsigned words=0; words<m_wordWidths.size(); words++) {
if (m_wordWidths.at(words)) {
puts("#ifndef VL_HAVE_CONST_W_"+cvtToStr(words)+"X\n");
puts("# define VL_HAVE_CONST_W_"+cvtToStr(words)+"X\n");
puts("static inline WDataOutP VL_CONST_W_"+cvtToStr(words)+"X(int obits, WDataOutP o\n");
puts("\t");
for (int i=words-1; i>=0; --i) {
puts(",IData d"+cvtToStr(i));
if (i && (i % 8 == 0)) puts("\n\t");
}
puts(") {\n");
puts(" ");
for (int i=words-1; i>=0; --i) {
puts(" o["+cvtToStr(i)+"]=d"+cvtToStr(i)+";");
if (i && (i % 8 == 0)) puts("\n ");
}
puts("\n");
puts(" for(int i="+cvtToStr(words)+";i<VL_WORDS_I(obits);i++) o[i] = (IData)0x0;\n");
puts(" return o;\n");
puts("}\n");
puts("#endif\n");
puts("\n");
}
}
puts("//======================\n\n");
puts("#endif /*guard*/\n");
}
//######################################################################
// EmitC class functions
void V3EmitC::emitcInlines() {
UINFO(2,__FUNCTION__<<": "<<endl);
EmitCInlines syms (v3Global.rootp());
}

7
src/V3Global.h
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@ -42,8 +42,10 @@ class V3Global {
AstNetlist* m_rootp; // Root of entire netlist
int m_debugFileNumber; // Number to append to debug files created
bool m_assertWidthsSame; // Tree should have width()==widthMin()
// Options
bool m_needHInlines; // Need a __Inlines file
public:
// Options
V3Options opt; // All options; let user see them directly
public:
@ -52,6 +54,7 @@ public:
m_rootp = new AstNetlist;
m_debugFileNumber = 0;
m_assertWidthsSame = false;
m_needHInlines = false;
}
void clear() {
if (m_rootp) m_rootp->deleteTree(); m_rootp=NULL;
@ -70,6 +73,8 @@ public:
char digits[100]; sprintf(digits, "%02d", m_debugFileNumber);
return opt.makeDir()+"/"+opt.prefix()+"_"+digits+"_"+nameComment;
}
bool needHInlines() const { return m_needHInlines; }
void needHInlines(bool flag) { m_needHInlines=flag; }
};
extern V3Global v3Global;

2
src/Verilator.cpp
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@ -459,6 +459,8 @@ void process () {
// Output the text
if (!v3Global.opt.lintOnly()) {
// emitcInlines is first, as it may set needHInlines which other emitters read
V3EmitC::emitcInlines();
V3EmitC::emitcSyms();
V3EmitC::emitcTrace();
}

19
test_regress/t/t_emit_constw.pl Executable file
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@ -0,0 +1,19 @@
#!/usr/bin/perl
if (!$::Driver) { use FindBin; exec("./driver.pl", @ARGV, $0); die; }
# $Id$
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# General Public License or the Perl Artistic License.
compile (
v_flags2 => [$Last_Self->{v3}?'--Ox':''],
);
execute (
check_finished=>1,
);
ok(1);
1;

70
test_regress/t/t_emit_constw.v Normal file
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@ -0,0 +1,70 @@
// $Id$
// DESCRIPTION: Verilator: Verilog Test module
module t (/*AUTOARG*/
// Inputs
clk
);
input clk;
integer cyc=0;
reg [63:0] crc;
reg [63:0] sum;
reg [2*32-1:0] w2; initial w2 = {2 {32'h12345678}};
reg [9*32-1:0] w9; initial w9 = {9 {32'h12345678}};
reg [10*32-1:0] w10; initial w10 = {10{32'h12345678}};
reg [11*32-1:0] w11; initial w11 = {11{32'h12345678}};
reg [15*32-1:0] w15; initial w15 = {15{32'h12345678}};
reg [31*32-1:0] w31; initial w31 = {31{32'h12345678}};
reg [47*32-1:0] w47; initial w47 = {47{32'h12345678}};
reg [63*32-1:0] w63; initial w63 = {63{32'h12345678}};
// Aggregate outputs into a single result vector
wire [63:0] result = (w2[63:0]
^ w9[64:1]
^ w10[65:2]
^ w11[66:3]
^ w15[67:4]
^ w31[68:5]
^ w47[69:6]
^ w63[70:7]);
// What checksum will we end up with
`define EXPECTED_SUM 64'h184cb39122d8c6e3
// Test loop
always @ (posedge clk) begin
`ifdef TEST_VERBOSE
$write("[%0t] cyc==%0d crc=%x result=%x\n",$time, cyc, crc, result);
`endif
cyc <= cyc + 1;
crc <= {crc[62:0], crc[63]^crc[2]^crc[0]};
sum <= result ^ {sum[62:0],sum[63]^sum[2]^sum[0]};
if (cyc==0) begin
// Setup
crc <= 64'h5aef0c8d_d70a4497;
end
else if (cyc<10) begin
sum <= 64'h0;
end
else if (cyc<90) begin
w2 <= w2 >> 1;
w9 <= w9 >> 1;
w10 <= w10 >> 1;
w11 <= w11 >> 1;
w15 <= w15 >> 1;
w31 <= w31 >> 1;
w47 <= w47 >> 1;
w63 <= w63 >> 1;
end
else if (cyc==99) begin
$write("[%0t] cyc==%0d crc=%x sum=%x\n",$time, cyc, crc, sum);
if (crc !== 64'hc77bb9b3784ea091) $stop;
if (sum !== `EXPECTED_SUM) $stop;
$write("*-* All Finished *-*\n");
$finish;
end
end
endmodule

0
test_regress/t/t_equal.pl → test_regress/t/t_math_equal.pl
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0
test_regress/t/t_equal.v → test_regress/t/t_math_equal.v
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