Tests: Reformat. Ignore whitespace if comparing. No test functional change.

This commit is contained in:
Wilson Snyder 2025-07-16 21:31:40 -04:00
parent 7f1011e5f7
commit fb1373b854
9 changed files with 1877 additions and 1885 deletions

View File

@ -12,17 +12,9 @@ module t_case_huge_sub (/*AUTOARG*/
);
input [7:0] index;
output [9:0] outa;
output [1:0] outb;
output outc;
// =============================
/*AUTOREG*/
// Beginning of automatic regs (for this module's undeclared outputs)
reg [9:0] outa;
reg [1:0] outb;
reg outc;
// End of automatics
output logic [9:0] outa;
output logic [1:0] outb;
output logic outc;
// =============================
// Created from Python3:
@ -31,7 +23,8 @@ module t_case_huge_sub (/*AUTOARG*/
// % (i, random.randint(0,1024), random.randint(0,1),
// random.randint(0,1), random.randint(0,1)))
always @(/*AS*/index) begin
always @* begin
// verilog_format: off
case (index)
8'h00: begin outa = 10'h152; outb = 2'b00; outc = 1'b1; end
8'h01: begin outa = 10'h318; outb = 2'b11; outc = 1'b1; end
@ -290,5 +283,6 @@ module t_case_huge_sub (/*AUTOARG*/
8'hfe: begin outa = 10'h012; outb = 2'b00; outc = 1'b0; end
8'hff: begin outa = 10'h114; outb = 2'b10; outc = 1'b1; end
endcase
// verilog_format: on
end
endmodule

View File

@ -12,13 +12,7 @@ module t_case_huge_sub2 (/*AUTOARG*/
);
input [9:0] index;
output [9:0] outa;
// =============================
/*AUTOREG*/
// Beginning of automatic regs (for this module's undeclared outputs)
reg [9:0] outa;
// End of automatics
output logic [9:0] outa;
// =============================
// Created from Python3:
@ -30,265 +24,267 @@ module t_case_huge_sub2 (/*AUTOARG*/
always @(/*AS*/index) begin
case (index[7:0])
`ifdef VERILATOR // Harder test
8'h00: begin outa = $c("0"); end // Makes whole table non-optimizable
8'h00: begin
outa = $c("0");
end // Makes whole table non-optimizable
`else
8'h00: begin outa = 10'h0; end
8'h00: outa = 10'h0;
`endif
8'h01: begin outa = 10'h318; end
8'h02: begin outa = 10'h29f; end
8'h03: begin outa = 10'h392; end
8'h04: begin outa = 10'h1ef; end
8'h05: begin outa = 10'h06c; end
8'h06: begin outa = 10'h29f; end
8'h07: begin outa = 10'h29a; end
8'h08: begin outa = 10'h3ce; end
8'h09: begin outa = 10'h37c; end
8'h0a: begin outa = 10'h058; end
8'h0b: begin outa = 10'h3b2; end
8'h0c: begin outa = 10'h36f; end
8'h0d: begin outa = 10'h2c5; end
8'h0e: begin outa = 10'h23a; end
8'h0f: begin outa = 10'h222; end
8'h10: begin outa = 10'h328; end
8'h11: begin outa = 10'h3c3; end
8'h12: begin outa = 10'h12c; end
8'h13: begin outa = 10'h1d0; end
8'h14: begin outa = 10'h3ff; end
8'h15: begin outa = 10'h115; end
8'h16: begin outa = 10'h3ba; end
8'h17: begin outa = 10'h3ba; end
8'h18: begin outa = 10'h10d; end
8'h19: begin outa = 10'h13b; end
8'h1a: begin outa = 10'h0a0; end
8'h1b: begin outa = 10'h264; end
8'h1c: begin outa = 10'h3a2; end
8'h1d: begin outa = 10'h07c; end
8'h1e: begin outa = 10'h291; end
8'h1f: begin outa = 10'h1d1; end
8'h20: begin outa = 10'h354; end
8'h21: begin outa = 10'h0c0; end
8'h22: begin outa = 10'h191; end
8'h23: begin outa = 10'h379; end
8'h24: begin outa = 10'h073; end
8'h25: begin outa = 10'h2fd; end
8'h26: begin outa = 10'h2e0; end
8'h27: begin outa = 10'h337; end
8'h28: begin outa = 10'h2c7; end
8'h29: begin outa = 10'h19e; end
8'h2a: begin outa = 10'h107; end
8'h2b: begin outa = 10'h06a; end
8'h2c: begin outa = 10'h1c7; end
8'h2d: begin outa = 10'h107; end
8'h2e: begin outa = 10'h0cf; end
8'h2f: begin outa = 10'h009; end
8'h30: begin outa = 10'h09d; end
8'h31: begin outa = 10'h28e; end
8'h32: begin outa = 10'h010; end
8'h33: begin outa = 10'h1e0; end
8'h34: begin outa = 10'h079; end
8'h35: begin outa = 10'h13e; end
8'h36: begin outa = 10'h282; end
8'h37: begin outa = 10'h21c; end
8'h38: begin outa = 10'h148; end
8'h39: begin outa = 10'h3c0; end
8'h3a: begin outa = 10'h176; end
8'h3b: begin outa = 10'h3fc; end
8'h3c: begin outa = 10'h295; end
8'h3d: begin outa = 10'h113; end
8'h3e: begin outa = 10'h354; end
8'h3f: begin outa = 10'h0db; end
8'h40: begin outa = 10'h238; end
8'h41: begin outa = 10'h12b; end
8'h42: begin outa = 10'h1dc; end
8'h43: begin outa = 10'h137; end
8'h44: begin outa = 10'h1e2; end
8'h45: begin outa = 10'h3d5; end
8'h46: begin outa = 10'h30c; end
8'h47: begin outa = 10'h298; end
8'h48: begin outa = 10'h080; end
8'h49: begin outa = 10'h35a; end
8'h4a: begin outa = 10'h01b; end
8'h4b: begin outa = 10'h0a3; end
8'h4c: begin outa = 10'h0b3; end
8'h4d: begin outa = 10'h17a; end
8'h4e: begin outa = 10'h3ae; end
8'h4f: begin outa = 10'h078; end
8'h50: begin outa = 10'h322; end
8'h51: begin outa = 10'h213; end
8'h52: begin outa = 10'h11a; end
8'h53: begin outa = 10'h1a7; end
8'h54: begin outa = 10'h35a; end
8'h55: begin outa = 10'h233; end
8'h56: begin outa = 10'h01d; end
8'h57: begin outa = 10'h2d5; end
8'h58: begin outa = 10'h1a0; end
8'h59: begin outa = 10'h3d0; end
8'h5a: begin outa = 10'h181; end
8'h5b: begin outa = 10'h219; end
8'h5c: begin outa = 10'h26a; end
8'h5d: begin outa = 10'h050; end
8'h5e: begin outa = 10'h189; end
8'h5f: begin outa = 10'h1eb; end
8'h60: begin outa = 10'h224; end
8'h61: begin outa = 10'h2fe; end
8'h62: begin outa = 10'h0ae; end
8'h63: begin outa = 10'h1cd; end
8'h64: begin outa = 10'h273; end
8'h65: begin outa = 10'h268; end
8'h66: begin outa = 10'h111; end
8'h67: begin outa = 10'h1f9; end
8'h68: begin outa = 10'h232; end
8'h69: begin outa = 10'h255; end
8'h6a: begin outa = 10'h34c; end
8'h6b: begin outa = 10'h049; end
8'h6c: begin outa = 10'h197; end
8'h6d: begin outa = 10'h0fe; end
8'h6e: begin outa = 10'h253; end
8'h6f: begin outa = 10'h2de; end
8'h70: begin outa = 10'h13b; end
8'h71: begin outa = 10'h040; end
8'h72: begin outa = 10'h0b4; end
8'h73: begin outa = 10'h233; end
8'h74: begin outa = 10'h198; end
8'h75: begin outa = 10'h018; end
8'h76: begin outa = 10'h2f7; end
8'h77: begin outa = 10'h134; end
8'h78: begin outa = 10'h1ca; end
8'h79: begin outa = 10'h286; end
8'h7a: begin outa = 10'h0e6; end
8'h7b: begin outa = 10'h064; end
8'h7c: begin outa = 10'h257; end
8'h7d: begin outa = 10'h31a; end
8'h7e: begin outa = 10'h247; end
8'h7f: begin outa = 10'h299; end
8'h80: begin outa = 10'h02c; end
8'h81: begin outa = 10'h2bb; end
8'h82: begin outa = 10'h180; end
8'h83: begin outa = 10'h245; end
8'h84: begin outa = 10'h0da; end
8'h85: begin outa = 10'h367; end
8'h86: begin outa = 10'h304; end
8'h87: begin outa = 10'h38b; end
8'h88: begin outa = 10'h09f; end
8'h89: begin outa = 10'h1f0; end
8'h8a: begin outa = 10'h281; end
8'h8b: begin outa = 10'h019; end
8'h8c: begin outa = 10'h1f2; end
8'h8d: begin outa = 10'h0b1; end
8'h8e: begin outa = 10'h058; end
8'h8f: begin outa = 10'h39b; end
8'h90: begin outa = 10'h2ec; end
8'h91: begin outa = 10'h250; end
8'h92: begin outa = 10'h3f4; end
8'h93: begin outa = 10'h057; end
8'h94: begin outa = 10'h18f; end
8'h95: begin outa = 10'h105; end
8'h96: begin outa = 10'h1ae; end
8'h97: begin outa = 10'h04e; end
8'h98: begin outa = 10'h240; end
8'h99: begin outa = 10'h3e4; end
8'h9a: begin outa = 10'h3c6; end
8'h9b: begin outa = 10'h109; end
8'h9c: begin outa = 10'h073; end
8'h9d: begin outa = 10'h19f; end
8'h9e: begin outa = 10'h3b8; end
8'h9f: begin outa = 10'h00e; end
8'ha0: begin outa = 10'h1b3; end
8'ha1: begin outa = 10'h2bd; end
8'ha2: begin outa = 10'h324; end
8'ha3: begin outa = 10'h343; end
8'ha4: begin outa = 10'h1c9; end
8'ha5: begin outa = 10'h185; end
8'ha6: begin outa = 10'h37a; end
8'ha7: begin outa = 10'h0e0; end
8'ha8: begin outa = 10'h0a3; end
8'ha9: begin outa = 10'h019; end
8'haa: begin outa = 10'h099; end
8'hab: begin outa = 10'h376; end
8'hac: begin outa = 10'h077; end
8'had: begin outa = 10'h2b1; end
8'hae: begin outa = 10'h27f; end
8'haf: begin outa = 10'h265; end
8'hb0: begin outa = 10'h156; end
8'hb1: begin outa = 10'h1ce; end
8'hb2: begin outa = 10'h008; end
8'hb3: begin outa = 10'h12e; end
8'hb4: begin outa = 10'h199; end
8'hb5: begin outa = 10'h330; end
8'hb6: begin outa = 10'h1ab; end
8'hb7: begin outa = 10'h3bd; end
8'hb8: begin outa = 10'h0ca; end
8'hb9: begin outa = 10'h367; end
8'hba: begin outa = 10'h334; end
8'hbb: begin outa = 10'h040; end
8'hbc: begin outa = 10'h1a7; end
8'hbd: begin outa = 10'h036; end
8'hbe: begin outa = 10'h223; end
8'hbf: begin outa = 10'h075; end
8'hc0: begin outa = 10'h3c4; end
8'hc1: begin outa = 10'h2cc; end
8'hc2: begin outa = 10'h123; end
8'hc3: begin outa = 10'h3fd; end
8'hc4: begin outa = 10'h11e; end
8'hc5: begin outa = 10'h27c; end
8'hc6: begin outa = 10'h1e2; end
8'hc7: begin outa = 10'h377; end
8'hc8: begin outa = 10'h33a; end
8'hc9: begin outa = 10'h32d; end
8'hca: begin outa = 10'h014; end
8'hcb: begin outa = 10'h332; end
8'hcc: begin outa = 10'h359; end
8'hcd: begin outa = 10'h0a4; end
8'hce: begin outa = 10'h348; end
8'hcf: begin outa = 10'h04b; end
8'hd0: begin outa = 10'h147; end
8'hd1: begin outa = 10'h026; end
8'hd2: begin outa = 10'h103; end
8'hd3: begin outa = 10'h106; end
8'hd4: begin outa = 10'h35a; end
8'hd5: begin outa = 10'h254; end
8'hd6: begin outa = 10'h0cd; end
8'hd7: begin outa = 10'h17c; end
8'hd8: begin outa = 10'h37e; end
8'hd9: begin outa = 10'h0a9; end
8'hda: begin outa = 10'h0fe; end
8'hdb: begin outa = 10'h3c0; end
8'hdc: begin outa = 10'h1d9; end
8'hdd: begin outa = 10'h10e; end
8'hde: begin outa = 10'h394; end
8'hdf: begin outa = 10'h316; end
8'he0: begin outa = 10'h05b; end
8'he1: begin outa = 10'h126; end
8'he2: begin outa = 10'h369; end
8'he3: begin outa = 10'h291; end
8'he4: begin outa = 10'h2ca; end
8'he5: begin outa = 10'h25b; end
8'he6: begin outa = 10'h106; end
8'he7: begin outa = 10'h172; end
8'he8: begin outa = 10'h2f7; end
8'he9: begin outa = 10'h2d3; end
8'hea: begin outa = 10'h182; end
8'heb: begin outa = 10'h327; end
8'hec: begin outa = 10'h1d0; end
8'hed: begin outa = 10'h204; end
8'hee: begin outa = 10'h11f; end
8'hef: begin outa = 10'h365; end
8'hf0: begin outa = 10'h2c2; end
8'hf1: begin outa = 10'h2b5; end
8'hf2: begin outa = 10'h1f8; end
8'hf3: begin outa = 10'h2a7; end
8'hf4: begin outa = 10'h1be; end
8'hf5: begin outa = 10'h25e; end
8'hf6: begin outa = 10'h032; end
8'hf7: begin outa = 10'h2ef; end
8'hf8: begin outa = 10'h02f; end
8'hf9: begin outa = 10'h201; end
8'hfa: begin outa = 10'h054; end
8'hfb: begin outa = 10'h013; end
8'hfc: begin outa = 10'h249; end
8'hfd: begin outa = 10'h09a; end
8'hfe: begin outa = 10'h012; end
8'hff: begin outa = 10'h114; end
8'h01: outa = 10'h318;
8'h02: outa = 10'h29f;
8'h03: outa = 10'h392;
8'h04: outa = 10'h1ef;
8'h05: outa = 10'h06c;
8'h06: outa = 10'h29f;
8'h07: outa = 10'h29a;
8'h08: outa = 10'h3ce;
8'h09: outa = 10'h37c;
8'h0a: outa = 10'h058;
8'h0b: outa = 10'h3b2;
8'h0c: outa = 10'h36f;
8'h0d: outa = 10'h2c5;
8'h0e: outa = 10'h23a;
8'h0f: outa = 10'h222;
8'h10: outa = 10'h328;
8'h11: outa = 10'h3c3;
8'h12: outa = 10'h12c;
8'h13: outa = 10'h1d0;
8'h14: outa = 10'h3ff;
8'h15: outa = 10'h115;
8'h16: outa = 10'h3ba;
8'h17: outa = 10'h3ba;
8'h18: outa = 10'h10d;
8'h19: outa = 10'h13b;
8'h1a: outa = 10'h0a0;
8'h1b: outa = 10'h264;
8'h1c: outa = 10'h3a2;
8'h1d: outa = 10'h07c;
8'h1e: outa = 10'h291;
8'h1f: outa = 10'h1d1;
8'h20: outa = 10'h354;
8'h21: outa = 10'h0c0;
8'h22: outa = 10'h191;
8'h23: outa = 10'h379;
8'h24: outa = 10'h073;
8'h25: outa = 10'h2fd;
8'h26: outa = 10'h2e0;
8'h27: outa = 10'h337;
8'h28: outa = 10'h2c7;
8'h29: outa = 10'h19e;
8'h2a: outa = 10'h107;
8'h2b: outa = 10'h06a;
8'h2c: outa = 10'h1c7;
8'h2d: outa = 10'h107;
8'h2e: outa = 10'h0cf;
8'h2f: outa = 10'h009;
8'h30: outa = 10'h09d;
8'h31: outa = 10'h28e;
8'h32: outa = 10'h010;
8'h33: outa = 10'h1e0;
8'h34: outa = 10'h079;
8'h35: outa = 10'h13e;
8'h36: outa = 10'h282;
8'h37: outa = 10'h21c;
8'h38: outa = 10'h148;
8'h39: outa = 10'h3c0;
8'h3a: outa = 10'h176;
8'h3b: outa = 10'h3fc;
8'h3c: outa = 10'h295;
8'h3d: outa = 10'h113;
8'h3e: outa = 10'h354;
8'h3f: outa = 10'h0db;
8'h40: outa = 10'h238;
8'h41: outa = 10'h12b;
8'h42: outa = 10'h1dc;
8'h43: outa = 10'h137;
8'h44: outa = 10'h1e2;
8'h45: outa = 10'h3d5;
8'h46: outa = 10'h30c;
8'h47: outa = 10'h298;
8'h48: outa = 10'h080;
8'h49: outa = 10'h35a;
8'h4a: outa = 10'h01b;
8'h4b: outa = 10'h0a3;
8'h4c: outa = 10'h0b3;
8'h4d: outa = 10'h17a;
8'h4e: outa = 10'h3ae;
8'h4f: outa = 10'h078;
8'h50: outa = 10'h322;
8'h51: outa = 10'h213;
8'h52: outa = 10'h11a;
8'h53: outa = 10'h1a7;
8'h54: outa = 10'h35a;
8'h55: outa = 10'h233;
8'h56: outa = 10'h01d;
8'h57: outa = 10'h2d5;
8'h58: outa = 10'h1a0;
8'h59: outa = 10'h3d0;
8'h5a: outa = 10'h181;
8'h5b: outa = 10'h219;
8'h5c: outa = 10'h26a;
8'h5d: outa = 10'h050;
8'h5e: outa = 10'h189;
8'h5f: outa = 10'h1eb;
8'h60: outa = 10'h224;
8'h61: outa = 10'h2fe;
8'h62: outa = 10'h0ae;
8'h63: outa = 10'h1cd;
8'h64: outa = 10'h273;
8'h65: outa = 10'h268;
8'h66: outa = 10'h111;
8'h67: outa = 10'h1f9;
8'h68: outa = 10'h232;
8'h69: outa = 10'h255;
8'h6a: outa = 10'h34c;
8'h6b: outa = 10'h049;
8'h6c: outa = 10'h197;
8'h6d: outa = 10'h0fe;
8'h6e: outa = 10'h253;
8'h6f: outa = 10'h2de;
8'h70: outa = 10'h13b;
8'h71: outa = 10'h040;
8'h72: outa = 10'h0b4;
8'h73: outa = 10'h233;
8'h74: outa = 10'h198;
8'h75: outa = 10'h018;
8'h76: outa = 10'h2f7;
8'h77: outa = 10'h134;
8'h78: outa = 10'h1ca;
8'h79: outa = 10'h286;
8'h7a: outa = 10'h0e6;
8'h7b: outa = 10'h064;
8'h7c: outa = 10'h257;
8'h7d: outa = 10'h31a;
8'h7e: outa = 10'h247;
8'h7f: outa = 10'h299;
8'h80: outa = 10'h02c;
8'h81: outa = 10'h2bb;
8'h82: outa = 10'h180;
8'h83: outa = 10'h245;
8'h84: outa = 10'h0da;
8'h85: outa = 10'h367;
8'h86: outa = 10'h304;
8'h87: outa = 10'h38b;
8'h88: outa = 10'h09f;
8'h89: outa = 10'h1f0;
8'h8a: outa = 10'h281;
8'h8b: outa = 10'h019;
8'h8c: outa = 10'h1f2;
8'h8d: outa = 10'h0b1;
8'h8e: outa = 10'h058;
8'h8f: outa = 10'h39b;
8'h90: outa = 10'h2ec;
8'h91: outa = 10'h250;
8'h92: outa = 10'h3f4;
8'h93: outa = 10'h057;
8'h94: outa = 10'h18f;
8'h95: outa = 10'h105;
8'h96: outa = 10'h1ae;
8'h97: outa = 10'h04e;
8'h98: outa = 10'h240;
8'h99: outa = 10'h3e4;
8'h9a: outa = 10'h3c6;
8'h9b: outa = 10'h109;
8'h9c: outa = 10'h073;
8'h9d: outa = 10'h19f;
8'h9e: outa = 10'h3b8;
8'h9f: outa = 10'h00e;
8'ha0: outa = 10'h1b3;
8'ha1: outa = 10'h2bd;
8'ha2: outa = 10'h324;
8'ha3: outa = 10'h343;
8'ha4: outa = 10'h1c9;
8'ha5: outa = 10'h185;
8'ha6: outa = 10'h37a;
8'ha7: outa = 10'h0e0;
8'ha8: outa = 10'h0a3;
8'ha9: outa = 10'h019;
8'haa: outa = 10'h099;
8'hab: outa = 10'h376;
8'hac: outa = 10'h077;
8'had: outa = 10'h2b1;
8'hae: outa = 10'h27f;
8'haf: outa = 10'h265;
8'hb0: outa = 10'h156;
8'hb1: outa = 10'h1ce;
8'hb2: outa = 10'h008;
8'hb3: outa = 10'h12e;
8'hb4: outa = 10'h199;
8'hb5: outa = 10'h330;
8'hb6: outa = 10'h1ab;
8'hb7: outa = 10'h3bd;
8'hb8: outa = 10'h0ca;
8'hb9: outa = 10'h367;
8'hba: outa = 10'h334;
8'hbb: outa = 10'h040;
8'hbc: outa = 10'h1a7;
8'hbd: outa = 10'h036;
8'hbe: outa = 10'h223;
8'hbf: outa = 10'h075;
8'hc0: outa = 10'h3c4;
8'hc1: outa = 10'h2cc;
8'hc2: outa = 10'h123;
8'hc3: outa = 10'h3fd;
8'hc4: outa = 10'h11e;
8'hc5: outa = 10'h27c;
8'hc6: outa = 10'h1e2;
8'hc7: outa = 10'h377;
8'hc8: outa = 10'h33a;
8'hc9: outa = 10'h32d;
8'hca: outa = 10'h014;
8'hcb: outa = 10'h332;
8'hcc: outa = 10'h359;
8'hcd: outa = 10'h0a4;
8'hce: outa = 10'h348;
8'hcf: outa = 10'h04b;
8'hd0: outa = 10'h147;
8'hd1: outa = 10'h026;
8'hd2: outa = 10'h103;
8'hd3: outa = 10'h106;
8'hd4: outa = 10'h35a;
8'hd5: outa = 10'h254;
8'hd6: outa = 10'h0cd;
8'hd7: outa = 10'h17c;
8'hd8: outa = 10'h37e;
8'hd9: outa = 10'h0a9;
8'hda: outa = 10'h0fe;
8'hdb: outa = 10'h3c0;
8'hdc: outa = 10'h1d9;
8'hdd: outa = 10'h10e;
8'hde: outa = 10'h394;
8'hdf: outa = 10'h316;
8'he0: outa = 10'h05b;
8'he1: outa = 10'h126;
8'he2: outa = 10'h369;
8'he3: outa = 10'h291;
8'he4: outa = 10'h2ca;
8'he5: outa = 10'h25b;
8'he6: outa = 10'h106;
8'he7: outa = 10'h172;
8'he8: outa = 10'h2f7;
8'he9: outa = 10'h2d3;
8'hea: outa = 10'h182;
8'heb: outa = 10'h327;
8'hec: outa = 10'h1d0;
8'hed: outa = 10'h204;
8'hee: outa = 10'h11f;
8'hef: outa = 10'h365;
8'hf0: outa = 10'h2c2;
8'hf1: outa = 10'h2b5;
8'hf2: outa = 10'h1f8;
8'hf3: outa = 10'h2a7;
8'hf4: outa = 10'h1be;
8'hf5: outa = 10'h25e;
8'hf6: outa = 10'h032;
8'hf7: outa = 10'h2ef;
8'hf8: outa = 10'h02f;
8'hf9: outa = 10'h201;
8'hfa: outa = 10'h054;
8'hfb: outa = 10'h013;
8'hfc: outa = 10'h249;
8'hfd: outa = 10'h09a;
8'hfe: outa = 10'h012;
8'hff: outa = 10'h114;
endcase
end
endmodule

View File

@ -13,13 +13,7 @@ module t_case_huge_sub3 (/*AUTOARG*/
input clk;
input [9:0] index;
output [3:0] outr;
// =============================
/*AUTOREG*/
// Beginning of automatic regs (for this module's undeclared outputs)
reg [3:0] outr;
// End of automatics
output logic [3:0] outr;
// =============================
// Created from Pthon3:
@ -31,6 +25,7 @@ module t_case_huge_sub3 (/*AUTOARG*/
initial outr = 4'b0;
always @(posedge clk) begin
// verilog_format: off
case (index[7:0])
8'h00: begin outr <= 4'h0; end
8'h01: begin /*No Change*/ end
@ -289,5 +284,6 @@ module t_case_huge_sub3 (/*AUTOARG*/
8'hfe: begin outr <= outr^index[8:5]^4'h1; end
default: begin outr <= outr^index[8:5]^4'h6; end
endcase
// verilog_format: on
end
endmodule

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@ -14,16 +14,12 @@ module t_case_huge_sub4 (/*AUTOARG*/
);
input [7:0] index;
output [9:0] outq;
output logic [9:0] outq;
// =============================
/*AUTOREG*/
// Beginning of automatic regs (for this module's undeclared outputs)
reg [9:0] outq;
// End of automatics
// =============================
always @(/*AS*/index) begin
always @* begin
// verilog_format: off
case (index)
// default below: no change
8'h00: begin outq = 10'h001; end
@ -61,5 +57,6 @@ module t_case_huge_sub4 (/*AUTOARG*/
8'hff: begin outq = 10'h114; end
default: ; // No change
endcase
// verilog_format: on
end
endmodule

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@ -4,7 +4,7 @@
// any use, without warranty, 2024 by Varun Koyyalagunta, Tenstorrent.
// SPDX-License-Identifier: CC0-1.0
module t (/*AUTOARG*/);
module t;
localparam W = 23;
@ -213,107 +213,107 @@ module t (/*AUTOARG*/);
function automatic hit_t get_hit(input logic [22:0] a);
hit_t hit = '0;
unique case (a)
R0 : begin hit.r0 = 1'b1; end
R1 : begin hit.r1 = 1'b1; end
R2 : begin hit.r2 = 1'b1; end
R3 : begin hit.r3 = 1'b1; end
R4 : begin hit.r4 = 1'b1; end
R5 : begin hit.r5 = 1'b1; end
R6 : begin hit.r6 = 1'b1; end
R7 : begin hit.r7 = 1'b1; end
R8 : begin hit.r8 = 1'b1; end
R9 : begin hit.r9 = 1'b1; end
R10 : begin hit.r10 = 1'b1; end
R11 : begin hit.r11 = 1'b1; end
R12 : begin hit.r12 = 1'b1; end
R13 : begin hit.r13 = 1'b1; end
R14 : begin hit.r14 = 1'b1; end
R15 : begin hit.r15 = 1'b1; end
R16 : begin hit.r16 = 1'b1; end
R17 : begin hit.r17 = 1'b1; end
R18 : begin hit.r18 = 1'b1; end
R19 : begin hit.r19 = 1'b1; end
R20 : begin hit.r20 = 1'b1; end
R21 : begin hit.r21 = 1'b1; end
R22 : begin hit.r22 = 1'b1; end
R23 : begin hit.r23 = 1'b1; end
R24 : begin hit.r24 = 1'b1; end
R25 : begin hit.r25 = 1'b1; end
R26 : begin hit.r26 = 1'b1; end
R27 : begin hit.r27 = 1'b1; end
R28 : begin hit.r28 = 1'b1; end
R29 : begin hit.r29 = 1'b1; end
R30 : begin hit.r30 = 1'b1; end
R31 : begin hit.r31 = 1'b1; end
R32 : begin hit.r32 = 1'b1; end
R33 : begin hit.r33 = 1'b1; end
R34 : begin hit.r34 = 1'b1; end
R35 : begin hit.r35 = 1'b1; end
R36 : begin hit.r36 = 1'b1; end
R37 : begin hit.r37 = 1'b1; end
R38 : begin hit.r38 = 1'b1; end
R39 : begin hit.r39 = 1'b1; end
R40 : begin hit.r40 = 1'b1; end
R41 : begin hit.r41 = 1'b1; end
R42 : begin hit.r42 = 1'b1; end
R43 : begin hit.r43 = 1'b1; end
R44 : begin hit.r44 = 1'b1; end
R45 : begin hit.r45 = 1'b1; end
R46 : begin hit.r46 = 1'b1; end
R47 : begin hit.r47 = 1'b1; end
R48 : begin hit.r48 = 1'b1; end
R49 : begin hit.r49 = 1'b1; end
R50 : begin hit.r50 = 1'b1; end
R51 : begin hit.r51 = 1'b1; end
R52 : begin hit.r52 = 1'b1; end
R53 : begin hit.r53 = 1'b1; end
R54 : begin hit.r54 = 1'b1; end
R55 : begin hit.r55 = 1'b1; end
R56 : begin hit.r56 = 1'b1; end
R57 : begin hit.r57 = 1'b1; end
R58 : begin hit.r58 = 1'b1; end
R59 : begin hit.r59 = 1'b1; end
R60 : begin hit.r60 = 1'b1; end
R61 : begin hit.r61 = 1'b1; end
R62 : begin hit.r62 = 1'b1; end
R63 : begin hit.r63 = 1'b1; end
R64 : begin hit.r64 = 1'b1; end
R65 : begin hit.r65 = 1'b1; end
R66 : begin hit.r66 = 1'b1; end
R67 : begin hit.r67 = 1'b1; end
R68 : begin hit.r68 = 1'b1; end
R69 : begin hit.r69 = 1'b1; end
R70 : begin hit.r70 = 1'b1; end
R71 : begin hit.r71 = 1'b1; end
R72 : begin hit.r72 = 1'b1; end
R73 : begin hit.r73 = 1'b1; end
R74 : begin hit.r74 = 1'b1; end
R75 : begin hit.r75 = 1'b1; end
R76 : begin hit.r76 = 1'b1; end
R77 : begin hit.r77 = 1'b1; end
R78 : begin hit.r78 = 1'b1; end
R79 : begin hit.r79 = 1'b1; end
R80 : begin hit.r80 = 1'b1; end
R81 : begin hit.r81 = 1'b1; end
R82 : begin hit.r82 = 1'b1; end
R83 : begin hit.r83 = 1'b1; end
R84 : begin hit.r84 = 1'b1; end
R85 : begin hit.r85 = 1'b1; end
R86 : begin hit.r86 = 1'b1; end
R87 : begin hit.r87 = 1'b1; end
R88 : begin hit.r88 = 1'b1; end
R89 : begin hit.r89 = 1'b1; end
R90 : begin hit.r90 = 1'b1; end
R91 : begin hit.r91 = 1'b1; end
R92 : begin hit.r92 = 1'b1; end
R93 : begin hit.r93 = 1'b1; end
R94 : begin hit.r94 = 1'b1; end
R95 : begin hit.r95 = 1'b1; end
R96 : begin hit.r96 = 1'b1; end
R97 : begin hit.r97 = 1'b1; end
R98 : begin hit.r98 = 1'b1; end
R99 : begin hit.r99 = 1'b1; end
default: begin hit = '0; end
R0: hit.r0 = 1'b1;
R1: hit.r1 = 1'b1;
R2: hit.r2 = 1'b1;
R3: hit.r3 = 1'b1;
R4: hit.r4 = 1'b1;
R5: hit.r5 = 1'b1;
R6: hit.r6 = 1'b1;
R7: hit.r7 = 1'b1;
R8: hit.r8 = 1'b1;
R9: hit.r9 = 1'b1;
R10: hit.r10 = 1'b1;
R11: hit.r11 = 1'b1;
R12: hit.r12 = 1'b1;
R13: hit.r13 = 1'b1;
R14: hit.r14 = 1'b1;
R15: hit.r15 = 1'b1;
R16: hit.r16 = 1'b1;
R17: hit.r17 = 1'b1;
R18: hit.r18 = 1'b1;
R19: hit.r19 = 1'b1;
R20: hit.r20 = 1'b1;
R21: hit.r21 = 1'b1;
R22: hit.r22 = 1'b1;
R23: hit.r23 = 1'b1;
R24: hit.r24 = 1'b1;
R25: hit.r25 = 1'b1;
R26: hit.r26 = 1'b1;
R27: hit.r27 = 1'b1;
R28: hit.r28 = 1'b1;
R29: hit.r29 = 1'b1;
R30: hit.r30 = 1'b1;
R31: hit.r31 = 1'b1;
R32: hit.r32 = 1'b1;
R33: hit.r33 = 1'b1;
R34: hit.r34 = 1'b1;
R35: hit.r35 = 1'b1;
R36: hit.r36 = 1'b1;
R37: hit.r37 = 1'b1;
R38: hit.r38 = 1'b1;
R39: hit.r39 = 1'b1;
R40: hit.r40 = 1'b1;
R41: hit.r41 = 1'b1;
R42: hit.r42 = 1'b1;
R43: hit.r43 = 1'b1;
R44: hit.r44 = 1'b1;
R45: hit.r45 = 1'b1;
R46: hit.r46 = 1'b1;
R47: hit.r47 = 1'b1;
R48: hit.r48 = 1'b1;
R49: hit.r49 = 1'b1;
R50: hit.r50 = 1'b1;
R51: hit.r51 = 1'b1;
R52: hit.r52 = 1'b1;
R53: hit.r53 = 1'b1;
R54: hit.r54 = 1'b1;
R55: hit.r55 = 1'b1;
R56: hit.r56 = 1'b1;
R57: hit.r57 = 1'b1;
R58: hit.r58 = 1'b1;
R59: hit.r59 = 1'b1;
R60: hit.r60 = 1'b1;
R61: hit.r61 = 1'b1;
R62: hit.r62 = 1'b1;
R63: hit.r63 = 1'b1;
R64: hit.r64 = 1'b1;
R65: hit.r65 = 1'b1;
R66: hit.r66 = 1'b1;
R67: hit.r67 = 1'b1;
R68: hit.r68 = 1'b1;
R69: hit.r69 = 1'b1;
R70: hit.r70 = 1'b1;
R71: hit.r71 = 1'b1;
R72: hit.r72 = 1'b1;
R73: hit.r73 = 1'b1;
R74: hit.r74 = 1'b1;
R75: hit.r75 = 1'b1;
R76: hit.r76 = 1'b1;
R77: hit.r77 = 1'b1;
R78: hit.r78 = 1'b1;
R79: hit.r79 = 1'b1;
R80: hit.r80 = 1'b1;
R81: hit.r81 = 1'b1;
R82: hit.r82 = 1'b1;
R83: hit.r83 = 1'b1;
R84: hit.r84 = 1'b1;
R85: hit.r85 = 1'b1;
R86: hit.r86 = 1'b1;
R87: hit.r87 = 1'b1;
R88: hit.r88 = 1'b1;
R89: hit.r89 = 1'b1;
R90: hit.r90 = 1'b1;
R91: hit.r91 = 1'b1;
R92: hit.r92 = 1'b1;
R93: hit.r93 = 1'b1;
R94: hit.r94 = 1'b1;
R95: hit.r95 = 1'b1;
R96: hit.r96 = 1'b1;
R97: hit.r97 = 1'b1;
R98: hit.r98 = 1'b1;
R99: hit.r99 = 1'b1;
default: hit = '0;
endcase
return hit;
endfunction

View File

@ -87,6 +87,7 @@ module Test (/*AUTOARG*/
always @(posedge clk) begin
out <= in;
// verilog_format: off
if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
@ -137,5 +138,6 @@ module Test (/*AUTOARG*/
if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
if (in[0])
out <= ~in;
// verilog_format: on
end
endmodule

View File

@ -10,14 +10,16 @@ module t (/*AUTOARG*/
);
input clk;
integer cyc; initial cyc=1;
integer cyc;
initial cyc = 1;
reg [127:0] i;
wire [127:0] q1;
wire [127:0] q32;
wire [127:0] q64;
wire [63:0] q64_low;
wire [ 63:0] q64_low;
// verilog_format: off
assign q1 = {
i[24*4], i[25*4], i[26*4], i[27*4], i[28*4], i[29*4], i[30*4], i[31*4],
i[16*4], i[17*4], i[18*4], i[19*4], i[20*4], i[21*4], i[22*4], i[23*4],
@ -91,38 +93,39 @@ module t (/*AUTOARG*/
i[16*4+3], i[17*4+3], i[18*4+3], i[19*4+3], i[20*4+3], i[21*4+3], i[22*4+3], i[23*4+3],
i[8*4+3], i[9*4+3], i[10*4+3], i[11*4+3], i[12*4+3], i[13*4+3], i[14*4+3], i[15*4+3],
i[0*4+3], i[1*4+3], i[2*4+3], i[3*4+3], i[4*4+3], i[5*4+3], i[6*4+3], i[7*4+3]};
// verilog_format: on
always @ (posedge clk) begin
if (cyc!=0) begin
always @(posedge clk) begin
if (cyc != 0) begin
cyc <= cyc + 1;
`ifdef TEST_VERBOSE
$write("%x %x\n", q1, i);
`endif
if (cyc==1) begin
if (cyc == 1) begin
i <= 128'hed388e646c843d35de489bab2413d770;
end
if (cyc==2) begin
if (cyc == 2) begin
i <= 128'h0e17c88f3d5fe51a982646c8e2bd68c3;
if (q1 != 128'h06f0b17c6551e269e3ab07723b26fb10) $stop;
if (q1 != q32) $stop;
if (q1 != q64) $stop;
if (q1[63:0] != q64_low) $stop;
end
if (cyc==3) begin
if (cyc == 3) begin
i <= 128'he236ddfddddbdad20a48e039c9f395b8;
if (q1 != 128'h8c6f018c8a992c979a3e7859f29ac36d) $stop;
if (q1 != q32) $stop;
if (q1 != q64) $stop;
if (q1[63:0] != q64_low) $stop;
end
if (cyc==4) begin
if (cyc == 4) begin
i <= 128'h45e0eb7642b148537491f3da147e7f26;
if (q1 != 128'hf45fc07e4fa8524cf9571425f17f9ad7) $stop;
if (q1 != q32) $stop;
if (q1 != q64) $stop;
if (q1[63:0] != q64_low) $stop;
end
if (cyc==9) begin
if (cyc == 9) begin
$write("*-* All Finished *-*\n");
$finish;
end

View File

@ -328,6 +328,7 @@ module Test
input [7:0] sel,
// verilog_format: off
input [3:0] i0, i1, i2, i3, i4, i5, i6, i7, i8, i9, i10, i11, i12, i13, i14, i15, i16,
i17, i18, i19, i20, i21, i22, i23, i24, i25, i26, i27, i28, i29, i30, i31, i32, i33,
i34, i35, i36, i37, i38, i39, i40, i41, i42, i43, i44, i45, i46, i47, i48, i49, i50,
@ -345,6 +346,7 @@ module Test
i214, i215, i216, i217, i218, i219, i220, i221, i222, i223, i224, i225, i226, i227,
i228, i229, i230, i231, i232, i233, i234, i235, i236, i237, i238, i239, i240, i241,
i242, i243, i244, i245, i246, i247, i248, i249, i250, i251, i252, i253, i254, i255
// verilog_format: on
);
assign out

View File

@ -23,6 +23,7 @@ module t (/*AUTOARG*/
cyc <= cyc + 1;
x = 32'hcafe1234;
// verilog_format: off
if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
@ -72,6 +73,7 @@ module t (/*AUTOARG*/
if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
x = cyc;
// verilog_format: on
$write("[%0t] cyc=%0d x=%x\n", $time, cyc, x);
if (x !== cyc) $stop;