61 lines
1.5 KiB
Systemverilog
61 lines
1.5 KiB
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2003-2007 by Wilson Snyder.
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// SPDX-License-Identifier: CC0-1.0
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// Although strange, Verilog defines are expanded inside the C blocks
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// (as the `systemc_* directives are opaque to the preprocessor)
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`define finished "*-* All Finished *-*\n"
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class Cls;
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`ifdef verilator
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`systemc_header
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#define DID_INT_HEADER 1
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`systemc_header_post
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inline void `systemc_class_name::my_inline_function() {}
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`systemc_interface
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#ifndef DID_INT_HEADER
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#error "`systemc_header didn't work"
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#endif
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bool m_did_ctor;
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uint32_t my_function() {
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if (!m_did_ctor) vl_fatal(__FILE__, __LINE__, __FILE__, "`systemc_ctor didn't work");
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return 1;
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}
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static void my_imp_function();
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static void my_inline_function();
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`systemc_imp_header
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#define DID_IMP_HEADER 1
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`systemc_implementation
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void `systemc_class_name::my_imp_function() { }
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`systemc_ctor // Works, but using a $c inside a `function new` might be cleaner
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m_did_ctor = 1;
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`systemc_dtor
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printf("In systemc_dtor\n");
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printf(`finished);
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`verilog
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`endif // verilator
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endclass
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module t (/*AUTOARG*/);
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int i;
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initial begin
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Cls c;
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c = new;
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i = $c(c, "->my_function()");
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$c(c, "->my_imp_function();");
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$c(c, "->my_inline_function();");
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c = null; // Causes destruction and All Finished
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$finish;
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end
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endmodule
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