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[0] in5=0 clock_10=0 clock_12=0 out18=1
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[5] in5=0 clock_10=0 clock_12=1 out18=1
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[10] in5=0 clock_10=0 clock_12=0 out18=1
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[15] in5=0 clock_10=1 clock_12=0 out18=1
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[15] in5=0 clock_10=1 clock_12=0 out18=0
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[20] in5=0 clock_10=0 clock_12=0 out18=0
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*-* All Finished *-*
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