40 lines
1.0 KiB
Systemverilog
40 lines
1.0 KiB
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2025 by Antmicro.
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// SPDX-License-Identifier: CC0-1.0
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class semaphore_cls;
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class InnerKeyClass;
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int innerKeys;
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function new(int keyCount = 0);
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innerKeys = keyCount;
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endfunction
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endclass
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// Test an implementation similar to what Verilator will do internally
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InnerKeyClass m_keys;
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function new(int keyCount = 0);
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m_keys = new(keyCount);
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endfunction
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function void put(int keyCount = 1);
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m_keys.innerKeys += keyCount;
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endfunction
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task get(int keyCount = 1);
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wait (m_keys.innerKeys >= keyCount);
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m_keys.innerKeys -= keyCount;
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endtask
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function int try_get(int keyCount = 1);
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if (m_keys.innerKeys >= keyCount) begin
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m_keys.innerKeys -= keyCount;
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return 1;
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end
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else begin
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return 0;
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end
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endfunction
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endclass
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`define SEMAPHORE_T semaphore_cls
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`include "t_semaphore.v"
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