18 lines
540 B
Systemverilog
18 lines
540 B
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2019 by Wilson Snyder.
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// SPDX-License-Identifier: CC0-1.0
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`line 7 "C:\\some\\windows\\path\\t_stop_winos_bad.v" 0
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module t;
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localparam string FILENAME = `__FILE__;
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initial begin
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$write("Intentional stop\n");
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// Print length to make sure \\ counts as 1 character
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$write("Filename '%s' Length = %0d\n", FILENAME, FILENAME.len());
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$stop;
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end
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endmodule
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