413 lines
11 KiB
Plaintext
413 lines
11 KiB
Plaintext
module Vt_debug_emitv_t;
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input logic clk;
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input logic in;
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typedef enum logic [2:0] {
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ZERO = 3'h0,
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ONE = 3'h1
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} e_t;
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typedef struct packed {
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logic [2:0] a;
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} ps_t;
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typedef struct {
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logic signed [2:0] a;
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} us_t;
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typedef union {
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logic a;
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} union_t;
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const struct packed {
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logic [2:0] a;
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} ps[0:2];
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struct {
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logic signed [2:0] a;
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} us;
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union {
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logic a;
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} unu;
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integer signed i1;
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int signed array[0:2];
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initial begin
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array = '{0:32'sh1, 1:32'sh2, 2:32'sh3};
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end
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logic [63:32] downto_32;
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downto_32 = 32'h0;
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function ident;
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input int signed value;
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begin : label0
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ident = value;
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disable label0;
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end
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endfunction
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Iface the_ifaces[3:0] ();
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initial begin
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begin
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if ($test$plusargs(40'h48454c4c4f)) begin
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$display("Hello argument found.");
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end
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if ((Pkg::FOO == 'sh0)) begin
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$write("");
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end
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if ((ZERO == 'sh0)) begin
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$write("");
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end
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if ($value$plusargs(56'h544553543d2564i1)) begin
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$display("value was %~", i1);
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end
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else begin
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$display("+TEST= not found");
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end
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if (downto_32[33]) begin
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$write("");
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end
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if (downto_32[(ident('sh21) - 'h20)[5:0] + 32
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+:1]]) begin
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$write("");
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end
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if ((| downto_32[48:40])) begin
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$write("");
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end
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if ((| downto_32[57:55])) begin
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$write("");
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end
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if ((| downto_32[60:54])) begin
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$write("");
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end
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if (the_ifaces[2].ifsig) begin
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$write("");
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end
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end
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end
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bit [6:5] [4:3] [2:1] arraymanyd[10:11][12:13][14:15];
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logic [15:0] pubflat;
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logic [15:0] pubflat_r;
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logic [15:0] pubflat_w;
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assign pubflat_w = pubflat;
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int signed fd;
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int signed i;
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int signed q[$];
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int signed qb[$:'sh3];
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int signed assoc[string];
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int signed assocassoc[string][real];
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int signed dyn[];
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typedef struct packed {
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logic nn1;
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} nested_named_t;
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typedef struct packed {
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struct packed {
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logic nn2;
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} nested_anonymous;
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struct packed {
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logic nn1;
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} nested_named;
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logic [11:10] nn3;
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} nibble_t;
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struct packed {
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struct packed {
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logic nn2;
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} nested_anonymous;
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struct packed {
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logic nn1;
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} nested_named;
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logic [11:10] nn3;
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} [5:4] nibblearray[3:2];
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task t;
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$display("stmt");
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endtask
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function f;
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input int signed v;
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begin : label0
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$display("stmt");
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f = ((v == 'sh0) ? 'sh63 : ((~ v) + 'sh1));
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disable label0;
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end
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endfunction
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initial begin
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begin : unnamedblk1
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int signed other;
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begin
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begin : unnamedblk2
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int signed i;
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i = 'sh0;
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while ((i < 'sh3)) begin
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begin
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other = f(i);
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$display("stmt %~ %~",
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i, other);
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t();
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end
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i = (i + 'h1);
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end
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end
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end
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begin : named
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$display("stmt");
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end
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end
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end
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final begin
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begin
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$display("stmt");
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end
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end
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always @( in) begin
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begin
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$display("stmt");
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end
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end
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always @(posedge clk) begin
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begin
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$display("posedge clk");
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pubflat_r <= pubflat_w;
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end
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end
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always @(negedge clk) begin
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begin
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$display("negedge clk, pfr = %x", pubflat_r);
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end
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end
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int signed cyc;
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int signed fo;
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int signed sum;
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real r;
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string str;
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int signed mod_val;
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int signed mod_res;
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always @(posedge clk) begin
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begin
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cyc <= (cyc + 'sh1);
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r <= (r + 0.01);
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fo = cyc;
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sub.inc(fosum);
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sum = sub.f(sum);
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$display("[%0t] sum = %~", $time, sum);
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$display("a?= %d", ($c('sh1) ? $c('sh14)
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: $c('sh1e)));
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$c(;);
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$display("%d", $c(0));
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fd = $fopen(72'h2f6465762f6e756c6c);
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;
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$fclose(fd);
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fd = $fopen(72'h2f6465762f6e756c6c, 8'h72);
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;
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$fgetc(fd);
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$fflush(fd);
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$fscanf(fd, "%d", sum);
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;
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$fdisplay(32'h69203d20, "%~", sum);
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$fwrite(fd, "hello");
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$readmemh(fd, array);
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$readmemh(fd, array, 'sh0);
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$readmemh(fd, array, 'sh0, 'sh0);
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sum = 'sh0;
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begin : unnamedblk3
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int signed i;
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i = 'sh0;
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begin : label0
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while ((i < cyc)) begin
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begin
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sum = (sum + i);
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if ((sum > 'sha)) begin
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disable label0;
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end
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else begin
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sum = (sum + 'sh1);
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end
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end
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i = (i + 'h1);
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end
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end
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end
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if ((cyc == 'sh63)) begin
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$finish;
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end
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if ((cyc == 'sh64)) begin
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$stop;
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end
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case (in)
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// synopsys full_case parallel_case'sh1: begin $display("1");
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end
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default: begin $display("default");
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end
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endcase
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priority case (in)
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'sh1: begin $display("1");
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end
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default: begin $display("default");
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end
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endcase
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unique case (in)
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'sh1: begin $display("1");
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end
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default: begin $display("default");
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end
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endcase
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unique0 case (in)
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'sh1: begin $display("1");
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end
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default: begin $display("default");
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end
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endcase
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if (in) begin
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$display("1");
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end
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else begin
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$display("0");
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end
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priority if (in) begin
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$display("1");
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end
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else begin
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$display("0");
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end
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unique if (in) begin
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$display("1");
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end
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else begin
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$display("0");
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end
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unique0 if (in) begin
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$display("1");
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end
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else begin
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$display("0");
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end
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$display("%~%~", $past(cyc), $past(cyc,
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'sh1));
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str = $sformatf("cyc=%~", cyc);
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;
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$display("str = %@", str);
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$display("%% [%t] [%^] to=%o td=%d", $time,
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$realtime, $time, $time);
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$sscanf(40'h666f6f3d35, "foo=%d", i);
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;
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$printtimescale;
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if ((i != 'sh5)) begin
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$stop;
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end
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sum = $random();
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sum = $random('sha);
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sum = $urandom();
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sum = $urandom('sha);
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if ((PKG_PARAM != 'sh1)) begin
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$stop;
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end
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sub.r = 62.0;
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mod_res = (mod_val % 'sh5);
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$display("%g", $log10(r));
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$display("%g", $ln(r));
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$display("%g", $exp(r));
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$display("%g", $sqrt(r));
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$display("%g", $floor(r));
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$display("%g", $ceil(r));
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$display("%g", $sin(r));
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$display("%g", $cos(r));
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$display("%g", $tan(r));
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$display("%g", $asin(r));
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$display("%g", $acos(r));
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$display("%g", $atan(r));
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$display("%g", $sinh(r));
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$display("%g", $cosh(r));
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$display("%g", $tanh(r));
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$display("%g", $asinh(r));
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$display("%g", $acosh(r));
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$display("%g", $atanh(r));
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if ($sampled(cyc[1])) begin
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$write("");
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end
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if ($rose(cyc)) begin
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$write("");
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end
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if ($fell(cyc)) begin
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$write("");
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end
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if ($stable(cyc)) begin
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$write("");
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end
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if ((! $stable(cyc))) begin
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$write("");
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end
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if ($past(cyc[1])) begin
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$write("");
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end
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if ($rose(cyc, @( clk))) begin
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$write("");
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end
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if ($fell(cyc, @( clk))) begin
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$write("");
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end
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if ($stable(cyc, @( clk))) begin
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$write("");
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end
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if ((! $stable(cyc, @( clk)))) begin
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$write("");
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end
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if ($past(cyc[1], 'sh5)) begin
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$write("");
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end
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force sum = 'sha;
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begin : unnamedblk1_1
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integer signed __Vrepeat0;
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__Vrepeat0 = 'sh2;
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while ((__Vrepeat0 > 32'h0)) begin
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if ((sum != 'sha)) begin
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$stop;
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end
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__Vrepeat0 = (__Vrepeat0 - 32'h1);
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end
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end
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release sum;
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end
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end
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/*verilator public_flat_rw @(posedge clk) pubflat*/
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endmodule
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package Vt_debug_emitv___024unit;
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class Vt_debug_emitv_Cls;
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int signed member;
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member = 'sh1;
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task method;
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if ((this != this)) begin
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$stop;
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end
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endtask
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function new;
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endfunction
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endclass
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endpackage
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interface Vt_debug_emitv_Iface;
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input logic clk;
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logic ifsig;
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modport mp (
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input logic ifsig
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);
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endinterface
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module Vt_debug_emitv_sub;
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input logic clk;
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task inc;
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input int signed i;
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output int signed o;
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o = ({32'h1{{1'h0, i[31:1]}}} + 32'h1);
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endtask
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function f;
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input int signed v;
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begin : label0
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if ((v == 'sh0)) begin
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f = 'sh21;
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disable label0;
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end
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f = ({32'h1{{31'h0, v[2]}}} + 32'h1);
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disable label0;
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end
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endfunction
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real r;
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endmodule
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package Vt_debug_emitv_p;
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logic pkgvar;
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endpackage
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package Vt_debug_emitv_Pkg;
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logic signed [31:0] PKG_PARAM;
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typedef enum int signed{
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FOO = 32'h0,
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BAR = 32'h1,
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BAZ = 32'h2
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} enum_t;
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endpackage
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