mirror of https://github.com/swig/swig
88 lines
3.2 KiB
Scilab
88 lines
3.2 KiB
Scilab
exec("swigtest.start", -1);
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// OUTPUT
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[a, b] = output2();
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checkequal(a, 1, "[a, b] = output2(): a");
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checkequal(b, 2, "[a, b] = output2(): b");
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[ret, a, b] = output2Ret();
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checkequal(ret, 3, "[a, b] = output2Ret(): b");
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checkequal(a, 1, "[a, b] = output2Ret(): a");
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checkequal(b, 2, "[a, b] = output2Ret(): b");
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[c, d] = output2Input2(1, 2);
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checkequal(c, 2, "[c, d] = output2Input2(1, 2): c");
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checkequal(d, 4, "[c, d] = output2Input2(1, 2): d");
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[ret, c, d] = output2Input2Ret(1, 2);
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checkequal(ret, 6, "[ret, c, d] = output2Input2Ret(1, 2): ret");
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checkequal(c, 2, "[ret, c, d] = output2Input2Ret(1, 2): c");
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checkequal(d, 4, "[ret, c, d = output2Input2Ret(1, 2): d");
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[ret, a, b, c] = output3Input1Ret(10);
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checkequal(ret, 10, "[ret, a, b, c] = output3Input1Ret(10): ret");
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checkequal(a, 11, "[ret, a, b, c] = output3Input1Ret(10): a");
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checkequal(b, 12, "[ret, a, b, c] = output3Input1Ret(10): b");
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checkequal(c, 13, "[ret, a, b, c] = output3Input1Ret(10): c");
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[ret, a, b, c] = output3Input3Ret(10, 20, 30);
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checkequal(ret, 66, "[ret, a, b, c] = output3Input1Ret(10, 20, 30): ret");
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checkequal(a, 11, "[ret, a, b, c] = output3Input1Ret(10, 20, 30): a");
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checkequal(b, 22, "[ret, a, b, c] = output3Input1Ret(10, 20, 30): b");
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checkequal(c, 33, "[ret, a, b, c] = output3Input1Ret(10, 20, 30): c");
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// INOUT
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[a, b] = inout2(1, 2);
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checkequal(a, 2, "[a, b] = output2(1, 2): a");
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checkequal(b, 4, "[a, b] = output2(1, 2): b");
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[ret, a, b] = inout2Ret(1, 2);
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checkequal(ret, 6, "[a, b] = inout2Ret(1, 2): b");
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checkequal(a, 2, "[a, b] = inout2Ret(1, 2): a");
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checkequal(b, 4, "[a, b] = inout2Ret(1, 2): b");
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[c, d] = inout2Input2(1, 2, 1, 1);
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checkequal(c, 2, "[c, d] = inout2Input2(1, 2): c");
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checkequal(d, 3, "[c, d] = inout2Input2(1, 2): d");
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[ret, c, d] = inout2Input2Ret(1, 2, 1, 1);
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checkequal(ret, 5, "[c, d] = inout2Input2Ret(1, 2): ret");
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checkequal(c, 2, "[c, d] = inout2Input2Ret(1, 2): c");
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checkequal(d, 3, "[c, d] = inout2Input2Ret(1, 4): d");
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[ret, a, b, c] = inout3Input1Ret(10, 1, 2, 3);
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checkequal(ret, 10, "[ret, a, b, c] = output3Input1Ret(ret, 1, 2, 3): ret");
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checkequal(a, 11, "[ret, a, b, c] = output3Input1Ret(ret, 1, 2, 3): a");
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checkequal(b, 12, "[ret, a, b, c] = output3Input1Ret(ret, 1, 2, 3): b");
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checkequal(c, 13, "[ret, a, b, c] = output3Input1Ret(ret, 1, 2, 3): c");
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[ret, a, b, c] = inout3Input3Ret(10, 1, 20, 2, 30, 3);
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checkequal(ret, 66, "[ret, a, b, c] = output3Input1Ret(10, 20, 30): ret");
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checkequal(a, 11, "[ret, a, b, c] = inout3Input1Ret(10, 1, 20, 2, 30, 3): a");
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checkequal(b, 22, "[ret, a, b, c] = inout3Input1Ret(10, 1, 20, 2, 30, 3): b");
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checkequal(c, 33, "[ret, a, b, c] = inout3Input1Ret(10, 1, 20, 2, 30, 3): c");
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// CLASS
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a = new_ClassA();
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[ret, c, d] = ClassA_output2Input2Ret(a, 1, 2);
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checkequal(ret, 6, "[ret, c, d] = ClassA_output2Input2Ret(a, 1, 2): ret");
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checkequal(c, 2, "[c, d] = ClassA_output2Input2Ret(a, 1, 2): c");
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checkequal(d, 4, "[c, d] = ClassA_output2Input2Ret(a, 1, 2): d");
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[ret, c, d] = ClassA_inout2Input2Ret(a, 1, 2, 1, 1);
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checkequal(ret, 5, "[ret, c, d] = ClassA_inout2Input2Ret(a, 1, 2): ret");
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checkequal(c, 2, "[c, d] = ClassA_inout2Input2(a, 1, 2): c");
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checkequal(d, 3, "[c, d] = ClassA_inout2Input2(a, 1, 2): d");
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delete_ClassA(a);
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exec("swigtest.quit", -1);
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