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Merge 8a6f8fd986 into 02596ba8d9

This commit is contained in:
o-lek 2025-07-30 15:56:30 +02:00 committed by GitHub
parent 02596ba8d9 8a6f8fd986
commit 412502db0d
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GPG Key ID: B5690EEEBB952194
5 changed files with 35 additions and 13 deletions
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4
src/coreclr/clrdefinitions.cmake
View File

@ -182,10 +182,8 @@ endif (CLR_CMAKE_TARGET_ARCH_AMD64)
add_definitions(-DFEATURE_USE_ASM_GC_WRITE_BARRIERS)
if(CLR_CMAKE_TARGET_ARCH_AMD64 OR CLR_CMAKE_TARGET_ARCH_ARM64 OR CLR_CMAKE_TARGET_ARCH_LOONGARCH64 OR CLR_CMAKE_TARGET_ARCH_RISCV64 OR CLR_CMAKE_TARGET_ARCH_ARM)
add_definitions(-DFEATURE_USE_SOFTWARE_WRITE_WATCH_FOR_GC_HEAP)
endif(CLR_CMAKE_TARGET_ARCH_AMD64 OR CLR_CMAKE_TARGET_ARCH_ARM64 OR CLR_CMAKE_TARGET_ARCH_LOONGARCH64 OR CLR_CMAKE_TARGET_ARCH_RISCV64 OR CLR_CMAKE_TARGET_ARCH_ARM)
if(CLR_CMAKE_TARGET_ARCH_AMD64 OR CLR_CMAKE_TARGET_ARCH_ARM64 OR CLR_CMAKE_TARGET_ARCH_LOONGARCH64 OR CLR_CMAKE_TARGET_ARCH_RISCV64)
add_definitions(-DFEATURE_MANUALLY_MANAGED_CARD_BUNDLES)
endif(CLR_CMAKE_TARGET_ARCH_AMD64 OR CLR_CMAKE_TARGET_ARCH_ARM64 OR CLR_CMAKE_TARGET_ARCH_LOONGARCH64 OR CLR_CMAKE_TARGET_ARCH_RISCV64)
endif(CLR_CMAKE_TARGET_ARCH_AMD64 OR CLR_CMAKE_TARGET_ARCH_ARM64 OR CLR_CMAKE_TARGET_ARCH_LOONGARCH64 OR CLR_CMAKE_TARGET_ARCH_RISCV64 OR CLR_CMAKE_TARGET_ARCH_ARM)
add_definitions(-D_SECURE_SCL=0)
add_definitions(-DUNICODE)

27
src/coreclr/vm/arm/asmhelpers.S
View File

@ -474,6 +474,9 @@ LOCAL_LABEL(stackProbe_loop):
__\name\()__g_card_table_offset = 0xffff
#ifdef FEATURE_USE_SOFTWARE_WRITE_WATCH_FOR_GC_HEAP
__\name\()__g_sw_ww_table_offset = 0xffff
#endif
#ifdef FEATURE_MANUALLY_MANAGED_CARD_BUNDLES
__\name\()__g_card_bundle_table_offset = 0xffff
#endif
.endm
@ -514,6 +517,21 @@ LOCAL_LABEL(stackProbe_loop):
strb \tmpReg, [__wbScratch]
.endif
#ifdef FEATURE_MANUALLY_MANAGED_CARD_BUNDLES
LOAD_GC_GLOBAL \name, __wbScratch, g_card_bundle_table
add __wbScratch, __wbScratch, \ptrReg, lsr #20
.if(\mp)
ldrb \tmpReg, [__wbScratch]
cmp \tmpReg, #0xff
itt ne
movne \tmpReg, 0xff
strbne \tmpReg, [__wbScratch]
.else
mov \tmpReg, #0xff
strb \tmpReg, [__wbScratch]
.endif
#endif
0:
.endm
@ -560,7 +578,7 @@ LOCAL_LABEL(stackProbe_loop):
#ifdef FEATURE_USE_SOFTWARE_WRITE_WATCH_FOR_GC_HEAP
UPDATE_WRITE_WATCH_TABLE \name, r0, \mp, r12
#endif
UPDATE_CARD_TABLE \name, r0, r1, \mp, \post, r0
UPDATE_CARD_TABLE \name, r0, r1, \mp, \post, r12
bx lr
LEAF_END_MARKED \name, _TEXT
.endm
@ -574,7 +592,7 @@ LOCAL_LABEL(stackProbe_loop):
#ifdef FEATURE_USE_SOFTWARE_WRITE_WATCH_FOR_GC_HEAP
UPDATE_WRITE_WATCH_TABLE \name, r0, 0, r12
#endif
UPDATE_CARD_TABLE \name, r0, r1, 0, \post, r0
UPDATE_CARD_TABLE \name, r0, r1, 0, \post, r12
1:
bx lr
LEAF_END_MARKED \name, _TEXT
@ -590,7 +608,7 @@ LOCAL_LABEL(stackProbe_loop):
#ifdef FEATURE_USE_SOFTWARE_WRITE_WATCH_FOR_GC_HEAP
UPDATE_WRITE_WATCH_TABLE \name, r0, 1, r12
#endif
UPDATE_CARD_TABLE \name, r0, r1, 1, \post, r0
UPDATE_CARD_TABLE \name, r0, r1, 1, \post, r12
bx lr
1:
str r1, [r0]
@ -631,6 +649,9 @@ LOCAL_LABEL(stackProbe_loop):
.word __\name\()__g_card_table_offset
#ifdef FEATURE_USE_SOFTWARE_WRITE_WATCH_FOR_GC_HEAP
.word __\name\()__g_write_watch_table_offset
#endif
#ifdef FEATURE_MANUALLY_MANAGED_CARD_BUNDLES
.word __\name\()__g_card_bundle_table_offset
#endif
.endm

6
src/coreclr/vm/arm/patchedcode.S
View File

@ -26,17 +26,17 @@
// See ValidateWriteBarriers on how the sizes of these should be calculated
.align 4
LEAF_ENTRY JIT_WriteBarrier, _TEXT
.space (0xA8)
.space (0xC8)
LEAF_END_MARKED JIT_WriteBarrier, _TEXT
.align 4
LEAF_ENTRY JIT_CheckedWriteBarrier, _TEXT
.space (0xC0)
.space (0xE0)
LEAF_END_MARKED JIT_CheckedWriteBarrier, _TEXT
.align 4
LEAF_ENTRY JIT_ByRefWriteBarrier, _TEXT
.space (0xC4)
.space (0xE4)
LEAF_END_MARKED JIT_ByRefWriteBarrier , _TEXT
LEAF_ENTRY JIT_PatchedWriteBarrierLast, _TEXT

6
src/coreclr/vm/arm/stubs.cpp
View File

@ -294,6 +294,9 @@ struct WriteBarrierDescriptor
#ifdef FEATURE_USE_SOFTWARE_WRITE_WATCH_FOR_GC_HEAP
DWORD m_dw_g_write_watch_table_offset;// Offset of the instruction reading g_write_watch_table
#endif
#ifdef FEATURE_MANUALLY_MANAGED_CARD_BUNDLES
DWORD m_dw_g_card_bundle_table_offset; //Offset of the instruction reading g_card_bundle_table_offset
#endif
};
// Infrastructure used for mapping of the source and destination of current WB patching
@ -464,6 +467,9 @@ void UpdateGCWriteBarriers(bool postGrow = false)
GWB_PATCH_OFFSET(g_card_table);
#ifdef FEATURE_USE_SOFTWARE_WRITE_WATCH_FOR_GC_HEAP
GWB_PATCH_OFFSET(g_write_watch_table);
#endif
#ifdef FEATURE_MANUALLY_MANAGED_CARD_BUNDLES
GWB_PATCH_OFFSET(g_card_bundle_table);
#endif
}

5
src/coreclr/vm/gchelpers.inl
View File

@ -23,10 +23,7 @@
static const int card_bundle_byte_shift = 21;
#else
static const int card_byte_shift = 10;
#ifdef FEATURE_MANUALLY_MANAGED_CARD_BUNDLES
#error Manually managed card bundles are currently only implemented for AMD64.
#endif
static const int card_bundle_byte_shift = 20;
#endif
FORCEINLINE void InlinedSetCardsAfterBulkCopyHelper(Object **start, size_t len)