anolis: sw64: ioremap: map some IO space with ioremap

ANBZ: #4688

Since we have generic ioremap, this patch replaces __va() with ioremap()
for IO mapping of RC, EP, PIU and usb xhci.

Signed-off-by: Gao Chen <gaochen@wxiat.com>
Reviewed-by: He Sheng <hesheng@wxiat.com>
Signed-off-by: Gu Zitao <guzitao@wxiat.com>
Reviewed-by: Min Li <gumi@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/5372
This commit is contained in:
Gao Chen 2025-05-09 23:29:14 +08:00 committed by 小龙
parent 8aab542c97
commit 686911fecc
3 changed files with 11 additions and 5 deletions

View File

@ -48,6 +48,7 @@ enum SUNWAY_PIU_IOR0 {
PCACHE_ACCESS = 0xb880UL,
PCACHE_ITEM_TAG = 0xb900UL,
PCACHE_ITEM_DATA0 = 0xb980UL,
SUNWAY_PIU_IOR0_SIZE = 0xba00UL,
};
enum SUNWAY_PIU_IOR1 {
@ -57,6 +58,7 @@ enum SUNWAY_PIU_IOR1 {
RCDEBUGINF1 = 0xc80UL,
DCACONTROL = 0x1a00UL,
DEVICEID0 = 0x1a80UL,
SUNWAY_PIU_IOR1_SIZE = 0x1b00UL,
};
enum SUNWAY_RC {
@ -78,6 +80,7 @@ enum SUNWAY_RC {
RC_PHY_INT_REG = 0x80000UL,
RC_PHY_EXT_GEN1 = 0x82400UL,
RC_PHY_EXT_GEN2 = 0x82480UL,
SUNWAY_RC_SIZE = 0x82500UL,
};
struct pci_dev;

View File

@ -867,10 +867,9 @@ static int pci_prepare_controller(struct pci_controller *hose,
hose->dense_mem_base = props[PROP_PCIE_IO_BASE];
hose->dense_io_base = props[PROP_EP_IO_BASE];
hose->rc_config_space_base = __va(props[PROP_RC_CONFIG_BASE]);
hose->ep_config_space_base = __va(props[PROP_EP_CONFIG_BASE]);
hose->piu_ior0_base = __va(props[PROP_PIU_IOR0_BASE]);
hose->piu_ior1_base = __va(props[PROP_PIU_IOR1_BASE]);
hose->rc_config_space_base = ioremap(props[PROP_RC_CONFIG_BASE], SUNWAY_RC_SIZE);
hose->piu_ior0_base = ioremap(props[PROP_PIU_IOR0_BASE], SUNWAY_PIU_IOR0_SIZE);
hose->piu_ior1_base = ioremap(props[PROP_PIU_IOR1_BASE], SUNWAY_PIU_IOR1_SIZE);
hose->first_busno = 0xff;
hose->last_busno = 0xff;
@ -966,6 +965,8 @@ static int sunway_pci_ecam_init(struct pci_config_window *cfg)
if (!hose)
return -ENOMEM;
hose->ep_config_space_base = cfg->win;
/* Init pci_controller */
ret = pci_prepare_controller(hose, fwnode);
if (ret) {

View File

@ -1321,7 +1321,7 @@ fixup_usb_xhci_reset(struct pci_dev *dev)
if (offset == 0)
return;
base = (void *)__va(SW64_PCI_IO_BASE(hose->node, hose->index) | offset);
base = ioremap(SW64_PCI_IO_BASE(hose->node, hose->index) | offset, SZ_8K);
ext_cap_offset = xhci_find_next_ext_cap(base, 0, XHCI_EXT_CAPS_LEGACY);
if (!ext_cap_offset)
@ -1408,6 +1408,8 @@ retry:
pci_read_config_dword(dev, PCI_COMMAND, &tmp);
tmp &= ~(PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
pci_write_config_dword(dev, PCI_COMMAND, tmp);
iounmap(base);
}
DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID,
PCI_CLASS_SERIAL_USB_XHCI, 0, fixup_usb_xhci_reset);