Commit Graph

948 Commits

Author SHA1 Message Date
Dan Carpenter e0827388ba stm class: Fix a double free in stm_register_device()
ANBZ: #12940

commit 3df463865b upstream.

The put_device(&stm->dev) call will trigger stm_device_release() which
frees "stm" so the vfree(stm) on the next line is a double free.

Fixes: 389b6699a2 ("stm class: Fix stm device initialization order")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Link: https://lore.kernel.org/r/20240429130119.1518073-2-alexander.shishkin@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Fixes: CVE-2024-38627
Signed-off-by: Xiao Long <xiaolong@openanolis.org>
Signed-off-by: 362994 <362994>
Reviewed-by: Guixin Liu <kanie@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/4322
2025-03-31 02:09:55 +00:00
wangkaiyuan 772fd766e9 anolis: intel_th: replaces spin_lock with mutex_lock
ANBZ: #13367

Call Trace:
 <TASK>
 dump_stack_lvl+0x36/0x50
 __schedule_bug+0x52/0x60
 __schedule+0x5bb/0x700
 ? selinux_kernfs_init_security+0x5b/0x200
 schedule+0x5e/0xd0
 schedule_preempt_disabled+0x15/0x30
 rwsem_down_write_slowpath+0x208/0x4e0
 down_write+0x5b/0x60
 kernfs_add_one+0x38/0x150
 kernfs_create_link+0x64/0xb0
 sysfs_do_create_link_sd+0x63/0xe0
 bus_add_device+0x6c/0x140
 device_add+0x3b6/0x6f0
 intel_th_subdevice_alloc+0x1b8/0x320 [intel_th]
 ? rpm_suspend+0x687/0x6a0
 ? rwsem_wake.isra.0+0x69/0x90
 ? rpm_check_suspend_allowed+0x54/0xb0
 intel_th_alloc+0x1d6/0x350 [intel_th]
 intel_th_pci_probe+0x327/0x370 [intel_th_pci]
 local_pci_probe+0x42/0xa0
 p ci_call_probe+0x51/0x160
 pci_device_probe+0x83/0x100
 ? driver_sysfs_add+0x5d/0xc0
 really_probe+0x1ae/0x410
 ? __pfx___driver_attach+0x10/0x10
 __driver_probe_device+0x7b/0x160
 driver_probe_device+0x1f/0x90
 __driver_attach+0xd8/0x1d0
 bus_for_each_dev+0x74/0xc0
 bus_add_driver+0x115/0x240
 driver_register+0x59/0x100
 ? __pfx_intel_th_pci_driver_init+0x10/0x10 [intel_th_pci]
 do_one_initcall+0x47/0x300
 ? kmalloc_trace+0x2a/0xa0
 do_init_module+0x60/0x240
 init_module_from_file+0x86/0xc0
 idempotent_init_module+0x109/0x300
 __x64_sys_finit_module+0x5e/0xb0
 do_syscall_64+0x38/0x80
 entry_SYSCALL_64_after_hwframe+0x78/0xe2
RIP: 0033:0x7f5afb1ea9cd
RSP: 002b:00007fffbc3da6e8 EFLAGS: 00000246 ORIG_RAX: 0000000000000139
RAX: ffffffffffffffda RBX: 000055711345d260 RCX: 00007f5afb1ea9cd
RDX: 0000000000000000 RSI: 00007f5afb6f283d RDI: 000000000000000f
RBP: 0000000000020000 R08: 0000000000000000 R09: 00007fffbc3da810
R10: 000000000000000f R11: 0000000000000246 R12: 00007f5afb6f283d
R13: 0000000000000000 R14: 000055711346e2c0 R15: 000055711345d260

Fixes: 203ec762ca ("anolis: intel_th: Fixing occasional device number duplication issue with intel_th driver.")
Signed-off-by: wangkaiyuan <wangkaiyuan@inspur.com>
Reviewed-by: Bitao Hu <yaoma@linux.alibaba.com>
Reviewed-by: Guixin Liu <kanie@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/4757
2025-03-10 06:46:59 +00:00
daichx 203ec762ca anolis: intel_th: Fixing occasional device number duplication issue with intel_th driver.
ANBZ: #13367

[   14.101120] sysfs: cannot create duplicate filename '/dev/char/237:2'
[   14.107705] CPU: 1 PID: 849 Comm: modprobe Tainted: G           OE     4.19.91-26.4.3.kos5.x86_64 #1
[   14.116971] Hardware name: IEITSYSTEMS Qingqiu/Qingqiu, BIOS 1.02.08 03/21/2024
[   14.124415] Call Trace:
[   14.127007]  dump_stack+0x66/0x90
[   14.130462]  sysfs_warn_dup.cold.0+0x17/0x23
[   14.134871]  sysfs_do_create_link_sd.isra.0+0xaa/0xd0
[   14.140060]  device_add+0x5d5/0x690
[   14.143683]  intel_th_subdevice_alloc+0x385/0x450 [intel_th]
[   14.149477]  ? add_dr+0x35/0x60
[   14.152752]  ? add_dr+0x35/0x60
[   14.156026]  intel_th_output_enable+0xaf/0xe0 [intel_th]
[   14.161471]  intel_th_gth_probe+0x216/0x4a0 [intel_th_gth]
[   14.167090]  ? mutex_unlock+0x5/0x30
[   14.170801]  ? kernfs_remove_by_name_ns+0x5b/0x90
[   14.175639]  intel_th_probe+0x69/0x120 [intel_th]
[   14.180478]  really_probe+0x23e/0x390
[   14.184270]  driver_probe_device+0xd1/0x110
[   14.188585]  __driver_attach+0xea/0x110
[   14.192551]  ? driver_probe_device+0x110/0x110
[   14.197126]  ? driver_probe_device+0x110/0x110
[   14.201703]  bus_for_each_dev+0x63/0x90
[   14.205673]  bus_add_driver+0x152/0x230
[   14.209640]  ? 0xffffffffc0404000
[   14.210395] ngbe 0000:43:00.0: 4.000 Gb/s available PCIe bandwidth, limited by 5 GT/s x1 link at 0000:00:17.0 (capable of 16.000 Gb/s with 5 GT/s x4 link)
[   14.213086]  driver_register+0x6b/0xb0
[   14.213089]  ? 0xffffffffc0404000
[   14.213096]  do_one_initcall+0x46/0x1c3
[   14.233611] ngbe 0000:43:00.0 eth0: NCSI : support
[   14.234372]  ? free_unref_page_commit+0x9b/0x110
[   14.234377]  ? memcg_kmem_put_cache+0x5/0x50
[   14.238346] ngbe 0000:43:00.0 eth0: PHY: Internal, PBA No: Wang Xun GbE Family Controller
[   14.243264]  ? kmem_cache_alloc_trace+0x145/0x190
[   14.243267]  ? do_init_module+0x22/0x210
[   14.243272]  do_init_module+0x5a/0x210
[   14.248026] ngbe 0000:43:00.0 eth0: 02:02:03:15:01:01
[   14.252423]  load_module+0x1519/0x15d0
[   14.252429]  ? __se_sys_finit_module+0x82/0xc0
[   14.260737] ngbe 0000:43:00.0 eth0: Enabled Features: RxQ: 4 TxQ: 4
[   14.265569]  __se_sys_finit_module+0x82/0xc0
[   14.265573]  do_syscall_64+0x5f/0x1b0

Signed-off-by: daichx <daichx@inspur.com>
Signed-off-by: Bo Liu <liubo03@inspur.com>
Reviewed-by: Bitao Hu <yaoma@linux.alibaba.com>
Reviewed-by: Guixin Liu <kanie@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/4470
2025-01-15 07:53:54 +00:00
Alexander Shishkin c7365616f1 intel_th: pci: Add Sapphire Rapids SOC support
ANBZ: #9831

commit 2e1da7efab upstream.

Add support for the Trace Hub in Sapphire Rapids SOC.

Intel-SIG: commit 2e1da7efab intel_th: pci: Add Sapphire Rapids SOC support
Backport Intel trace hub support on SPR and GNR to kernel v5.10.

Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: stable@kernel.org
Link: https://lore.kernel.org/r/20240429130119.1518073-13-alexander.shishkin@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Xiaolong Wang: amend commit log ]
Signed-off-by: Xiaolong Wang <xiaolong.wang@intel.com>
Reviewed-by: Artie Ding <artie.ding@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/3785
2024-09-05 02:06:43 +00:00
Alexander Shishkin 4d0c537fa0 intel_th: pci: Add Granite Rapids SOC support
ANBZ: #9831

commit 854afe461b upstream.

Add support for the Trace Hub in Granite Rapids SOC.

Intel-SIG: commit 854afe461b intel_th: pci: Add Granite Rapids SOC support
Backport Intel trace hub support on SPR and GNR to kernel v5.10.

Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: stable@kernel.org
Link: https://lore.kernel.org/r/20240429130119.1518073-12-alexander.shishkin@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Xiaolong Wang: amend commit log ]
Signed-off-by: Xiaolong Wang <xiaolong.wang@intel.com>
Reviewed-by: Artie Ding <artie.ding@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/3785
2024-09-05 02:06:43 +00:00
Alexander Shishkin d59ec4cc65 intel_th: pci: Add Granite Rapids support
ANBZ: #9831

commit e44937889b upstream.

Add support for the Trace Hub in Granite Rapids.

Intel-SIG: commit e44937889b intel_th: pci: Add Granite Rapids support
Backport Intel trace hub support on SPR and GNR to kernel v5.10.

Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: stable@kernel.org
Link: https://lore.kernel.org/r/20240429130119.1518073-11-alexander.shishkin@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Xiaolong Wang: amend commit log ]
Signed-off-by: Xiaolong Wang <xiaolong.wang@intel.com>
Reviewed-by: Artie Ding <artie.ding@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/3785
2024-09-05 02:06:43 +00:00
Ruidong Tian 43d26d7cf6 coresight: tmc: Explicit type conversions to prevent integer overflow
ANBZ: #6180

commit fd380097cd upstream.

Perf cs_etm session executed unexpectedly when AUX buffer > 1G.

  perf record -C 0 -m ,2G -e cs_etm// -- <workload>
  [ perf record: Captured and wrote 2.615 MB perf.data ]

Perf only collect about 2M perf data rather than 2G. This is becasuse
the operation, "nr_pages << PAGE_SHIFT", in coresight tmc driver, will
overflow when nr_pages >= 0x80000(correspond to 1G AUX buffer). The
overflow cause buffer allocation to fail, and TMC driver will alloc
minimal buffer size(1M). You can just get about 2M perf data(1M AUX
buffer + perf data header) at least.

Explicit convert nr_pages to 64 bit to avoid overflow.

Fixes: 22f429f19c ("coresight: etm-perf: Add support for ETR backend")
Fixes: 99443ea19e ("coresight: Add generic TMC sg table framework")
Fixes: 2e499bbc1a ("coresight: tmc: implementing TMC-ETF AUX space API")
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: James Clark <james.clark@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230804081514.120171-2-tianruidong@linux.alibaba.com
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/2059
2023-08-17 15:40:54 +08:00
James Clark 2526e60c23 coresight: cti: Remove atomic type from enable_req_count
ANBZ: #6180

commit 479043b778 upstream.

enable_req_count is only ever accessed inside the spinlock, so to avoid
confusion that there are concurrent accesses and simplify the code,
change it to an int.

One access outside of the spinlock is in enable_show() which appears to
allow partially written data to be displayed between enable_req_count,
powered and enabled so move this one inside the spin lock too.

Signed-off-by: James Clark <james.clark@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230110110736.2709917-4-james.clark@arm.com
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/2059
2023-08-17 15:40:53 +08:00
Mao Jinlong 31b31af7c6 coresight: cti: Add PM runtime call in enable_store
ANBZ: #6180

commit eff674a9b8 upstream.

In commit 6746eae4bb ("coresight: cti: Fix hang in cti_disable_hw()")
PM runtime calls are removed from cti_enable_hw/cti_disable_hw. When
enabling CTI by writing enable sysfs node, clock for accessing CTI
register won't be enabled. Device will crash due to register access
issue. Add PM runtime call in enable_store to fix this issue.

Fixes: 6746eae4bb ("coresight: cti: Fix hang in cti_disable_hw()")
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
[Change to only call pm_runtime_put if a disable happened]
Tested-by: Jinlong Mao <quic_jinlmao@quicinc.com>
Signed-off-by: James Clark <james.clark@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230110110736.2709917-3-james.clark@arm.com
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/2059
2023-08-17 15:40:53 +08:00
James Clark 2ae490026f coresight: cti: Prevent negative values of enable count
ANBZ: #6180

commit 3244fb6dbb upstream.

Writing 0 to the enable control repeatedly results in a negative value
for enable_req_count. After this, writing 1 to the enable control
appears to not work until the count returns to positive.

Change it so that it's impossible for enable_req_count to be < 0.
Return an error to indicate that the disable request was invalid.

Fixes: 835d722ba1 ("coresight: cti: Initial CoreSight CTI Driver")
Tested-by: Jinlong Mao <quic_jinlmao@quicinc.com>
Signed-off-by: James Clark <james.clark@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230110110736.2709917-2-james.clark@arm.com
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/2059
2023-08-17 15:40:53 +08:00
Junhao He 8a8db85788 coresight: etm4x: Fix accesses to TRCSEQRSTEVR and TRCSEQSTR
ANBZ: #6180

commit 589d928248 upstream.

The TRCSEQRSTEVR and TRCSEQSTR registers are not implemented if the
TRCIDR5.NUMSEQSTATE == 0. Skip accessing the registers in such cases.

Fixes: 2e1cdfe184 ("coresight-etm4x: Adding CoreSight ETM4x driver")
Signed-off-by: Junhao He <hejunhao3@huawei.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230114091632.60095-1-hejunhao3@huawei.com
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/2059
2023-08-17 15:40:53 +08:00
Ruidong Tian 0f72dc2f44 coresight: perf: Release Coresight path when alloc trace id failed
ANBZ: #6180

commit 04ac7f98b9 upstream.

Error handler for etm_setup_aux can not release coresight path because
cpu mask was cleared when coresight_trace_id_get_cpu_id failed.

Call coresight_release_path function explicitly when alloc trace id filed.

Fixes: 4ff1fdb412 ("coresight: perf: traceid: Add perf ID allocation and notifiers")
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230425032416.125542-1-tianruidong@linux.alibaba.com
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/2059
2023-08-17 15:40:53 +08:00
Dan Carpenter 403472df8e coresight: Fix signedness bug in tmc_etr_buf_insert_barrier_packet()
ANBZ: #6180

commit f67bc15e52 upstream.

This code generates a Smatch warning:

    drivers/hwtracing/coresight/coresight-tmc-etr.c:947 tmc_etr_buf_insert_barrier_packet()
    error: uninitialized symbol 'bufp'.

The problem is that if tmc_sg_table_get_data() returns -EINVAL, then
when we test if "len < CORESIGHT_BARRIER_PKT_SIZE", the negative "len"
value is type promoted to a high unsigned long value which is greater
than CORESIGHT_BARRIER_PKT_SIZE.  Fix this bug by adding an explicit
check for error codes.

Fixes: 75f4e3619f ("coresight: tmc-etr: Add transparent buffer management")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/7d33e244-d8b9-4c27-9653-883a13534b01@kili.mountain
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/2059
2023-08-17 15:40:53 +08:00
Suzuki K Poulose 14a53a6d38 coresight: etm_pmu: Set the module field
ANBZ: #6180

commit 18996a113f upstream.

struct pmu::module must be set to the module owning the PMU driver.
Set this for the coresight etm_pmu.

Fixes: 8e264c52e1 ("coresight: core: Allow the coresight core driver to be built as a module")
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230405094922.667834-1-suzuki.poulose@arm.com
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/2059
2023-08-17 15:40:53 +08:00
Suzuki K Poulose 49271c9da7 coresight: etm4x: Do not access TRCIDR1 for identification
ANBZ: #6180

commit 735e7b30a5 upstream.

CoreSight ETM4x architecture clearly provides ways to identify a device
via registers in the "Management" class, TRCDEVARCH and TRCDEVTYPE. These
registers can be accessed without the Trace domain being powered on.
We additionally added TRCIDR1 as fallback in order to cover for any
ETMs that may not have implemented TRCDEVARCH. So far, nobody has
reported hitting a WARNING we placed to catch such systems.

Also, more importantly it is problematic to access TRCIDR1, which is a
"Trace" register via MMIO access, without clearing the OSLK. But we cannot
mess with the OSLK until we know for sure that this is an ETMv4 device.
Thus, this kind of creates a chicken and egg problem unnecessarily for
systems "which are compliant" to the ETMv4 architecture.

Let us remove the TRCIDR1 fall back check and rely only on TRCDEVARCH.

Fixes: 8b94db1eda ("coresight: etm4x: Use TRCDEVARCH for component discovery")
Cc: stable@vger.kernel.org
Reported-by: Steve Clevenger <scclevenger@os.amperecomputing.com>
Link: https://lore.kernel.org/all/143540e5623d4c7393d24833f2b80600d8d745d2.1677881753.git.scclevenger@os.amperecomputing.com/
Cc: Mike Leach <mike.leach@linaro.org>
Cc: James Clark <james.clark@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230321104530.1547136-1-suzuki.poulose@arm.com
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/2059
2023-08-17 15:40:53 +08:00
Steve Clevenger a24cdfcc1b coresight-etm4: Fix for() loop drvdata->nr_addr_cmp range bug
ANBZ: #6180

commit bf84937e88 upstream.

In etm4_enable_hw, fix for() loop range to represent address comparator pairs.

Fixes: 2e1cdfe184 ("coresight-etm4x: Adding CoreSight ETM4x driver")
Cc: stable@vger.kernel.org
Signed-off-by: Steve Clevenger <scclevenger@os.amperecomputing.com>
Reviewed-by: James Clark <james.clark@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/4a4ee61ce8ef402615a4528b21a051de3444fb7b.1677540079.git.scclevenger@os.amperecomputing.com
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/2059
2023-08-17 15:40:53 +08:00
Yabin Cui f525f9f003 coresight: tmc: Don't enable TMC when it's not ready.
ANBZ: #6180

commit 669c461423 upstream.

If TMC ETR is enabled without being ready, in later use we may
see AXI bus errors caused by accessing invalid addresses.

Signed-off-by: Yabin Cui <yabinc@google.com>
[ Tweak error message ]
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230127231001.1920947-1-yabinc@google.com
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/2059
2023-08-17 15:40:52 +08:00
Suzuki K Poulose dba5963817 coresight: perf: Output trace id only once
ANBZ: #6180

commit a646ca099b upstream.

With the dynamic traceid allocation scheme in, we output the
AUX_OUTPUT_HWID packet every time event->start() is called.
This could cause too many such records in the perf.data,
while only one per CPU throughout the life time of
the event is required. Make sure we only output it once.

Before this patch:
  $ perf report -D | grep OUTPUT_HW_ID
  ...
  AUX_OUTPUT_HW_ID events:         55  (18.3%)

After this patch:

 $ perf report -D | grep OUTPUT_HW_ID
 ...
 AUX_OUTPUT_HW_ID events:          5  ( 1.9%)

Cc: Mike Leach <mike.leach@linaro.org>
Cc: James Clark <james.clark@arm.com>
Cc: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: James Clark <james.clark@arm.com>
Link: https://lore.kernel.org/r/20230120103434.864318-1-suzuki.poulose@arm.com
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/2059
2023-08-17 15:40:52 +08:00
Suzuki K Poulose 93bd06262d coresight: Fix uninitialised variable use in coresight_disable
ANBZ: #6180

commit 0c507af711 upstream.

Kernel test robot reports:

 drivers/hwtracing/coresight/coresight-core.c:1176:7: warning: variable
 'hash' is used uninitialized whenever switch case is taken
 [-Wsometimes-uninitialized]

	case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC:
	      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 drivers/hwtracing/coresight/coresight-core.c:1195:24: note: uninitialized
 use occurs here
		idr_remove(&path_idr, hash);
		                      ^~~~
Fix this by moving the usage of the hash variable to where it actually
should have been.

Cc: Mao Jinlong <quic_jinlmao@quicinc.com>
Link: https://lkml.kernel.org/r/202301211339.9mU0dccO-lkp@intel.com
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: James Clark <james.clark@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lkml.kernel.org/r/20230123164700.1074064-1-suzuki.poulose@arm.com
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/2059
2023-08-17 15:40:52 +08:00
Mao Jinlong eabafc6310 coresight: core: Use IDR for non-cpu bound sources' paths.
ANBZ: #6180

commit 5c0016d7b3 upstream.

Except stm, there could be other sources which are not associated
with cpus. Use IDR to store and search these sources' paths.

Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230117145708.16739-2-quic_jinlmao@quicinc.com
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/2059
2023-08-17 15:40:52 +08:00
Mike Leach 45cc4fbb81 coresight: trace-id: Add debug & test macros to Trace ID allocation
ANBZ: #6186

commit fd30b085de updtream.

Adds in a number of pr_debug macros to allow the debugging and test of
the trace ID allocation system.

Signed-off-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230116124928.5440-15-mike.leach@linaro.org
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/2055
2023-08-17 03:43:42 +00:00
Mike Leach a3be8bfc3f coresight: events: PERF_RECORD_AUX_OUTPUT_HW_ID used for Trace ID
ANBZ: #6186

commit aa19bb4c35 updtream.

Use the perf_report_aux_output_id() call to output the CoreSight trace ID
and associated CPU as a PERF_RECORD_AUX_OUTPUT_HW_ID record in the
perf.data file.

Signed-off-by: Mike Leach <mike.leach@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230116124928.5440-14-mike.leach@linaro.org
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/2055
2023-08-17 03:43:42 +00:00
Mike Leach 066478912b coresight: etmX.X: stm: Remove trace_id() callback
ANBZ: #6186

commit 42708bac18 updtream.

CoreSight sources provide a callback (.trace_id) in the standard source
ops which returns the ID to the core code. This was used to check that
sources all had a unique Trace ID.

Uniqueness is now gauranteed by the Trace ID allocation system, and the
check code has been removed from the core.

This patch removes the unneeded and unused .trace_id source ops
from the ops structure and implementations in etm3x, etm4x and stm.

Signed-off-by: Mike Leach <mike.leach@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230116124928.5440-8-mike.leach@linaro.org
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/2055
2023-08-17 03:43:42 +00:00
Mike Leach 712178511f coresight: etm3x: Update ETM3 driver to use Trace ID API
ANBZ: #6168

commit 9edf291091 updtream.

Use the TraceID API to allocate ETM trace IDs dynamically.

As with the etm4x we allocate on enable / disable for perf,
allocate on enable / reset for sysfs.

Additionally we allocate on sysfs file read as both perf and sysfs
can read the ID before enabling the hardware.

Remove sysfs option to write trace ID - which is inconsistent with
both the dynamic allocation method and the fixed allocation method
previously used.

Signed-off-by: Mike Leach <mike.leach@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230116124928.5440-7-mike.leach@linaro.org
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/2055
2023-08-17 03:43:42 +00:00
Mike Leach c3246d2f63 coresight: etm4x: Update ETM4 driver to use Trace ID API
ANBZ: #6168

commit df4871204e upstream.

The trace ID API is now used to allocate trace IDs for ETM4.x / ETE
devices.

For perf sessions, these will be allocated on enable, and released on
disable.

For sysfs sessions, these will be allocated on enable, but only released
on reset. This allows the sysfs session to interrogate the Trace ID used
after the session is over - maintaining functional consistency with the
previous allocation scheme.

The trace ID will also be allocated on read of the mgmt/trctraceid file.
This ensures that if perf or sysfs read this before enabling trace, the
value will be the one used for the trace session.

Trace ID initialisation is removed from the _probe() function.

Signed-off-by: Mike Leach <mike.leach@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230116124928.5440-6-mike.leach@linaro.org
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/2055
2023-08-17 03:43:42 +00:00
Mike Leach 93f7c8401b coresight: stm: Update STM driver to use Trace ID API
ANBZ: #6168

commit 8d1091c785 updtream.

Updates the STM driver to use the trace ID allocation API.
This uses the _system_id calls to allocate an ID on device poll,
and release on device remove.

The sysfs access to the STMTRACEIDR register has been changed from RW
to RO. Having this value as writable is not appropriate for the new
Trace ID scheme - and had potential to cause errors in the previous
scheme if values clashed with other sources.

Signed-off-by: Mike Leach <mike.leach@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230116124928.5440-5-mike.leach@linaro.org
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/2055
2023-08-17 03:43:42 +00:00
Mike Leach f9e23169eb coresight: perf: traceid: Add perf ID allocation and notifiers
ANBZ: #6168

commit 4ff1fdb412 upstream.

Adds in calls to allocate and release Trace ID for the CPUs in use
by the perf session.

Adds in notifier calls to the trace ID allocator that perf
events are starting and stopping.

This ensures that Trace IDs associated with CPUs remain the same
throughout the perf session, and are only released when all perf
sessions are complete.

Signed-off-by: Mike Leach <mike.leach@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230116124928.5440-4-mike.leach@linaro.org
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/2055
2023-08-17 03:43:42 +00:00
Mike Leach 3764e0a7f2 coresight: Remove obsolete Trace ID unniqueness checks
ANBZ: #6168

commit 338a588e9d upstream.

The checks for sources to have unique IDs has been removed - this is now
guaranteed by the ID allocation mechanisms, and inappropriate where
multiple ID maps are in use in larger systems

Signed-off-by: Mike Leach <mike.leach@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230116124928.5440-3-mike.leach@linaro.org
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/2055
2023-08-17 03:43:42 +00:00
Mike Leach 991ae71090 coresight: trace-id: Add API to dynamically assign Trace ID values
ANBZ: #6168

commit 338a588e9d upstream.

The existing mechanism to assign Trace ID values to sources is limited
and does not scale for larger multicore / multi trace source systems.

The API introduces functions that reserve IDs based on availabilty
represented by a coresight_trace_id_map structure. This records the
used and free IDs in a bitmap.

CPU bound sources such as ETMs use the coresight_trace_id_get_cpu_id
coresight_trace_id_put_cpu_id pair of functions. The API will record
the ID associated with the CPU. This ensures that the same ID will be
re-used while perf events are active on the CPU. The put_cpu_id function
will pend release of the ID until all perf cs_etm sessions are complete.

For backward compatibility the functions will attempt to use the same
CPU IDs as the legacy system would have used if these are still available.

Non-cpu sources, such as the STM can use coresight_trace_id_get_system_id /
coresight_trace_id_put_system_id.

Signed-off-by: Mike Leach <mike.leach@linaro.org>
[ Fix checkpatch warning in drivers/hwtracing/coresight/coresight-trace-id.c ]
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230116124928.5440-2-mike.leach@linaro.org
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/2055
2023-08-17 03:43:42 +00:00
Jilin Yuan 9c9ddac69a coresight: etm4x: fix repeated words in comments
ANBZ: #3814

commit c767c34740 upstream

Delete the redundant word 'the'.

Signed-off-by: Jilin Yuan <yuanjilin@cdjrlc.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20221019124953.45885-1-yuanjilin@cdjrlc.com
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/1222
2023-02-21 11:22:53 +00:00
Mike Leach 7891704d57 coresight: cti: Fix null pointer error on CTI init before ETM
ANBZ: #3814

commit 3dc228b353 upstream

When CTI is discovered first then the function
coresight_set_assoc_ectdev_mutex() is called to set the association
between CTI and ETM device. Recent lockdep fix passes a null pointer.

This patch passes the correct pointer.

Before patch: log of boot oops sequence with CTI discovered first:

[   12.424091]  cs_system_cfg: CoreSight Configuration manager initialised
[   12.483474] coresight cti_sys0: CTI initialized
[   12.488109] coresight cti_sys1: CTI initialized
[   12.503594] coresight cti_cpu0: CTI initialized
[   12.517877] coresight-cpu-debug 850000.debug: Coresight debug-CPU0 initialized
[   12.523479] coresight-cpu-debug 852000.debug: Coresight debug-CPU1 initialized
[   12.529926] coresight-cpu-debug 854000.debug: Coresight debug-CPU2 initialized
[   12.541808] coresight stm0: STM32 initialized
[   12.544421] coresight-cpu-debug 856000.debug: Coresight debug-CPU3 initialized
[   12.585639] coresight cti_cpu1: CTI initialized
[   12.614028] coresight cti_cpu2: CTI initialized
[   12.631679] CSCFG registered etm0
[   12.633920] coresight etm0: CPU0: etm v4.0 initialized
[   12.656392] coresight cti_cpu3: CTI initialized

...

[   12.708383] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000348

...

[   12.755094] Internal error: Oops: 0000000096000044 [#1] SMP
[   12.761817] Modules linked in: coresight_etm4x(+) coresight_tmc coresight_cpu_debug coresight_replicator coresight_funnel coresight_cti coresight_tpiu coresight_stm coresight
[   12.767210] CPU: 3 PID: 1346 Comm: systemd-udevd Not tainted 6.1.0-rc3tid-v6tid-v6-235166-gf7f7d7a2204a-dirty #498
[   12.782827] Hardware name: Qualcomm Technologies, Inc. APQ 8016 SBC (DT)
[   12.793154] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[   12.800010] pc : coresight_set_assoc_ectdev_mutex+0x30/0x50 [coresight]
[   12.806694] lr : coresight_set_assoc_ectdev_mutex+0x30/0x50 [coresight]

...

[   12.885064] Call trace:
[   12.892352]  coresight_set_assoc_ectdev_mutex+0x30/0x50 [coresight]
[   12.894693]  cti_add_assoc_to_csdev+0x144/0x1b0 [coresight_cti]
[   12.900943]  coresight_register+0x2c8/0x320 [coresight]
[   12.906844]  etm4_add_coresight_dev.isra.27+0x148/0x280 [coresight_etm4x]
[   12.912056]  etm4_probe+0x144/0x1c0 [coresight_etm4x]
[   12.918998]  etm4_probe_amba+0x40/0x78 [coresight_etm4x]
[   12.924032]  amba_probe+0x11c/0x1f0

After patch: similar log

[   12.444467]  cs_system_cfg: CoreSight Configuration manager initialised
[   12.456329] coresight-cpu-debug 850000.debug: Coresight debug-CPU0 initialized
[   12.456754] coresight-cpu-debug 852000.debug: Coresight debug-CPU1 initialized
[   12.469672] coresight-cpu-debug 854000.debug: Coresight debug-CPU2 initialized
[   12.476098] coresight-cpu-debug 856000.debug: Coresight debug-CPU3 initialized
[   12.532409] coresight stm0: STM32 initialized
[   12.533708] coresight cti_sys0: CTI initialized
[   12.539478] coresight cti_sys1: CTI initialized
[   12.550106] coresight cti_cpu0: CTI initialized
[   12.633931] coresight cti_cpu1: CTI initialized
[   12.634664] coresight cti_cpu2: CTI initialized
[   12.638090] coresight cti_cpu3: CTI initialized
[   12.721136] CSCFG registered etm0

...

[   12.762643] CSCFG registered etm1
[   12.762666] coresight etm1: CPU1: etm v4.0 initialized
[   12.776258] CSCFG registered etm2
[   12.776282] coresight etm2: CPU2: etm v4.0 initialized
[   12.784357] CSCFG registered etm3
[   12.785455] coresight etm3: CPU3: etm v4.0 initialized

Error can also be triggered by manually starting the modules using modprobe
in the following order:

root@linaro-developer:/home/linaro/cs-mods# modprobe coresight
root@linaro-developer:/home/linaro/cs-mods# modprobe coresight-cti
root@linaro-developer:/home/linaro/cs-mods# modprobe coresight-etm4x

Tested on Dragonboard DB410c
Applies to coresight/next

Fixes: 23722fb467 ("coresight: Fix possible deadlock with lock dependency")
Signed-off-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20221123193818.6253-1-mike.leach@linaro.org
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/1222
2023-02-21 11:22:53 +00:00
Tamas Zsoldos 418f40928e coresight: etm4x: add CPU hotplug support for probing
ANBZ: #3814

commit 3c728e079d upstream

etm4x devices cannot be successfully probed when their CPU is offline.
For example, when booting with maxcpus=n, ETM probing will fail on
CPUs >n, and the probing won't be reattempted once the CPUs come
online. This will leave those CPUs unable to make use of ETM.

This change adds a mechanism to delay the probing if the corresponding
CPU is offline, and to try it again when the CPU comes online.

Signed-off-by: Tamas Zsoldos <tamas.zsoldos@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20220705145935.24679-1-tamas.zsoldos@arm.com
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/1222
2023-02-21 11:22:53 +00:00
James Clark fdfcf631cc coresight: cti: Fix hang in cti_disable_hw()
ANBZ: #3814

commit 6746eae4bb upstream

cti_enable_hw() and cti_disable_hw() are called from an atomic context
so shouldn't use runtime PM because it can result in a sleep when
communicating with firmware.

Since commit 3c66563378 ("Revert "firmware: arm_scmi: Add clock
management to the SCMI power domain""), this causes a hang on Juno when
running the Perf Coresight tests or running this command:

  perf record -e cs_etm//u -- ls

This was also missed until the revert commit because pm_runtime_put()
was called with the wrong device until commit 692c9a499b ("coresight:
cti: Correct the parameter for pm_runtime_put")

With lock and scheduler debugging enabled the following is output:

   coresight cti_sys0: cti_enable_hw -- dev:cti_sys0  parent: 20020000.cti
   BUG: sleeping function called from invalid context at drivers/base/power/runtime.c:1151
   in_atomic(): 1, irqs_disabled(): 128, non_block: 0, pid: 330, name: perf-exec
   preempt_count: 2, expected: 0
   RCU nest depth: 0, expected: 0
   INFO: lockdep is turned off.
   irq event stamp: 0
   hardirqs last  enabled at (0): [<0000000000000000>] 0x0
   hardirqs last disabled at (0): [<ffff80000822b394>] copy_process+0xa0c/0x1948
   softirqs last  enabled at (0): [<ffff80000822b394>] copy_process+0xa0c/0x1948
   softirqs last disabled at (0): [<0000000000000000>] 0x0
   CPU: 3 PID: 330 Comm: perf-exec Not tainted 6.0.0-00053-g042116d99298 #7
   Hardware name: ARM LTD ARM Juno Development Platform/ARM Juno Development Platform, BIOS EDK II Sep 13 2022
   Call trace:
    dump_backtrace+0x134/0x140
    show_stack+0x20/0x58
    dump_stack_lvl+0x8c/0xb8
    dump_stack+0x18/0x34
    __might_resched+0x180/0x228
    __might_sleep+0x50/0x88
    __pm_runtime_resume+0xac/0xb0
    cti_enable+0x44/0x120
    coresight_control_assoc_ectdev+0xc0/0x150
    coresight_enable_path+0xb4/0x288
    etm_event_start+0x138/0x170
    etm_event_add+0x48/0x70
    event_sched_in.isra.122+0xb4/0x280
    merge_sched_in+0x1fc/0x3d0
    visit_groups_merge.constprop.137+0x16c/0x4b0
    ctx_sched_in+0x114/0x1f0
    perf_event_sched_in+0x60/0x90
    ctx_resched+0x68/0xb0
    perf_event_exec+0x138/0x508
    begin_new_exec+0x52c/0xd40
    load_elf_binary+0x6b8/0x17d0
    bprm_execve+0x360/0x7f8
    do_execveat_common.isra.47+0x218/0x238
    __arm64_sys_execve+0x48/0x60
    invoke_syscall+0x4c/0x110
    el0_svc_common.constprop.4+0xfc/0x120
    do_el0_svc+0x34/0xc0
    el0_svc+0x40/0x98
    el0t_64_sync_handler+0x98/0xc0
    el0t_64_sync+0x170/0x174

Fix the issue by removing the runtime PM calls completely. They are not
needed here because it must have already been done when building the
path for a trace.

Fixes: 835d722ba1 ("coresight: cti: Initial CoreSight CTI Driver")
Cc: stable <stable@kernel.org>
Reported-by: Aishwarya TCV <Aishwarya.TCV@arm.com>
Reported-by: Cristian Marussi <Cristian.Marussi@arm.com>
Suggested-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: James Clark <james.clark@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Tested-by: Mike Leach <mike.leach@linaro.org>
[ Fix build warnings ]
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20221025131032.1149459-1-suzuki.poulose@arm.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/1222
2023-02-21 11:22:53 +00:00
Greg Kroah-Hartman 898a931521 Revert "coresight: cti: Fix hang in cti_disable_hw()"
ANBZ: #3814

commit d76308f03e upstream

This reverts commit 665c157e02.

It causes reported build warnings:

drivers/hwtracing/coresight/coresight-cti-core.c: In functio
n 'cti_enable_hw':
drivers/hwtracing/coresight/coresight-cti-core.c:93:24: warning: unused variable 'dev' [-Wunused-variable]
   93 |         struct device *dev = &drvdata->csdev->dev;
      |                        ^~~
drivers/hwtracing/coresight/coresight-cti-core.c: In function 'cti_disable_hw':
drivers/hwtracing/coresight/coresight-cti-core.c:154:24: warning: unused variable 'dev' [-Wunused-variable]
  154 |         struct device *dev = &drvdata->csdev->dev;
      |                        ^~~

Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Aishwarya TCV <Aishwarya.TCV@arm.com>
Cc: Cristian Marussi <Cristian.Marussi@arm.com>
Cc: Suzuki Poulose <Suzuki.Poulose@arm.com>
Cc: James Clark <james.clark@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Fixes: 665c157e02 ("coresight: cti: Fix hang in cti_disable_hw()")
Link: https://lore.kernel.org/r/20221024135752.2b83af97@canb.auug.org.au
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/1222
2023-02-21 11:22:53 +00:00
James Clark a2e6b11bd2 coresight: cti: Fix hang in cti_disable_hw()
ANBZ: #3814

commit 665c157e02 upstream

cti_enable_hw() and cti_disable_hw() are called from an atomic context
so shouldn't use runtime PM because it can result in a sleep when
communicating with firmware.

Since commit 3c66563378 ("Revert "firmware: arm_scmi: Add clock
management to the SCMI power domain""), this causes a hang on Juno when
running the Perf Coresight tests or running this command:

  perf record -e cs_etm//u -- ls

This was also missed until the revert commit because pm_runtime_put()
was called with the wrong device until commit 692c9a499b ("coresight:
cti: Correct the parameter for pm_runtime_put")

With lock and scheduler debugging enabled the following is output:

   coresight cti_sys0: cti_enable_hw -- dev:cti_sys0  parent: 20020000.cti
   BUG: sleeping function called from invalid context at drivers/base/power/runtime.c:1151
   in_atomic(): 1, irqs_disabled(): 128, non_block: 0, pid: 330, name: perf-exec
   preempt_count: 2, expected: 0
   RCU nest depth: 0, expected: 0
   INFO: lockdep is turned off.
   irq event stamp: 0
   hardirqs last  enabled at (0): [<0000000000000000>] 0x0
   hardirqs last disabled at (0): [<ffff80000822b394>] copy_process+0xa0c/0x1948
   softirqs last  enabled at (0): [<ffff80000822b394>] copy_process+0xa0c/0x1948
   softirqs last disabled at (0): [<0000000000000000>] 0x0
   CPU: 3 PID: 330 Comm: perf-exec Not tainted 6.0.0-00053-g042116d99298 #7
   Hardware name: ARM LTD ARM Juno Development Platform/ARM Juno Development Platform, BIOS EDK II Sep 13 2022
   Call trace:
    dump_backtrace+0x134/0x140
    show_stack+0x20/0x58
    dump_stack_lvl+0x8c/0xb8
    dump_stack+0x18/0x34
    __might_resched+0x180/0x228
    __might_sleep+0x50/0x88
    __pm_runtime_resume+0xac/0xb0
    cti_enable+0x44/0x120
    coresight_control_assoc_ectdev+0xc0/0x150
    coresight_enable_path+0xb4/0x288
    etm_event_start+0x138/0x170
    etm_event_add+0x48/0x70
    event_sched_in.isra.122+0xb4/0x280
    merge_sched_in+0x1fc/0x3d0
    visit_groups_merge.constprop.137+0x16c/0x4b0
    ctx_sched_in+0x114/0x1f0
    perf_event_sched_in+0x60/0x90
    ctx_resched+0x68/0xb0
    perf_event_exec+0x138/0x508
    begin_new_exec+0x52c/0xd40
    load_elf_binary+0x6b8/0x17d0
    bprm_execve+0x360/0x7f8
    do_execveat_common.isra.47+0x218/0x238
    __arm64_sys_execve+0x48/0x60
    invoke_syscall+0x4c/0x110
    el0_svc_common.constprop.4+0xfc/0x120
    do_el0_svc+0x34/0xc0
    el0_svc+0x40/0x98
    el0t_64_sync_handler+0x98/0xc0
    el0t_64_sync+0x170/0x174

Fix the issue by removing the runtime PM calls completely. They are not
needed here because it must have already been done when building the
path for a trace.

Fixes: 835d722ba1 ("coresight: cti: Initial CoreSight CTI Driver")
Reported-by: Aishwarya TCV <Aishwarya.TCV@arm.com>
Reported-by: Cristian Marussi <Cristian.Marussi@arm.com>
Suggested-by: Suzuki Poulose <Suzuki.Poulose@arm.com>
Signed-off-by: James Clark <james.clark@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Tested-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20221005131452.1506328-1-james.clark@arm.com
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/1222
2023-02-21 11:22:53 +00:00
Sudeep Holla 79b960ddd7 coresight: Fix possible deadlock with lock dependency
ANBZ: #3814

commit 23722fb467 upstream

With lockdeps enabled, we get the following warning:

======================================================
WARNING: possible circular locking dependency detected
------------------------------------------------------
kworker/u12:1/53 is trying to acquire lock:
ffff80000adce220 (coresight_mutex){+.+.}-{4:4}, at: coresight_set_assoc_ectdev_mutex+0x3c/0x5c
but task is already holding lock:
ffff80000add1f60 (ect_mutex){+.+.}-{4:4}, at: cti_probe+0x318/0x394

which lock already depends on the new lock.
the existing dependency chain (in reverse order) is:

-> #1 (ect_mutex){+.+.}-{4:4}:
       __mutex_lock_common+0xd8/0xe60
       mutex_lock_nested+0x44/0x50
       cti_add_assoc_to_csdev+0x4c/0x184
       coresight_register+0x2f0/0x314
       tmc_probe+0x33c/0x414

-> #0 (coresight_mutex){+.+.}-{4:4}:
       __lock_acquire+0x1a20/0x32d0
       lock_acquire+0x160/0x308
       __mutex_lock_common+0xd8/0xe60
       mutex_lock_nested+0x44/0x50
       coresight_set_assoc_ectdev_mutex+0x3c/0x5c
       cti_update_conn_xrefs+0x6c/0xf8
       cti_probe+0x33c/0x394

other info that might help us debug this:
 Possible unsafe locking scenario:
       CPU0                    CPU1
       ----                    ----
  lock(ect_mutex);
                               lock(coresight_mutex);
                               lock(ect_mutex);
  lock(coresight_mutex);
 *** DEADLOCK ***

4 locks held by kworker/u12:1/53:
 #0: ((wq_completion)events_unbound){+.+.}-{0:0}, at: process_one_work+0x1fc/0x63c
 #1: (deferred_probe_work){+.+.}-{0:0}, at: process_one_work+0x228/0x63c
 #2: (&dev->mutex){....}-{4:4}, at: __device_attach+0x48/0x1a8
 #3: (ect_mutex){+.+.}-{4:4}, at: cti_probe+0x318/0x394

To fix the same, call cti_add_assoc_to_csdev without the holding
coresight_mutex and confine the locking while setting the associated
ect / cti device using coresight_set_assoc_ectdev_mutex().

Fixes: 177af8285b ("coresight: cti: Enable CTI associated with devices")
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20220721130329.3787211-1-sudeep.holla@arm.com
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/1222
2023-02-21 11:22:53 +00:00
Nathan Chancellor 905c12acb8 coresight: cti-sysfs: Mark coresight_cti_reg_store() as __maybe_unused
ANBZ: #3814

commit 269e633dad upstream

When building without CONFIG_CORESIGHT_CTI_INTEGRATION_REGS, there is a
warning about coresight_cti_reg_store() being unused in the file:

  drivers/hwtracing/coresight/coresight-cti-sysfs.c:184:16: warning: 'coresight_cti_reg_store' defined but not used [-Wunused-function]
    184 | static ssize_t coresight_cti_reg_store(struct device *dev,
        |                ^~~~~~~~~~~~~~~~~~~~~~~

This is expected as coresight_cti_reg_store() is only used in the
coresight_cti_reg_rw macro, which is only used in a block guarded by
CONFIG_CORESIGHT_CTI_INTEGRATION_REGS. Mark coresight_cti_reg_store() as
__maybe_unused to clearly indicate that the function may be unused
depending on the configuration.

Fixes: fbca79e554 ("coresight: cti-sysfs: Re-use same functions for similar sysfs register accessors")
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Reviewed-by: James Clark <james.clark@arm.com>
Link: https://lore.kernel.org/r/20220901195055.1932340-1-nathan@kernel.org
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/1222
2023-02-21 11:22:53 +00:00
James Clark 2d94c9f905 coresight: Make new csdev_access offsets unsigned
ANBZ: #3814

commit 0a98181f80 upstream

New csdev_access functions were added as part of the previous
refactor. In order to make them more consistent with the
existing ones, change any signed offset types to be unsigned.

Now that they are unsigned, stop using hi_off = -1 to signify
a single 32bit access. Instead just call the existing 32bit
accessors. This is also applied to other parts of the codebase,
and the coresight_{read,write}_reg_pair() functions can be
deleted.

Signed-off-by: James Clark <james.clark@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Link: https://lore.kernel.org/r/20220830172614.340962-6-james.clark@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/1222
2023-02-21 11:22:53 +00:00
James Clark f23a0c1e82 coresight: cti-sysfs: Re-use same functions for similar sysfs register accessors
ANBZ: #3814

commit fbca79e554 upstream

Currently each accessor macro creates an identical function which wastes
space in the text area and pollutes the ftrace function name list.
Change it so that the same function is used, but the register to access
is passed in as parameter rather than baked into each function.

Note that only the single accessor is used here and not
csdev_access_relaxed_read_pair() like in the previous commit, so
so a single unsigned offset value is stored instead.

Signed-off-by: James Clark <james.clark@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Link: https://lore.kernel.org/r/20220830172614.340962-5-james.clark@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/1222
2023-02-21 11:22:53 +00:00
James Clark 00c83f3f25 coresight: Re-use same function for similar sysfs register accessors
ANBZ: #3814

commit 08e9fa5f36 upstream

Currently each accessor macro creates an identical function which wastes
space in the text area and pollutes the ftrace function names. Change it
so that the same function is used, but the register to access is passed
in as parameter rather than baked into each function.

Signed-off-by: James Clark <james.clark@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Link: https://lore.kernel.org/r/20220830172614.340962-4-james.clark@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/1222
2023-02-21 11:22:53 +00:00
James Clark 7e64f63e3e coresight: Simplify sysfs accessors by using csdev_access abstraction
ANBZ: #3814

commit b6df1cbb41 upstream

The coresight_device struct is available in the sysfs accessor, and this
contains a csdev_access struct which can be used to access registers.
Use this instead of passing in the type of each drvdata so that a common
function can be shared between all the cs drivers.

No functional changes.

Signed-off-by: James Clark <james.clark@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Link: https://lore.kernel.org/r/20220830172614.340962-3-james.clark@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/1222
2023-02-21 11:22:53 +00:00
James Clark 92e4d91ef1 coresight: Remove unused function parameter
ANBZ: #3814

commit 3727f03e2b upstream

The ability to use a custom function in this sysfs show function isn't
used so remove it.

No functional changes.

Signed-off-by: James Clark <james.clark@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Link: https://lore.kernel.org/r/20220830172614.340962-2-james.clark@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/1222
2023-02-21 11:22:53 +00:00
German Gomez 7e7956ce0d coresight: etm4x: Expose default timestamp source in sysfs
ANBZ: #3814

commit 0f00b223ea upstream

Add a new sysfs interface in /sys/bus/coresight/devices/etm<N>/ts_source
indicating the configured timestamp source when the ETM device driver
was probed.

The perf tool will use this information to detect if the trace data
timestamp matches the kernel time, enabling correlation of CoreSight
trace with perf events.

Suggested-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: German Gomez <german.gomez@arm.com>
Reviewed-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: James Clark <james.clark@arm.com>
Link: https://lore.kernel.org/r/20220823160650.455823-2-james.clark@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/1222
2023-02-21 11:22:53 +00:00
Nick Desaulniers 32f45bcfd2 coresight: etm4x: avoid build failure with unrolled loops
ANBZ: #3814

commit 4d45bc82df upstream

When the following configs are enabled:
* CORESIGHT
* CORESIGHT_SOURCE_ETM4X
* UBSAN
* UBSAN_TRAP

Clang fails assemble the kernel with the error:
<instantiation>:1:7: error: expected constant expression in '.inst' directive
.inst (0xd5200000|((((2) << 19) | ((1) << 16) | (((((((((((0x160 + (i * 4))))) >> 2))) >> 7) & 0x7)) << 12) | ((((((((((0x160 + (i * 4))))) >> 2))) & 0xf)) << 8) | (((((((((((0x160 + (i * 4))))) >> 2))) >> 4) & 0x7)) << 5)))|(.L__reg_num_x8))
      ^
drivers/hwtracing/coresight/coresight-etm4x-core.c:702:4: note: while in
macro instantiation
etm4x_relaxed_read32(csa, TRCCNTVRn(i));
^
drivers/hwtracing/coresight/coresight-etm4x.h:403:4: note: expanded from
macro 'etm4x_relaxed_read32'
read_etm4x_sysreg_offset((offset), false)))
^
drivers/hwtracing/coresight/coresight-etm4x.h:383:12: note: expanded
from macro 'read_etm4x_sysreg_offset'
__val = read_etm4x_sysreg_const_offset((offset));       \
        ^
drivers/hwtracing/coresight/coresight-etm4x.h:149:2: note: expanded from
macro 'read_etm4x_sysreg_const_offset'
READ_ETM4x_REG(ETM4x_OFFSET_TO_REG(offset))
^
drivers/hwtracing/coresight/coresight-etm4x.h:144:2: note: expanded from
macro 'READ_ETM4x_REG'
read_sysreg_s(ETM4x_REG_NUM_TO_SYSREG((reg)))
^
arch/arm64/include/asm/sysreg.h:1108:15: note: expanded from macro
'read_sysreg_s'
asm volatile(__mrs_s("%0", r) : "=r" (__val));                  \
             ^
arch/arm64/include/asm/sysreg.h:1074:2: note: expanded from macro '__mrs_s'
"       mrs_s " v ", " __stringify(r) "\n"                      \
 ^

Consider the definitions of TRCSSCSRn and TRCCNTVRn:
drivers/hwtracing/coresight/coresight-etm4x.h:56
 #define TRCCNTVRn(n)      (0x160 + (n * 4))
drivers/hwtracing/coresight/coresight-etm4x.h:81
 #define TRCSSCSRn(n)      (0x2A0 + (n * 4))

Where the macro parameter is expanded to i; a loop induction variable
from etm4_disable_hw.

When any compiler can determine that loops may be unrolled, then the
__builtin_constant_p check in read_etm4x_sysreg_offset() defined in
drivers/hwtracing/coresight/coresight-etm4x.h may evaluate to true. This
can lead to the expression `(0x160 + (i * 4))` being passed to
read_etm4x_sysreg_const_offset. Via the trace above, this is passed
through READ_ETM4x_REG, read_sysreg_s, and finally to __mrs_s where it
is string-ified and used directly in inline asm.

Regardless of which compiler or compiler options determine whether a
loop can or can't be unrolled, which determines whether
__builtin_constant_p evaluates to true when passed an expression using a
loop induction variable, it is NEVER safe to allow the preprocessor to
construct inline asm like:
  asm volatile (".inst (0x160 + (i * 4))" : "=r"(__val));
                                 ^ expected constant expression

Instead of read_etm4x_sysreg_offset() using __builtin_constant_p(), use
__is_constexpr from include/linux/const.h instead to ensure only
expressions that are valid integer constant expressions get passed
through to read_sysreg_s().

This is not a bug in clang; it's a potentially unsafe use of the macro
arguments in read_etm4x_sysreg_offset dependent on __builtin_constant_p.

Link: https://github.com/ClangBuiltLinux/linux/issues/1310
Reported-by: Arnd Bergmann <arnd@kernel.org>
Reported-by: Tao Zhang <quic_taozha@quicinc.com>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20220708231520.3958391-1-ndesaulniers@google.com
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/1222
2023-02-21 11:22:53 +00:00
James Clark 93c7e957f7 coresight: Add config flag to enable branch broadcast
ANBZ: #4120

commit 2d693ed436 upstream

When enabled, all taken branch addresses are output, even if the branch
was because of a direct branch instruction. This enables reconstruction
of the program flow without having access to the memory image of the
code being executed.

Use bit 8 for the config option which would be the correct bit for
programming ETMv3. Although branch broadcast can't be enabled on ETMv3
because it's not in the define ETM3X_SUPPORTED_OPTIONS, using the
correct bit might help prevent future collisions or allow it to be
enabled if needed.

Signed-off-by: James Clark <james.clark@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20220511144601.2257870-2-james.clark@arm.com
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/1220
2023-02-21 02:35:10 +00:00
Mike Leach 04e328021d coresight: syscfg: Update load and unload operations
ANBZ: #4115

commit 8add26f7ef upstream

The configfs system is a source of access to the config information in the
configuration and feature lists.

This can result in additional LOCKDEP issues as a result of the mutex
ordering between the config list mutex (cscfg_mutex) and the configfs
system mutexes.

As such we need to adjust how load/unload operations work to ensure correct
operation.

1) Previously the cscfg_mutex was held throughout the load/unload
operation. This is now only held during configuration list manipulations,
resulting in a multi-stage load/unload process.

2) All operations that manipulate the configfs representation of the
configurations and features are now separated out and run without the
cscfg_mutex being held. This avoids circular lock_dep issue with the
built-in configfs mutexes and semaphores

3) As the load and unload is now multi-stage, some parts under the
cscfg_mutex and others not:
i) A flag indicating a load / unload operation in progress is used to
serialise load / unload operations.
ii) activating any configuration not possible when unload is in progress.
iii) Configurations have an "available" flag set only after the last load
stage for the configuration is complete. Activation of the configuration
not possible till flag is set.

4) Following load/unload rules remain:
i) Unload prevented while any configuration is active remains.
ii) Unload in strict reverse order of load.
iii) Existing configurations can be activated while a new load operation
is underway. (by definition there can be no dependencies between an
existing configuration and a new loading one due to ii) above.)

Fixes: eb2ec49606 ("coresight: syscfg: Update load API for config loadable modules")
Reported-by: Suzuki Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mike Leach <mike.leach@linaro.org>
Reviewed-and-tested-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20220628173004.30002-3-mike.leach@linaro.org
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/1218
2023-02-20 08:45:27 +00:00
Mike Leach 81ac4fea22 coresight: configfs: Fix unload of configurations on module exit
ANBZ: #4115

commit 199380decc upstream

Any loaded configurations must be correctly unloaded on coresight module
exit, or issues can arise with nested locking in the configfs directory
code if built with CONFIG_LOCKDEP.

Prior to this patch, the preloaded configuration configfs directory entries
were being unloaded by the recursive code in
configfs_unregister_subsystem().

However, when built with CONFIG_LOCKDEP, this caused a nested lock warning,
which was not mitigated by the LOCKDEP dependent code in fs/configfs/dir.c
designed to prevent this, due to the different directory levels for the
root of the directory being removed.

As the preloaded (and all other) configurations are registered after
configfs_register_subsystem(), we now explicitly unload them before the
call to configfs_unregister_subsystem().

The new routine cscfg_unload_cfgs_on_exit() iterates through the load
owner list to unload any remaining configurations that were not unloaded
by the user before the module exits. This covers both the
CSCFG_OWNER_PRELOAD and CSCFG_OWNER_MODULE owner types, and will be
extended to cover future load owner types for CoreSight configurations.

Fixes: eb2ec49606 ("coresight: syscfg: Update load API for config loadable modules")
Reported-by: Suzuki Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mike Leach <mike.leach@linaro.org>
Reviewed-and-tested-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20220628173004.30002-2-mike.leach@linaro.org
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/1218
2023-02-20 08:45:27 +00:00
Suzuki K Poulose fefa91c7b3 coresight: Clear the connection field properly
ANBZ: #4115

commit 2af89ebacf upstream

coresight devices track their connections (output connections) and
hold a reference to the fwnode. When a device goes away, we walk through
the devices on the coresight bus and make sure that the references
are dropped. This happens both ways:
 a) For all output connections from the device, drop the reference to
    the target device via coresight_release_platform_data()

b) Iterate over all the devices on the coresight bus and drop the
   reference to fwnode if *this* device is the target of the output
   connection, via coresight_remove_conns()->coresight_remove_match().

However, the coresight_remove_match() doesn't clear the fwnode field,
after dropping the reference, this causes use-after-free and
additional refcount drops on the fwnode.

e.g., if we have two devices, A and B, with a connection, A -> B.
If we remove B first, B would clear the reference on B, from A
via coresight_remove_match(). But when A is removed, it still has
a connection with fwnode still pointing to B. Thus it tries to  drops
the reference in coresight_release_platform_data(), raising the bells
like :

[   91.990153] ------------[ cut here ]------------
[   91.990163] refcount_t: addition on 0; use-after-free.
[   91.990212] WARNING: CPU: 0 PID: 461 at lib/refcount.c:25 refcount_warn_saturate+0xa0/0x144
[   91.990260] Modules linked in: coresight_funnel coresight_replicator coresight_etm4x(-)
 crct10dif_ce coresight ip_tables x_tables ipv6 [last unloaded: coresight_cpu_debug]
[   91.990398] CPU: 0 PID: 461 Comm: rmmod Tainted: G        W       T 5.19.0-rc2+ #53
[   91.990418] Hardware name: ARM LTD ARM Juno Development Platform/ARM Juno Development Platform, BIOS EDK II Feb  1 2019
[   91.990434] pstate: 600000c5 (nZCv daIF -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[   91.990454] pc : refcount_warn_saturate+0xa0/0x144
[   91.990476] lr : refcount_warn_saturate+0xa0/0x144
[   91.990496] sp : ffff80000c843640
[   91.990509] x29: ffff80000c843640 x28: ffff800009957c28 x27: ffff80000c8439a8
[   91.990560] x26: ffff00097eff1990 x25: ffff8000092b6ad8 x24: ffff00097eff19a8
[   91.990610] x23: ffff80000c8439a8 x22: 0000000000000000 x21: ffff80000c8439c2
[   91.990659] x20: 0000000000000000 x19: ffff00097eff1a10 x18: ffff80000ab99c40
[   91.990708] x17: 0000000000000000 x16: 0000000000000000 x15: ffff80000abf6fa0
[   91.990756] x14: 000000000000001d x13: 0a2e656572662d72 x12: 657466612d657375
[   91.990805] x11: 203b30206e6f206e x10: 6f69746964646120 x9 : ffff8000081aba28
[   91.990854] x8 : 206e6f206e6f6974 x7 : 69646461203a745f x6 : 746e756f63666572
[   91.990903] x5 : ffff00097648ec58 x4 : 0000000000000000 x3 : 0000000000000027
[   91.990952] x2 : 0000000000000000 x1 : 0000000000000000 x0 : ffff00080260ba00
[   91.991000] Call trace:
[   91.991012]  refcount_warn_saturate+0xa0/0x144
[   91.991034]  kobject_get+0xac/0xb0
[   91.991055]  of_node_get+0x2c/0x40
[   91.991076]  of_fwnode_get+0x40/0x60
[   91.991094]  fwnode_handle_get+0x3c/0x60
[   91.991116]  fwnode_get_nth_parent+0xf4/0x110
[   91.991137]  fwnode_full_name_string+0x48/0xc0
[   91.991158]  device_node_string+0x41c/0x530
[   91.991178]  pointer+0x320/0x3ec
[   91.991198]  vsnprintf+0x23c/0x750
[   91.991217]  vprintk_store+0x104/0x4b0
[   91.991238]  vprintk_emit+0x8c/0x360
[   91.991257]  vprintk_default+0x44/0x50
[   91.991276]  vprintk+0xcc/0xf0
[   91.991295]  _printk+0x68/0x90
[   91.991315]  of_node_release+0x13c/0x14c
[   91.991334]  kobject_put+0x98/0x114
[   91.991354]  of_node_put+0x24/0x34
[   91.991372]  of_fwnode_put+0x40/0x5c
[   91.991390]  fwnode_handle_put+0x38/0x50
[   91.991411]  coresight_release_platform_data+0x74/0xb0 [coresight]
[   91.991472]  coresight_unregister+0x64/0xcc [coresight]
[   91.991525]  etm4_remove_dev+0x64/0x78 [coresight_etm4x]
[   91.991563]  etm4_remove_amba+0x1c/0x2c [coresight_etm4x]
[   91.991598]  amba_remove+0x3c/0x19c

Reproducible by: (Build all coresight components as modules):

  #!/bin/sh
  while true
  do
     for m in tmc stm cpu_debug etm4x replicator funnel
     do
     	modprobe coresight_${m}
     done

     for m in tmc stm cpu_debug etm4x replicator funnel
     do
     	rmmode coresight_${m}
     done
  done

Cc: stable@vger.kernel.org
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Fixes: 37ea1ffddf ("coresight: Use fwnode handle instead of device names")
Link: https://lore.kernel.org/r/20220614214024.3005275-1-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/1218
2023-02-20 08:45:27 +00:00
James Clark f2d0e45f76 coresight: etm4x: Cleanup TRCRSCTLRn register accesses
ANBZ: #4100

commit c86dd98691 upstream

This is a no-op change for style and consistency and has no effect on
the binary output by the compiler. In sysreg.h fields are defined as
the register name followed by the field name and then _MASK. This
allows for grepping for fields by name rather than using magic numbers.

Signed-off-by: James Clark <james.clark@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Link: https://lore.kernel.org/r/20220304171913.2292458-16-james.clark@arm.com
/* Removed extra new lines */
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/1209
2023-02-17 09:51:39 +00:00
James Clark c1f1e12a4b coresight: etm4x: Cleanup TRCBBCTLR register accesses
ANBZ: #4100

commit 67493ca4cb upstream

This is a no-op change for style and consistency and has no effect on
the binary output by the compiler. In sysreg.h fields are defined as
the register name followed by the field name and then _MASK. This
allows for grepping for fields by name rather than using magic numbers.

Signed-off-by: James Clark <james.clark@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Link: https://lore.kernel.org/r/20220304171913.2292458-15-james.clark@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Link: https://gitee.com/anolis/cloud-kernel/pulls/1209
2023-02-17 09:51:39 +00:00