xz: adjust arch-specific options for better kernel compression
mainline inclusion
from mainline-v6.12-rc1
category: feature
Confilct: remove
ia64) BCJ=--ia64; LZMA2OPTS=pb=4 ;;
0df8e970859: ("scripts: clean up IA-64 code")
Use LZMA2 options that match the arch-specific alignment of instructions.
This change reduces compressed kernel size 0-2 % depending on the arch.
On 1-byte-aligned x86 it makes no difference and on 4-byte-aligned archs
it helps the most.
Use the ARM-Thumb filter for ARM-Thumb2 kernels. This reduces compressed
kernel size about 5 %.[1] Previously such kernels were compressed using
the ARM filter which didn't do anything useful with ARM-Thumb2 code.
Add BCJ filter support for ARM64 and RISC-V. Compared to unfiltered XZ or
plain LZMA, the compressed kernel size is reduced about 5 % on ARM64 and 7
% on RISC-V. A new enough version of the xz tool is required: 5.4.0 for
ARM64 and 5.6.0 for RISC-V. With an old xz version, a message is printed
to standard error and the kernel is compressed without the filter.
Update lib/decompress_unxz.c to match the changes to xz_wrap.sh.
Update the CONFIG_KERNEL_XZ help text in init/Kconfig:
- Add the RISC-V and ARM64 filters.
- Clarify that the PowerPC filter is for big endian only.
- Omit IA-64.
Link: https://lore.kernel.org/lkml/1637379771-39449-1-git-send-email-zhongjubin@huawei.com/ [1]
Link: https://lkml.kernel.org/r/20240721133633.47721-15-lasse.collin@tukaani.org
Signed-off-by: Lasse Collin <lasse.collin@tukaani.org>
Reviewed-by: Sam James <sam@gentoo.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Albert Ou <aou@eecs.berkeley.edu>
Cc: Jubin Zhong <zhongjubin@huawei.com>
Cc: Jules Maselbas <jmaselbas@zdiv.net>
Cc: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: Joel Stanley <joel@jms.id.au>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Randy Dunlap <rdunlap@infradead.org>
Cc: Rui Li <me@lirui.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
(cherry picked from commit 7472ff8ada)
Signed-off-by: Wentao Guan <guanwentao@uniontech.com>
This commit is contained in:
Wentao Guan
忘怀
parent
67f4447362
commit
383236c94e
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@ -317,8 +317,9 @@ config KERNEL_XZ
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BCJ filters which can improve compression ratio of executable
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code. The size of the kernel is about 30% smaller with XZ in
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comparison to gzip. On architectures for which there is a BCJ
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filter (i386, x86_64, ARM, IA-64, PowerPC, and SPARC), XZ
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will create a few percent smaller kernel than plain LZMA.
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filter (i386, x86_64, ARM, ARM64, RISC-V, big endian PowerPC,
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and SPARC), XZ will create a few percent smaller kernel than
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plain LZMA.
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The speed is about the same as with LZMA: The decompression
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speed of XZ is better than that of bzip2 but worse than gzip
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@ -126,11 +126,21 @@
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#ifdef CONFIG_X86
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# define XZ_DEC_X86
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#endif
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#ifdef CONFIG_PPC
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#if defined(CONFIG_PPC) && defined(CONFIG_CPU_BIG_ENDIAN)
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# define XZ_DEC_POWERPC
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#endif
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#ifdef CONFIG_ARM
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# define XZ_DEC_ARM
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# ifdef CONFIG_THUMB2_KERNEL
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# define XZ_DEC_ARMTHUMB
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# else
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# define XZ_DEC_ARM
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# endif
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#endif
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#ifdef CONFIG_ARM64
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# define XZ_DEC_ARM64
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#endif
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#ifdef CONFIG_RISCV
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# define XZ_DEC_RISCV
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#endif
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#ifdef CONFIG_IA64
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# define XZ_DEC_IA64
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@ -6,15 +6,146 @@
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#
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# Author: Lasse Collin <lasse.collin@tukaani.org>
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BCJ=
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LZMA2OPTS=
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# This has specialized settings for the following archs. However,
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# XZ-compressed kernel isn't currently supported on every listed arch.
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#
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# Arch Align Notes
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# arm 2/4 ARM and ARM-Thumb2
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# arm64 4
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# csky 2
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# loongarch 4
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# mips 2/4 MicroMIPS is 2-byte aligned
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# parisc 4
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# powerpc 4 Uses its own wrapper for compressors instead of this.
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# riscv 2/4
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# s390 2
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# sh 2
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# sparc 4
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# x86 1
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# A few archs use 2-byte or 4-byte aligned instructions depending on
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# the kernel config. This function is used to check if the relevant
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# config option is set to "y".
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is_enabled()
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{
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grep -q "^$1=y$" include/config/auto.conf
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}
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# XZ_VERSION is needed to disable features that aren't available in
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# old XZ Utils versions.
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XZ_VERSION=$($XZ --robot --version) || exit
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XZ_VERSION=$(printf '%s\n' "$XZ_VERSION" | sed -n 's/^XZ_VERSION=//p')
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# Assume that no BCJ filter is available.
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BCJ=
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# Set the instruction alignment to 1, 2, or 4 bytes.
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#
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# Set the BCJ filter if one is available.
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# It must match the #ifdef usage in lib/decompress_unxz.c.
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case $SRCARCH in
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x86) BCJ=--x86 ;;
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powerpc) BCJ=--powerpc ;;
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ia64) BCJ=--ia64; LZMA2OPTS=pb=4 ;;
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arm) BCJ=--arm ;;
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sparc) BCJ=--sparc ;;
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arm)
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if is_enabled CONFIG_THUMB2_KERNEL; then
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ALIGN=2
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BCJ=--armthumb
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else
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ALIGN=4
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BCJ=--arm
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fi
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;;
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arm64)
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ALIGN=4
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# ARM64 filter was added in XZ Utils 5.4.0.
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if [ "$XZ_VERSION" -ge 50040002 ]; then
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BCJ=--arm64
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else
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echo "$0: Upgrading to xz >= 5.4.0" \
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"would enable the ARM64 filter" \
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"for better compression" >&2
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fi
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;;
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csky)
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ALIGN=2
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;;
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loongarch)
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ALIGN=4
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;;
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mips)
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if is_enabled CONFIG_CPU_MICROMIPS; then
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ALIGN=2
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else
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ALIGN=4
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fi
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;;
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parisc)
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ALIGN=4
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;;
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powerpc)
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ALIGN=4
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# The filter is only for big endian instruction encoding.
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if is_enabled CONFIG_CPU_BIG_ENDIAN; then
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BCJ=--powerpc
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fi
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;;
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riscv)
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if is_enabled CONFIG_RISCV_ISA_C; then
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ALIGN=2
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else
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ALIGN=4
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fi
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# RISC-V filter was added in XZ Utils 5.6.0.
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if [ "$XZ_VERSION" -ge 50060002 ]; then
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BCJ=--riscv
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else
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echo "$0: Upgrading to xz >= 5.6.0" \
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"would enable the RISC-V filter" \
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"for better compression" >&2
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fi
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;;
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s390)
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ALIGN=2
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;;
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sh)
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ALIGN=2
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;;
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sparc)
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ALIGN=4
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BCJ=--sparc
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;;
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x86)
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ALIGN=1
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BCJ=--x86
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;;
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*)
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echo "$0: Arch-specific tuning is missing for '$SRCARCH'" >&2
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# Guess 2-byte-aligned instructions. Guessing too low
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# should hurt less than guessing too high.
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ALIGN=2
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;;
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esac
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# Select the LZMA2 options matching the instruction alignment.
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case $ALIGN in
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1) LZMA2OPTS= ;;
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2) LZMA2OPTS=lp=1 ;;
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4) LZMA2OPTS=lp=2,lc=2 ;;
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*) echo "$0: ALIGN wrong or missing" >&2; exit 1 ;;
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esac
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# Use single-threaded mode because it compresses a little better
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