mirror of https://github.com/aamine/cbc
r4985@macbookpro: aamine | 2009-05-26 15:16:21 +0900
* net/loveruby/cflat/sysdep/x86/AssemblyFile.java: refactoring: apply strict visibility. git-svn-id: file:///Users/aamine/c/gitwork/public/cbc/trunk@4263 1b9489fe-b721-0410-924e-b54b9192deb8
This commit is contained in:
Minero Aoki
parent
1729dbaac0
commit
144393f6d4
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@ -1,3 +1,8 @@
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Tue May 26 15:16:04 2009 Minero Aoki <aamine@loveruby.net>
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* net/loveruby/cflat/sysdep/x86/AssemblyFile.java: refactoring:
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apply strict visibility.
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Tue May 26 15:11:19 2009 Minero Aoki <aamine@loveruby.net>
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* net/loveruby/cflat/compiler/Compiler.java: change CodeGenerator
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@ -7,13 +7,13 @@ import java.io.PrintStream;
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public class AssemblyFile implements net.loveruby.cflat.sysdep.AssemblyFile {
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private final List<Assembly> assemblies;
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private final Type naturalType;
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private final long stackWordSize;
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private final SymbolTable labelSymbols;
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private final boolean verbose;
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final Type naturalType;
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final long stackWordSize;
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final SymbolTable labelSymbols;
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final boolean verbose;
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private int commentIndentLevel;
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public AssemblyFile(Type naturalType, long stackWordSize,
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AssemblyFile(Type naturalType, long stackWordSize,
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SymbolTable labelSymbols, boolean verbose) {
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this.naturalType = naturalType;
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this.stackWordSize = stackWordSize;
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@ -24,11 +24,11 @@ public class AssemblyFile implements net.loveruby.cflat.sysdep.AssemblyFile {
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initVirtualStack();
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}
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public List<Assembly> assemblies() {
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List<Assembly> assemblies() {
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return this.assemblies;
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}
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public void addAll(List<Assembly> assemblies) {
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void addAll(List<Assembly> assemblies) {
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this.assemblies.addAll(assemblies);
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}
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@ -49,23 +49,23 @@ public class AssemblyFile implements net.loveruby.cflat.sysdep.AssemblyFile {
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// FIXME
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}
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public void comment(String str) {
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void comment(String str) {
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assemblies.add(new Comment(str, commentIndentLevel));
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}
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public void indentComment() {
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void indentComment() {
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commentIndentLevel++;
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}
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public void unindentComment() {
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void unindentComment() {
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commentIndentLevel--;
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}
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public void label(Symbol sym) {
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void label(Symbol sym) {
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assemblies.add(new Label(sym));
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}
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public void label(Label label) {
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void label(Label label) {
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assemblies.add(label);
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}
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@ -116,91 +116,91 @@ public class AssemblyFile implements net.loveruby.cflat.sysdep.AssemblyFile {
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// directives
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//
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public void _file(String name) {
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void _file(String name) {
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directive(".file\t" + TextUtils.dumpString(name));
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}
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public void _text() {
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void _text() {
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directive("\t.text");
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}
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public void _data() {
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void _data() {
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directive("\t.data");
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}
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public void _section(String name) {
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void _section(String name) {
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directive("\t.section\t" + name);
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}
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public void _section(String name, String flags, String type, String group, String linkage) {
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void _section(String name, String flags, String type, String group, String linkage) {
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directive("\t.section\t" + name + "," + flags + "," + type + "," + group + "," + linkage);
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}
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public void _globl(Symbol sym) {
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void _globl(Symbol sym) {
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directive(".globl " + sym.name());
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}
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public void _local(Symbol sym) {
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void _local(Symbol sym) {
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directive(".local " + sym.name());
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}
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public void _hidden(Symbol sym) {
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void _hidden(Symbol sym) {
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directive("\t.hidden\t" + sym.name());
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}
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public void _comm(Symbol sym, long size, long alignment) {
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void _comm(Symbol sym, long size, long alignment) {
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directive("\t.comm\t" + sym.name() + "," + size + "," + alignment);
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}
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public void _align(long n) {
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void _align(long n) {
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directive("\t.align\t" + n);
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}
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public void _type(Symbol sym, String type) {
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void _type(Symbol sym, String type) {
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directive("\t.type\t" + sym.name() + "," + type);
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}
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public void _size(Symbol sym, long size) {
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void _size(Symbol sym, long size) {
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_size(sym, new Long(size).toString());
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}
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public void _size(Symbol sym, String size) {
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void _size(Symbol sym, String size) {
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directive("\t.size\t" + sym.name() + "," + size);
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}
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public void _byte(long val) {
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void _byte(long val) {
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directive(".byte\t" + new IntegerLiteral((byte)val).toSource());
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}
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public void _value(long val) {
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void _value(long val) {
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directive(".value\t" + new IntegerLiteral((short)val).toSource());
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}
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public void _long(long val) {
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void _long(long val) {
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directive(".long\t" + new IntegerLiteral((int)val).toSource());
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}
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public void _quad(long val) {
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void _quad(long val) {
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directive(".quad\t" + new IntegerLiteral(val).toSource());
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}
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public void _byte(Literal val) {
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void _byte(Literal val) {
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directive(".byte\t" + val.toSource());
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}
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public void _value(Literal val) {
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void _value(Literal val) {
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directive(".value\t" + val.toSource());
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}
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public void _long(Literal val) {
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void _long(Literal val) {
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directive(".long\t" + val.toSource());
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}
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public void _quad(Literal val) {
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void _quad(Literal val) {
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directive(".quad\t" + val.toSource());
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}
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public void _string(String str) {
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void _string(String str) {
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directive("\t.string\t" + TextUtils.dumpString(str));
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}
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@ -271,218 +271,218 @@ public class AssemblyFile implements net.loveruby.cflat.sysdep.AssemblyFile {
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// Instructions
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//
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public void jmp(Label label) {
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void jmp(Label label) {
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insn("jmp", new DirectMemoryReference(label.symbol()));
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}
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public void jz(Label label) {
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void jz(Label label) {
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insn("jz", new DirectMemoryReference(label.symbol()));
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}
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public void jnz(Label label) {
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void jnz(Label label) {
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insn("jnz", new DirectMemoryReference(label.symbol()));
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}
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public void je(Label label) {
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void je(Label label) {
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insn("je", new DirectMemoryReference(label.symbol()));
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}
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public void jne(Label label) {
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void jne(Label label) {
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insn("jne", new DirectMemoryReference(label.symbol()));
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}
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public void cmp(Type t, Operand a, Register b) {
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void cmp(Type t, Operand a, Register b) {
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insn(t, "cmp", a, b);
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}
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public void sete(Register reg) {
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void sete(Register reg) {
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insn("sete", reg);
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}
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public void setne(Register reg) {
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void setne(Register reg) {
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insn("setne", reg);
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}
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public void seta(Register reg) {
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void seta(Register reg) {
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insn("seta", reg);
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}
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public void setae(Register reg) {
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void setae(Register reg) {
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insn("setae", reg);
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}
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public void setb(Register reg) {
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void setb(Register reg) {
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insn("setb", reg);
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}
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public void setbe(Register reg) {
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void setbe(Register reg) {
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insn("setbe", reg);
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}
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public void setg(Register reg) {
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void setg(Register reg) {
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insn("setg", reg);
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}
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public void setge(Register reg) {
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void setge(Register reg) {
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insn("setge", reg);
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}
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public void setl(Register reg) {
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void setl(Register reg) {
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insn("setl", reg);
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}
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public void setle(Register reg) {
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void setle(Register reg) {
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insn("setle", reg);
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}
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public void test(Type type, Register a, Register b) {
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void test(Type type, Register a, Register b) {
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insn(type, "test", a, b);
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}
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public void push(Register reg) {
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void push(Register reg) {
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insn("push", typeSuffix(naturalType), reg);
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}
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public void pop(Register reg) {
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void pop(Register reg) {
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insn("pop", typeSuffix(naturalType), reg);
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}
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// call function by relative address
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public void call(Symbol sym) {
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void call(Symbol sym) {
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insn("call", new DirectMemoryReference(sym));
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}
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// call function by absolute address
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public void callAbsolute(Register reg) {
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void callAbsolute(Register reg) {
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insn("call", new AbsoluteAddress(reg));
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}
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public void ret() {
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void ret() {
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insn("ret");
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}
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public void mov(Operand src, Operand dest) {
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void mov(Operand src, Operand dest) {
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mov(naturalType, src, dest);
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}
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// for stack access
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public void relocatableMov(Operand src, Operand dest) {
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void relocatableMov(Operand src, Operand dest) {
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assemblies.add(new Instruction("mov", typeSuffix(naturalType), src, dest, true));
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}
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public void mov(Type type, Operand src, Operand dest) {
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void mov(Type type, Operand src, Operand dest) {
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insn(type, "mov", src, dest);
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}
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public void movsx(Type t1, Type t2, Operand src, Operand dest) {
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void movsx(Type t1, Type t2, Operand src, Operand dest) {
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insn("movs", typeSuffix(t1, t2), src, dest);
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}
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public void movsbl(Operand src, Operand dest) {
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void movsbl(Operand src, Operand dest) {
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insn("movs", "bl", src, dest);
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}
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public void movswl(Operand src, Operand dest) {
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void movswl(Operand src, Operand dest) {
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insn("movs", "wl", src, dest);
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}
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public void movzx(Type t1, Type t2, Operand src, Operand dest) {
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void movzx(Type t1, Type t2, Operand src, Operand dest) {
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insn("movz", typeSuffix(t1, t2), src, dest);
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}
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public void movzb(Type t, Operand src, Operand dest) {
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void movzb(Type t, Operand src, Operand dest) {
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insn("movz", "b" + typeSuffix(t), src, dest);
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}
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public void movzbl(Operand src, Operand dest) {
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void movzbl(Operand src, Operand dest) {
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insn("movz", "bl", src, dest);
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}
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public void movzwl(Operand src, Operand dest) {
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void movzwl(Operand src, Operand dest) {
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insn("movz", "wl", src, dest);
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}
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public void lea(Operand src, Operand dest) {
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void lea(Operand src, Operand dest) {
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lea(naturalType, src, dest);
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}
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public void lea(Type type, Operand src, Operand dest) {
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void lea(Type type, Operand src, Operand dest) {
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insn(type, "lea", src, dest);
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}
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public void neg(Type type, Register reg) {
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void neg(Type type, Register reg) {
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insn(type, "neg", reg);
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}
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public void inc(Type type, Operand reg) {
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void inc(Type type, Operand reg) {
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insn(type, "inc", reg);
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}
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public void dec(Type type, Operand reg) {
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void dec(Type type, Operand reg) {
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insn(type, "dec", reg);
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}
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public void add(Operand diff, Operand base) {
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void add(Operand diff, Operand base) {
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add(naturalType, diff, base);
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}
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public void add(Type type, Operand diff, Operand base) {
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void add(Type type, Operand diff, Operand base) {
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insn(type, "add", diff, base);
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}
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public void sub(Operand diff, Operand base) {
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void sub(Operand diff, Operand base) {
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sub(naturalType, diff, base);
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}
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public void sub(Type type, Operand diff, Operand base) {
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void sub(Type type, Operand diff, Operand base) {
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insn(type, "sub", diff, base);
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}
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public void imul(Operand m, Register base) {
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void imul(Operand m, Register base) {
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imul(naturalType, m, base);
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}
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public void imul(Type type, Operand m, Register base) {
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void imul(Type type, Operand m, Register base) {
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insn(type, "imul", m, base);
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}
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public void cltd() {
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void cltd() {
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insn("cltd");
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}
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public void div(Type type, Register base) {
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void div(Type type, Register base) {
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insn(type, "div", base);
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}
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public void idiv(Type type, Register base) {
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void idiv(Type type, Register base) {
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insn(type, "idiv", base);
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}
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public void not(Type type, Register reg) {
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void not(Type type, Register reg) {
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insn(type, "not", reg);
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}
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public void and(Type type, Operand bits, Register base) {
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void and(Type type, Operand bits, Register base) {
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insn(type, "and", bits, base);
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}
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public void or(Type type, Operand bits, Register base) {
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void or(Type type, Operand bits, Register base) {
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insn(type, "or", bits, base);
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}
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public void xor(Type type, Operand bits, Register base) {
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void xor(Type type, Operand bits, Register base) {
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insn(type, "xor", bits, base);
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}
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public void sar(Type type, Register bits, Register base) {
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void sar(Type type, Register bits, Register base) {
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insn(type, "sar", bits, base);
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}
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public void sal(Type type, Register bits, Register base) {
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void sal(Type type, Register bits, Register base) {
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insn(type, "sal", bits, base);
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}
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public void shr(Type type, Register bits, Register base) {
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void shr(Type type, Register bits, Register base) {
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insn(type, "shr", bits, base);
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}
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}
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