mirror of https://github.com/aamine/cbc
500 lines
12 KiB
Java
500 lines
12 KiB
Java
package net.loveruby.cflat.sysdep.x86;
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import net.loveruby.cflat.asm.*;
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import net.loveruby.cflat.utils.TextUtils;
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import java.util.List;
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import java.util.ArrayList;
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import java.io.PrintStream;
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public class AssemblyFile implements net.loveruby.cflat.sysdep.AssemblyFile {
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final Type naturalType;
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final long stackWordSize;
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final SymbolTable labelSymbols;
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final boolean verbose;
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final VirtualStack virtualStack = new VirtualStack();
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private List<Assembly> assemblies = new ArrayList<Assembly>();
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private int commentIndentLevel = 0;
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private Statistics statistics;
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AssemblyFile(Type naturalType, long stackWordSize,
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SymbolTable labelSymbols, boolean verbose) {
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this.naturalType = naturalType;
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this.stackWordSize = stackWordSize;
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this.labelSymbols = labelSymbols;
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this.verbose = verbose;
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}
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List<Assembly> assemblies() {
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return this.assemblies;
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}
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void addAll(List<Assembly> assemblies) {
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this.assemblies.addAll(assemblies);
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}
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public String toSource() {
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StringBuffer buf = new StringBuffer();
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for (Assembly asm : assemblies) {
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buf.append(asm.toSource(labelSymbols));
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buf.append("\n");
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}
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return buf.toString();
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}
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public void dump() {
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dump(System.out);
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}
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public void dump(PrintStream s) {
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for (Assembly asm : assemblies) {
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s.println(asm.dump());
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}
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}
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void apply(PeepholeOptimizer opt) {
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assemblies = opt.optimize(assemblies);
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}
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private Statistics statistics() {
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if (statistics == null) {
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statistics = Statistics.collect(assemblies);
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}
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return statistics;
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}
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boolean doesUses(Register reg) {
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return statistics().doesRegisterUsed(reg);
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}
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void comment(String str) {
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assemblies.add(new Comment(str, commentIndentLevel));
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}
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void indentComment() {
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commentIndentLevel++;
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}
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void unindentComment() {
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commentIndentLevel--;
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}
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void label(Symbol sym) {
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assemblies.add(new Label(sym));
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}
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void label(Label label) {
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assemblies.add(label);
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}
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void reduceLabels() {
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Statistics stats = statistics();
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List<Assembly> result = new ArrayList<Assembly>();
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for (Assembly asm : assemblies) {
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if (asm.isLabel() && ! stats.doesSymbolUsed((Label)asm)) {
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;
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}
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else {
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result.add(asm);
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}
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}
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assemblies = result;
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}
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protected void directive(String direc) {
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assemblies.add(new Directive(direc));
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}
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protected void insn(String op) {
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assemblies.add(new Instruction(op));
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}
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protected void insn(String op, Operand a) {
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assemblies.add(new Instruction(op, "", a));
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}
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protected void insn(String op, String suffix, Operand a) {
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assemblies.add(new Instruction(op, suffix, a));
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}
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protected void insn(Type t, String op, Operand a) {
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assemblies.add(new Instruction(op, typeSuffix(t), a));
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}
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protected void insn(String op, String suffix, Operand a, Operand b) {
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assemblies.add(new Instruction(op, suffix, a, b));
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}
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protected void insn(Type t, String op, Operand a, Operand b) {
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assemblies.add(new Instruction(op, typeSuffix(t), a, b));
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}
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protected String typeSuffix(Type t1, Type t2) {
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return typeSuffix(t1) + typeSuffix(t2);
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}
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protected String typeSuffix(Type t) {
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switch (t) {
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case INT8: return "b";
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case INT16: return "w";
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case INT32: return "l";
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case INT64: return "q";
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default:
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throw new Error("unknown register type: " + t.size());
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}
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}
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//
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// directives
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//
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void _file(String name) {
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directive(".file\t" + TextUtils.dumpString(name));
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}
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void _text() {
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directive("\t.text");
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}
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void _data() {
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directive("\t.data");
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}
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void _section(String name) {
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directive("\t.section\t" + name);
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}
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void _section(String name, String flags, String type, String group, String linkage) {
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directive("\t.section\t" + name + "," + flags + "," + type + "," + group + "," + linkage);
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}
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void _globl(Symbol sym) {
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directive(".globl " + sym.name());
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}
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void _local(Symbol sym) {
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directive(".local " + sym.name());
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}
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void _hidden(Symbol sym) {
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directive("\t.hidden\t" + sym.name());
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}
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void _comm(Symbol sym, long size, long alignment) {
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directive("\t.comm\t" + sym.name() + "," + size + "," + alignment);
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}
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void _align(long n) {
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directive("\t.align\t" + n);
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}
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void _type(Symbol sym, String type) {
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directive("\t.type\t" + sym.name() + "," + type);
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}
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void _size(Symbol sym, long size) {
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_size(sym, new Long(size).toString());
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}
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void _size(Symbol sym, String size) {
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directive("\t.size\t" + sym.name() + "," + size);
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}
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void _byte(long val) {
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directive(".byte\t" + new IntegerLiteral((byte)val).toSource());
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}
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void _value(long val) {
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directive(".value\t" + new IntegerLiteral((short)val).toSource());
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}
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void _long(long val) {
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directive(".long\t" + new IntegerLiteral((int)val).toSource());
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}
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void _quad(long val) {
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directive(".quad\t" + new IntegerLiteral(val).toSource());
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}
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void _byte(Literal val) {
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directive(".byte\t" + val.toSource());
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}
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void _value(Literal val) {
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directive(".value\t" + val.toSource());
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}
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void _long(Literal val) {
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directive(".long\t" + val.toSource());
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}
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void _quad(Literal val) {
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directive(".quad\t" + val.toSource());
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}
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void _string(String str) {
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directive("\t.string\t" + TextUtils.dumpString(str));
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}
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//
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// Virtual Stack
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//
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// #@@range/VirtualStack_ctor{
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class VirtualStack {
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private long offset;
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private long max;
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private List<IndirectMemoryReference> memrefs =
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new ArrayList<IndirectMemoryReference>();
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VirtualStack() {
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reset();
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}
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void reset() {
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offset = 0;
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max = 0;
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memrefs.clear();
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}
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// #@@}
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// #@@range/maxSize{
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long maxSize() {
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return max;
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}
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// #@@}
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// #@@range/extend{
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void extend(long len) {
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offset += len;
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max = Math.max(offset, max);
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}
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// #@@}
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// #@@range/rewindVirtualStack{
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void rewind(long len) {
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offset -= len;
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}
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// #@@}
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// #@@range/top{
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IndirectMemoryReference top() {
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IndirectMemoryReference mem = relocatableMem(-offset, bp());
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memrefs.add(mem);
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return mem;
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}
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// #@@}
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private IndirectMemoryReference relocatableMem(long offset, Register base) {
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return IndirectMemoryReference.relocatable(offset, base);
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}
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private Register bp() {
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return new Register(RegisterClass.BP, naturalType);
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}
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// #@@range/fixOffset{
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void fixOffset(long diff) {
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for (IndirectMemoryReference mem : memrefs) {
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mem.fixOffset(diff);
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}
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}
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// #@@}
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}
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// #@@range/virtualPush{
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void virtualPush(Register reg) {
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if (verbose) {
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comment("push " + reg.baseName() + " -> " + virtualStack.top());
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}
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virtualStack.extend(stackWordSize);
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mov(reg, virtualStack.top());
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}
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// #@@}
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// #@@range/virtualPop{
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void virtualPop(Register reg) {
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if (verbose) {
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comment("pop " + reg.baseName() + " <- " + virtualStack.top());
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}
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mov(virtualStack.top(), reg);
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virtualStack.rewind(stackWordSize);
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}
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// #@@}
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//
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// Instructions
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//
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void jmp(Label label) {
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insn("jmp", new DirectMemoryReference(label.symbol()));
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}
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void jnz(Label label) {
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insn("jnz", new DirectMemoryReference(label.symbol()));
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}
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void je(Label label) {
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insn("je", new DirectMemoryReference(label.symbol()));
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}
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void cmp(Operand a, Register b) {
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insn(b.type, "cmp", a, b);
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}
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void sete(Register reg) {
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insn("sete", reg);
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}
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void setne(Register reg) {
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insn("setne", reg);
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}
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void seta(Register reg) {
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insn("seta", reg);
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}
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void setae(Register reg) {
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insn("setae", reg);
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}
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void setb(Register reg) {
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insn("setb", reg);
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}
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void setbe(Register reg) {
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insn("setbe", reg);
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}
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void setg(Register reg) {
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insn("setg", reg);
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}
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void setge(Register reg) {
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insn("setge", reg);
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}
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void setl(Register reg) {
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insn("setl", reg);
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}
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void setle(Register reg) {
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insn("setle", reg);
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}
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void test(Register a, Register b) {
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insn(b.type, "test", a, b);
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}
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void push(Register reg) {
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insn("push", typeSuffix(naturalType), reg);
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}
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void pop(Register reg) {
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insn("pop", typeSuffix(naturalType), reg);
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}
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// call function by relative address
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void call(Symbol sym) {
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insn("call", new DirectMemoryReference(sym));
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}
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// call function by absolute address
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void callAbsolute(Register reg) {
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insn("call", new AbsoluteAddress(reg));
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}
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void ret() {
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insn("ret");
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}
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void mov(Register src, Register dest) {
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insn(naturalType, "mov", src, dest);
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}
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// load
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void mov(Operand src, Register dest) {
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insn(dest.type, "mov", src, dest);
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}
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// save
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void mov(Register src, Operand dest) {
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insn(src.type, "mov", src, dest);
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}
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// for stack access
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void relocatableMov(Operand src, Operand dest) {
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assemblies.add(new Instruction("mov", typeSuffix(naturalType), src, dest, true));
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}
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void movsx(Register src, Register dest) {
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insn("movs", typeSuffix(src.type, dest.type), src, dest);
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}
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void movzx(Register src, Register dest) {
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insn("movz", typeSuffix(src.type, dest.type), src, dest);
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}
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void movzb(Register src, Register dest) {
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insn("movz", "b" + typeSuffix(dest.type), src, dest);
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}
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void lea(Operand src, Register dest) {
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insn(naturalType, "lea", src, dest);
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}
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void neg(Register reg) {
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insn(reg.type, "neg", reg);
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}
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void add(Operand diff, Register base) {
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insn(base.type, "add", diff, base);
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}
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void sub(Operand diff, Register base) {
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insn(base.type, "sub", diff, base);
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}
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void imul(Operand m, Register base) {
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insn(base.type, "imul", m, base);
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}
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void cltd() {
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insn("cltd");
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}
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void div(Register base) {
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insn(base.type, "div", base);
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}
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void idiv(Register base) {
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insn(base.type, "idiv", base);
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}
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void not(Register reg) {
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insn(reg.type, "not", reg);
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}
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void and(Operand bits, Register base) {
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insn(base.type, "and", bits, base);
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}
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void or(Operand bits, Register base) {
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insn(base.type, "or", bits, base);
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}
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void xor(Operand bits, Register base) {
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insn(base.type, "xor", bits, base);
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}
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void sar(Register bits, Register base) {
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insn(base.type, "sar", bits, base);
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}
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void sal(Register bits, Register base) {
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insn(base.type, "sal", bits, base);
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}
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void shr(Register bits, Register base) {
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insn(base.type, "shr", bits, base);
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}
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}
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