HIP: Propagate ACPI processor ID in the HIP.

This commit is contained in:
Udo Steinberg 2014-06-23 20:45:12 +02:00
parent 6585b7f027
commit 792d13135e
12 changed files with 6018 additions and 6862 deletions

2
.gitattributes vendored
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@ -1,2 +1,4 @@
.gitignore export-ignore
.gitattributes export-ignore
*.pdf -crlf -diff

File diff suppressed because one or more lines are too long

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@ -4,6 +4,9 @@
* Copyright (C) 2009-2011 Udo Steinberg <udo@hypervisor.org>
* Economic rights: Technische Universitaet Dresden (Germany)
*
* Copyright (C) 2012-2013 Udo Steinberg, Intel Corporation.
* Copyright (C) 2014 Udo Steinberg, FireEye, Inc.
*
* This file is part of the NOVA microhypervisor.
*
* NOVA is free software: you can redistribute it and/or modify it
@ -70,8 +73,8 @@ class Acpi_apic
class Acpi_lapic : public Acpi_apic
{
public:
uint8 cpu;
uint8 id;
uint8 acpi_id;
uint8 apic_id;
uint32 flags;
};

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@ -22,6 +22,7 @@
#pragma once
#include "compiler.hpp"
#include "config.hpp"
#include "types.hpp"
class Cpu
@ -137,6 +138,9 @@ class Cpu
static mword boot_lock asm ("boot_lock");
static unsigned online;
static uint8 acpi_id[NUM_CPU];
static uint8 apic_id[NUM_CPU];
static unsigned id CPULOCAL_HOT;
static unsigned hazard CPULOCAL_HOT;
static unsigned package CPULOCAL;
@ -193,4 +197,14 @@ class Cpu
{
asm volatile ("cpuid" : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx) : "a" (leaf), "c" (subleaf));
}
ALWAYS_INLINE
static unsigned find_by_apic_id (unsigned x)
{
for (unsigned i = 0; i < NUM_CPU; i++)
if (apic_id[i] == x)
return i;
return ~0U;
}
};

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@ -32,7 +32,8 @@ class Hip_cpu
uint8 thread;
uint8 core;
uint8 package;
uint32 reserved;
uint8 acpi_id;
uint8 reserved[3];
};
class Hip_mem

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@ -22,7 +22,6 @@
#pragma once
#include "compiler.hpp"
#include "config.hpp"
#include "memory.hpp"
#include "msr.hpp"
#include "x86.hpp"
@ -106,17 +105,6 @@ class Lapic
public:
static unsigned freq_tsc;
static unsigned freq_bus;
static uint8 apic_id[NUM_CPU];
ALWAYS_INLINE
static unsigned find_cpu (unsigned apic)
{
for (unsigned i = 0; i < NUM_CPU; i++)
if (apic_id[i] == apic)
return i;
return ~0U;
}
ALWAYS_INLINE
static inline unsigned id()

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@ -4,7 +4,8 @@
* Copyright (C) 2009-2011 Udo Steinberg <udo@hypervisor.org>
* Economic rights: Technische Universitaet Dresden (Germany)
*
* Copyright (C) 2012 Udo Steinberg, Intel Corporation.
* Copyright (C) 2012-2013 Udo Steinberg, Intel Corporation.
* Copyright (C) 2014 Udo Steinberg, FireEye, Inc.
*
* This file is part of the NOVA microhypervisor.
*
@ -53,8 +54,10 @@ void Acpi_table_madt::parse_lapic (Acpi_apic const *ptr)
{
Acpi_lapic const *p = static_cast<Acpi_lapic const *>(ptr);
if (p->flags & 1 && Cpu::online < NUM_CPU)
Lapic::apic_id[Cpu::online++] = p->id;
if (p->flags & 1 && Cpu::online < NUM_CPU) {
Cpu::acpi_id[Cpu::online] = p->acpi_id;
Cpu::apic_id[Cpu::online++] = p->apic_id;
}
}
void Acpi_table_madt::parse_ioapic (Acpi_apic const *ptr)

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@ -45,6 +45,9 @@ mword Cpu::boot_lock;
// Order of these matters
unsigned Cpu::online;
uint8 Cpu::acpi_id[NUM_CPU];
uint8 Cpu::apic_id[NUM_CPU];
unsigned Cpu::id;
unsigned Cpu::hazard;
unsigned Cpu::package;

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@ -4,7 +4,8 @@
* Copyright (C) 2009-2011 Udo Steinberg <udo@hypervisor.org>
* Economic rights: Technische Universitaet Dresden (Germany)
*
* Copyright (C) 2012 Udo Steinberg, Intel Corporation.
* Copyright (C) 2012-2013 Udo Steinberg, Intel Corporation.
* Copyright (C) 2014 Udo Steinberg, FireEye, Inc.
*
* This file is part of the NOVA microhypervisor.
*
@ -43,7 +44,7 @@ Dmar::Dmar (Paddr p) : List<Dmar> (list), reg_base ((hwdev_addr -= PAGE_SIZE) |
Dpt::ord = min (Dpt::ord, static_cast<mword>(bit_scan_reverse (static_cast<mword>(cap >> 34) & 0xf) + 2) * Dpt::bpl() - 1);
write<uint32>(REG_FEADDR, 0xfee00000 | Lapic::apic_id[0] << 12);
write<uint32>(REG_FEADDR, 0xfee00000 | Cpu::apic_id[0] << 12);
write<uint32>(REG_FEDATA, VEC_MSI_DMAR);
write<uint32>(REG_FECTL, 0);

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@ -4,7 +4,8 @@
* Copyright (C) 2009-2011 Udo Steinberg <udo@hypervisor.org>
* Economic rights: Technische Universitaet Dresden (Germany)
*
* Copyright (C) 2012 Udo Steinberg, Intel Corporation.
* Copyright (C) 2012-2013 Udo Steinberg, Intel Corporation.
* Copyright (C) 2014 Udo Steinberg, FireEye, Inc.
*
* This file is part of the NOVA microhypervisor.
*
@ -51,7 +52,7 @@ void Gsi::setup()
uint64 Gsi::set (unsigned gsi, unsigned cpu, unsigned rid)
{
uint32 msi_addr = 0, msi_data = 0, aid = Lapic::apic_id[cpu];
uint32 msi_addr = 0, msi_data = 0, aid = Cpu::apic_id[cpu];
Ioapic *ioapic = gsi_table[gsi].ioapic;

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@ -119,6 +119,7 @@ void Hip::add_cpu()
{
Hip_cpu *cpu = hip()->cpu_desc + Cpu::id;
cpu->acpi_id = Cpu::acpi_id[Cpu::id];
cpu->package = static_cast<uint8>(Cpu::package);
cpu->core = static_cast<uint8>(Cpu::core);
cpu->thread = static_cast<uint8>(Cpu::thread);

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@ -31,7 +31,6 @@
unsigned Lapic::freq_tsc;
unsigned Lapic::freq_bus;
uint8 Lapic::apic_id[NUM_CPU];
void Lapic::init()
{
@ -66,7 +65,7 @@ void Lapic::init()
write (LAPIC_TPR, 0x10);
write (LAPIC_TMR_DCR, 0xb);
Cpu::id = find_cpu (id());
Cpu::id = Cpu::find_by_apic_id (id());
if ((Cpu::bsp = apic_base & 0x100)) {
@ -100,7 +99,7 @@ void Lapic::send_ipi (unsigned cpu, unsigned vector, Delivery_mode dlv, Shorthan
while (EXPECT_FALSE (read (LAPIC_ICR_LO) & 1U << 12))
pause();
write (LAPIC_ICR_HI, apic_id[cpu] << 24);
write (LAPIC_ICR_HI, Cpu::apic_id[cpu] << 24);
write (LAPIC_ICR_LO, dsh | 1U << 14 | dlv | vector);
}