73 lines
3.8 KiB
C++
73 lines
3.8 KiB
C++
/*
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* Debug Port Types
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*
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* Copyright (C) 2019-2025 Udo Steinberg, BlueRock Security, Inc.
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*
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* This file is part of the NOVA microhypervisor.
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*
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* NOVA is free software: you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* NOVA is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License version 2 for more details.
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*/
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#pragma once
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#include "types.hpp"
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class Debug
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{
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public:
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enum class Type : uint16_t
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{
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SERIAL = 0x8000,
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FIREWIRE = 0x8001,
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USB = 0x8002,
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NET = 0x8003,
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};
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/*
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* There are three interface subtypes which can be used for 16550-based UARTs. The differences between them are subtle yet important.
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* Subtype 0x0 refers to a serial port which uses "legacy" port I/O as seen on x86-based platforms. This type should be avoided on platforms that use memory-mapped I/O, such as Arm or RISC-V.
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* Subtype 0x1 supports memory mapped UARTs, but only ones that are describable in the DBGP ACPI table. Operating system implementations may treat this as equivalent to a DBGP-provided debug port and honor only the Base Address field of the Generic Address Structure.
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* Subtype 0x12 is the most flexible choice and is recommended when running compatible operating systems on new platforms. This subtype supports all serial ports which can be described by the subtypes 0x0 and 0x1, as well as new ones, such as those requiring non-traditional access sizes and bit widths in the Generic Address Structure.
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*/
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enum class Subtype : uint16_t
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{
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SERIAL_NS16550_LEGACY = 0x0000, // 16550 fully compatible
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SERIAL_NS16550_DBGP = 0x0001, // 16550 subset compatible with DBGP Revision 1
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SERIAL_MAX311xE = 0x0002, // MAX311xE SPI UART
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SERIAL_PL011 = 0x0003, // Arm PL011 UART
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SERIAL_MSM8x60 = 0x0004, // MSM8x60 (e.g. 8960)
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SERIAL_NS16550_NVIDIA = 0x0005, // Nvidia 16550
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SERIAL_OMAP = 0x0006, // TI OMAP
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SERIAL_APM88xxxx = 0x0008, // APM88xxxx
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SERIAL_MSM8974 = 0x0009, // MSM8974
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SERIAL_SAM5250 = 0x000a, // SAM5250
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SERIAL_USIF = 0x000b, // Intel USIF
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SERIAL_IMX = 0x000c, // i.MX 6
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SERIAL_SBSA_2x = 0x000d, // Arm SBSA Generic UART (2.x only) supporting only 32-bit accesses
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SERIAL_SBSA = 0x000e, // Arm SBSA Generic UART
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SERIAL_DCC = 0x000f, // Arm DCC
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SERIAL_BCM2835 = 0x0010, // BCM2835 (MiniUART)
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SERIAL_SDM845_18 = 0x0011, // SDM845 with clock rate of 1.8432 MHz
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SERIAL_NS16550_DBG2 = 0x0012, // 16550-compatible with parameters defined in Generic Address Structure
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SERIAL_SDM845_73 = 0x0013, // SDM845 with clock rate of 7.372 MHz
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SERIAL_LPSS = 0x0014, // Intel LPSS
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SERIAL_RISCV_SBI = 0x0015, // RISC-V SBI
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SERIAL_CDNS = 0xfffb,
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SERIAL_GENI = 0xfffc,
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SERIAL_MESON = 0xfffd,
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SERIAL_SCIF = 0xfffe,
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SERIAL_NONE = 0xffff,
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USB_XHCI = 0x0000, // XHCI-compliant controller with debug interface
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USB_EHCI = 0x0001, // EHCI-compliant controller with debug interface
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};
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};
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