mirror of https://github.com/l4ka/hazelnut.git
99 lines
2.3 KiB
ArmAsm
99 lines
2.3 KiB
ArmAsm
/*********************************************************************
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*
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* Copyright (C) 2001, Karlsruhe University
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*
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* File path: arm-booter/crt0-arm-brutus.S
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* Description: startup assembly code for Brutus (AngelBoot)
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*
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* @LICENSE@
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*
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* $Id: crt0-arm-brutus.S,v 1.3 2001/12/09 04:06:30 ud3 Exp $
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*
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********************************************************************/
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.globl _start
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_start:
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/* Request SVC mode from Angel */
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mov r0, #0x17
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swi #0x123456
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/* Turn off interrupts to keep control */
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mrs r0, cpsr
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orr r0, r0, #0xC0
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msr cpsr, r0
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/* Clean out the DCache */
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mov r2, pc
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bic r2, r2, #0x1f
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add r3, r2, #0x10000 @ 64 kb is quite enough...
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1: ldr r0, [r2], #32
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teq r2, r3
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bne 1b
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mcr p15, 0, r0, c7, c10, 4 @ Drain writebuf
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/* Disable MMU and Caches */
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mrc p15, 0, r0, c1, c0
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ldr r1, =0x100d
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bic r0, r0, r1
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mcr p15, 0, r0, c1, c0
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/* Clean out caches and TLBs */
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mcr p15, 0, r0, c7, c7, 0 @ Flush I+D cache
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mcr p15, 0, r0, c8, c7, 0 @ Flush I+D TLBs on v4
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ldr r1, =0x90040000 @ Load GPIO PBase
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ldr r0, =0x00100000 @ Set relevant output GPIOs
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str r0, [r1, #0xc]
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#define SLEEP ; \
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mov r1, #0x800000 ; \
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0: subs r1, r1, #1 ; \
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bne 0b
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ldr r1, =0x80050000
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/* Disable UART */
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mov r0, #0x00 @ disable ints/RX/TX
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str r0, [r1, #0x0c] @ Set Cntr Reg 3
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/* Clear Serial Interrupts */
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ldr r0, =0xFF
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str r0, [r1, #0x1c] @ Clear Stat Reg 0
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/* Set to (N81) No Parity, 8bit data, 1 stop bit, internal clock */
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ldr r0, =0x8
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str r0, [r1, #0x00] @ Set Cntr Reg 0
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/* Set to Baud Rate of 115200 */
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mov r0, #0x00
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str r0, [r1, #0x04] @ Set Cntr Reg 1
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ldr r0, =0x001
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str r0, [r1, #0x08] @ Set Cntr Reg 2
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/* Enable Transmit and Receive, Interrupts Masked */
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ldr r0, =0x3
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str r0, [r1, #0x0c] @ Set Cntr Reg 3
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SLEEP
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/* here we actually start */
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2: ldr sp, =__stack_top
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bl main
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1: b 1b
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.globl __gccmain
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__gccmain:
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mov pc,lr
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.bss
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.align 2
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__stack_bottom:
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.space 1024
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__stack_top:
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