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[ImportVerilog] Add conditional operator. (#6950)
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@ -223,17 +223,18 @@ def NetOp : MooreOp<"net", [
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]> {
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let summary = "A net declaration";
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let description = [{
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The `moore.net' operation is a net declaration. Net types defines different types
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of net connection in SV. There are twelve built-in net types defined in the official
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standard construct of the operation:
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`supply0`, `supply1`, `tri`, `triand`, `trior`, `trireg`, `tri0`, `tri1`, `uwire`,
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`wire`, `wand`, `wor`.
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Optional assignment argument allows net operation to be initialized with specific
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values as soon as it is created. Only one net declaration assignment can be made for
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a particular net. See IEEE 1800-2017 § 10.3.1 "The net declaration assignment" for
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the differences between net declaration assignments and continuous assign statements.
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It has some features that are not supported: declaring an interconnect net and using
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user-defined types in the net operation.
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The `moore.net' operation is a net declaration. Net types defines different
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types of net connection in SV. There are twelve built-in net types defined
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in the official standard construct of the operation:
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`supply0`, `supply1`, `tri`, `triand`, `trior`, `trireg`, `tri0`, `tri1`,
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`uwire`, `wire`, `wand`, `wor`.
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Optional assignment argument allows net operation to be initialized with
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specific values as soon as it is created. Only one net declaration
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assignment can be made for a particular net. See IEEE 1800-2017 § 10.3.1
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"The net declaration assignment" for the differences between net declaration
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assignments and continuous assign statements. It has some features that are
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not supported: declaring an interconnect net and using user-defined types in
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the net operation.
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See IEEE 1800-2017 § 6.7 "Net declarations".
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}];
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@ -961,27 +962,27 @@ def StructInjectOp : MooreOp<"struct_inject"> {
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def UnionCreateOp : MooreOp<"union_create"> {
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let summary = "Union Create operation";
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let description = [{
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A union is a data type that represents a single piece
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of storage that can be accessed using one of
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the named member data types. Only one of the
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data types in the union can be used at a time.
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By default, a union is unpacked, meaning there
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is no required representation for how members
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of the union are stored. Dynamic types and chandle
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types can only be used in tagged unions.
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See IEEE 1800-2017 § 7.3 "Unions"
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A union is a data type that represents a single piece
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of storage that can be accessed using one of
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the named member data types. Only one of the
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data types in the union can be used at a time.
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By default, a union is unpacked, meaning there
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is no required representation for how members
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of the union are stored. Dynamic types and chandle
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types can only be used in tagged unions.
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See IEEE 1800-2017 § 7.3 "Unions"
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Example:
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```
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typedef union { int i; shortreal f; } num; // named union type
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num n;
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n.f = 0.0; // set n in floating point format
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typedef struct {
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bit isfloat;
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union { int i; shortreal f; } n; // anonymous union type
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} tagged_st; // named structure
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```
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See IEEE 1800-2017 § 7.3 "Unions"
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Example:
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```
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typedef union { int i; shortreal f; } num; // named union type
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num n;
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n.f = 0.0; // set n in floating point format
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typedef struct {
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bit isfloat;
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union { int i; shortreal f; } n; // anonymous union type
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} tagged_st; // named structure
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```
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See IEEE 1800-2017 § 7.3 "Unions"
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}];
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let arguments = (ins StrAttr:$unionName, UnpackedType:$input);
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let results = (outs UnpackedType:$result);
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@ -989,30 +990,30 @@ def UnionCreateOp : MooreOp<"union_create"> {
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$unionName `,` $input attr-dict `:`
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type($input) `->` type($result)
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}];
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}
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}
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def UnionExtractOp : MooreOp<"union_extract"> {
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def UnionExtractOp : MooreOp<"union_extract"> {
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let summary = "Union Extract operation";
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let description = [{
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With packed unions, writing one member and reading another is
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independent of the byte ordering of the machine,
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unlike an unpacked union of unpacked structures,
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which are C-compatible and have members in ascending address order.
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See IEEE 1800-2017 § 7.3.1 "Packed unions"
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With packed unions, writing one member and reading another is
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independent of the byte ordering of the machine,
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unlike an unpacked union of unpacked structures,
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which are C-compatible and have members in ascending address order.
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See IEEE 1800-2017 § 7.3.1 "Packed unions"
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Example:
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```
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typedef union packed { // default unsigned
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s_atmcell acell;
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bit [423:0] bit_slice;
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bit [52:0][7:0] byte_slice;
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} u_atmcell;
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u_atmcell u1;
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byte b; bit [3:0] nib;
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b = u1.bit_slice[415:408]; // same as b = u1.byte_slice[51];
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nib = u1.bit_slice [423:420];
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```
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See IEEE 1800-2017 § 7.3.1 "Packed unions"
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Example:
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```
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typedef union packed { // default unsigned
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s_atmcell acell;
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bit [423:0] bit_slice;
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bit [52:0][7:0] byte_slice;
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} u_atmcell;
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u_atmcell u1;
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byte b; bit [3:0] nib;
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b = u1.bit_slice[415:408]; // same as b = u1.byte_slice[51];
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nib = u1.bit_slice [423:420];
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```
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See IEEE 1800-2017 § 7.3.1 "Packed unions"
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}];
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let arguments = (ins StrAttr:$memberName, UnpackedType:$input);
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let results = (outs UnpackedType:$result);
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@ -1020,5 +1021,71 @@ def UnionCreateOp : MooreOp<"union_create"> {
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$input `,` $memberName attr-dict `:`
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type($input) `->` type($result)
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}];
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}
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}
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def ConditionalOp : MooreOp<"conditional",[
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RecursiveMemoryEffects,
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NoRegionArguments,
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SingleBlockImplicitTerminator<"moore::YieldOp">
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]> {
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let summary = "Conditional operation";
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let description = [{
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If cond_predicate is true, the operator returns the value of the first
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expression without evaluating the second expression; if false, it returns
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the value of the second expression without evaluating the first expression.
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If cond_predicate evaluates to an ambiguous value (x or z), then both the
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first expression and the second expression shall be evaluated, and compared
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for logical equivalence. If that comparison is true (1), the operator shall
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return either the first or second expression. Otherwise the operator returns
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a result based on the data types of the expressions.
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When both the first and second expressions are of integral types, if the
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cond_predicate evaluates to an ambiguous value and the expressions are not
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logically equivalent, their results shall be combined bit by bit using the
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table below to calculate the final result. The first and second expressions
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are extended to the same width.
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|?: | 0 | 1 | X | Z |
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|---|---|---|---|---|
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| 0 | 0 | X | X | X |
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| 1 | X | 1 | X | X |
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| X | X | X | X | X |
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| Z | X | X | X | X |
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See IEEE 1800-2017 § 11.4.11 "Conditional operator".
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}];
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let arguments = (ins AnySingleBitType:$condition);
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let results = (outs UnpackedType:$result);
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let regions = (region SizedRegion<1>:$trueRegion,
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SizedRegion<1>:$falseRegion);
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let assemblyFormat = [{
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$condition attr-dict `:` type($condition) `->` type($result)
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$trueRegion $falseRegion
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}];
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}
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def YieldOp : MooreOp<"yield", [
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Pure,
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Terminator,
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HasParent<"ConditionalOp">
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]> {
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let summary = "conditional yield and termination operation";
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let description = [{
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"moore.yield" yields an SSA value from the Moore dialect op region and
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terminates the regions. The semantics of how the values are yielded is
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defined by the parent operation.
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If "moore.yield" has any operands, the operands must match the parent
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operation's results.
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If the parent operation defines no values, then the "moore.yield" may be
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left out in the custom syntax and the builders will insert one implicitly.
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Otherwise, it has to be present in the syntax to indicate which values are
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yielded.
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}];
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let arguments = (ins UnpackedType:$result);
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let builders = [OpBuilder<(ins), [{ /* nothing to do */ }]>];
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let assemblyFormat = [{
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attr-dict $result `:` type($result)
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}];
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let hasVerifier = 1;
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}
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#endif // CIRCT_DIALECT_MOORE_MOOREOPS
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@ -514,6 +514,41 @@ struct ExprVisitor {
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return result;
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}
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// Handle conditional operator `?:`.
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Value visit(const slang::ast::ConditionalExpression &expr) {
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auto type = context.convertType(*expr.type);
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// Handle condition.
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Value cond = convertToSimpleBitVector(
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context.convertExpression(*expr.conditions.begin()->expr));
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cond = convertToBool(cond);
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if (!cond)
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return {};
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auto conditionalOp = builder.create<moore::ConditionalOp>(loc, type, cond);
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// Create blocks for true region and false region.
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conditionalOp.getTrueRegion().emplaceBlock();
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conditionalOp.getFalseRegion().emplaceBlock();
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OpBuilder::InsertionGuard g(builder);
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// Handle left expression.
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builder.setInsertionPointToStart(conditionalOp.getBody(0));
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auto trueValue = context.convertExpression(expr.left());
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if (!trueValue)
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return {};
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builder.create<moore::YieldOp>(loc, trueValue);
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// Handle right expression.
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builder.setInsertionPointToStart(conditionalOp.getBody(1));
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auto falseValue = context.convertExpression(expr.right());
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if (!falseValue)
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return {};
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builder.create<moore::YieldOp>(loc, falseValue);
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return conditionalOp.getResult();
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}
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/// Emit an error for all other expressions.
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template <typename T>
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Value visit(T &&node) {
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@ -353,6 +353,30 @@ LogicalResult ConcatOp::inferReturnTypes(
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return success();
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}
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//===----------------------------------------------------------------------===//
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// YieldOp
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//===----------------------------------------------------------------------===//
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LogicalResult YieldOp::verify() {
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// Check that YieldOp's parent operation is ConditionalOp.
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auto cond = dyn_cast<ConditionalOp>(*(*this).getParentOp());
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if (!cond) {
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emitOpError("must have a conditional parent");
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return failure();
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}
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// Check that the operand matches the parent operation's result.
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auto condType = cond.getType();
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auto yieldType = getOperand().getType();
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if (condType != yieldType) {
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emitOpError("yield type must match conditional. Expected ")
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<< condType << ", but got " << yieldType << ".";
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return failure();
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}
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return success();
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}
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//===----------------------------------------------------------------------===//
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// ConversionOp
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//===----------------------------------------------------------------------===//
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@ -350,6 +350,9 @@ module Expressions;
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int a, b;
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} c, d;
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} union1;
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// CHECK: %r1 = moore.variable : real
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// CHECK: %r2 = moore.variable : real
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real r1,r2;
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initial begin
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// CHECK: moore.constant 0 : i32
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@ -600,6 +603,41 @@ module Expressions;
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// CHECK: moore.or [[TMP1]], [[TMP6]] : i1
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c = a inside { a, b, [a:b] };
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//===------------------------------------------------------------------===//
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// Conditional operator
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// CHECK: moore.conditional %x : i1 -> i32 {
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// CHECK: moore.yield %a : i32
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// CHECK: } {
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// CHECK: moore.yield %b : i32
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// CHECK: }
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c = x ? a : b;
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// CHECK: moore.conditional %x : i1 -> real {
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// CHECK: moore.yield %r1 : real
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// CHECK: } {
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// CHECK: moore.yield %r2 : real
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// CHECK: }
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r1 = x ? r1 : r2;
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// CHECK: [[TMP1:%.+]] = moore.bool_cast %a : i32 -> i1
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// CHECK: moore.conditional [[TMP1]] : i1 -> i32 {
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// CHECK: moore.yield %a : i32
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// CHECK: } {
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// CHECK: moore.yield %b : i32
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// CHECK: }
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c = a ? a : b;
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// CHECK: [[TMP1:%.+]] = moore.sgt %a, %b : i32 -> i1
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// CHECK: moore.conditional [[TMP1]] : i1 -> i32 {
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// CHECK: [[TMP2:%.+]] = moore.add %a, %b : i32
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// CHECK: moore.yield [[TMP2]] : i32
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// CHECK: } {
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// CHECK: [[TMP2:%.+]] = moore.sub %a, %b : i32
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// CHECK: moore.yield [[TMP2]] : i32
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// CHECK: }
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c = (a > b) ? (a + b) : (a - b);
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//===------------------------------------------------------------------===//
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// Assign operators
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@ -217,4 +217,15 @@ moore.module @Expressions() {
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// CHECK: moore.extract [[VAL4]] from [[VAL5]] : i8, i32 -> i5
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%5 = moore.constant 2 : i32
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moore.extract %4 from %5 : i8, i32 -> i5
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// CHECK: moore.conditional %b1 : i1 -> i32 {
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// CHECK: moore.yield %int : i32
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// CHECK: } {
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// CHECK: moore.yield %int2 : i32
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// CHECK: }
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moore.conditional %b1 : i1 -> i32 {
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moore.yield %int : i32
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} {
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moore.yield %int2 : i32
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}
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}
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@ -65,3 +65,25 @@ moore.constant -2 : !moore.i1
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// expected-error @below {{attribute width 9 does not match return type's width 8}}
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"moore.constant" () {value = 42 : i9} : () -> !moore.i8
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// -----
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%y = moore.variable : i8
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moore.module @Cond() {
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// expected-error @below {{'moore.yield' op expects parent op 'moore.conditional'}}
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moore.yield %y : i8
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}
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// -----
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%x = moore.variable : i1
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%t = moore.variable : i8
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%f = moore.variable : i8
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moore.conditional %x : i1 -> i32 {
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// expected-error @below {{yield type must match conditional. Expected '!moore.i32', but got '!moore.i8'}}
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moore.yield %t : i8
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} {
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moore.yield %f : i8
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}
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