mirror of https://github.com/llvm/circt.git
73 lines
2.8 KiB
C++
73 lines
2.8 KiB
C++
//===- ImportVerilogInternals.h - Internal implementation details ---------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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// NOLINTNEXTLINE(llvm-header-guard)
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#ifndef CONVERSION_IMPORTVERILOG_IMPORTVERILOGINTERNALS_H
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#define CONVERSION_IMPORTVERILOG_IMPORTVERILOGINTERNALS_H
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#include "circt/Conversion/ImportVerilog.h"
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#include "circt/Dialect/Moore/MooreOps.h"
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#include "slang/ast/ASTVisitor.h"
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#include "llvm/Support/Debug.h"
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#include <map>
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#include <queue>
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#define DEBUG_TYPE "import-verilog"
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namespace circt {
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namespace ImportVerilog {
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/// A helper class to facilitate the conversion from a Slang AST to MLIR
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/// operations. Keeps track of the destination MLIR module, builders, and
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/// various worklists and utilities needed for conversion.
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struct Context {
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Context(mlir::ModuleOp intoModuleOp,
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const slang::SourceManager &sourceManager,
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SmallDenseMap<slang::BufferID, StringRef> &bufferFilePaths)
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: intoModuleOp(intoModuleOp), sourceManager(sourceManager),
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bufferFilePaths(bufferFilePaths),
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builder(OpBuilder::atBlockEnd(intoModuleOp.getBody())),
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symbolTable(intoModuleOp) {}
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Context(const Context &) = delete;
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/// Return the MLIR context.
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MLIRContext *getContext() { return intoModuleOp.getContext(); }
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/// Convert a slang `SourceLocation` into an MLIR `Location`.
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Location convertLocation(slang::SourceLocation loc);
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/// Convert hierarchy and structure AST nodes to MLIR ops.
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LogicalResult convertCompilation(slang::ast::Compilation &compilation);
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moore::SVModuleOp
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convertModuleHeader(const slang::ast::InstanceBodySymbol *module);
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LogicalResult convertModuleBody(const slang::ast::InstanceBodySymbol *module);
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mlir::ModuleOp intoModuleOp;
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const slang::SourceManager &sourceManager;
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SmallDenseMap<slang::BufferID, StringRef> &bufferFilePaths;
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/// The builder used to create IR operations.
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OpBuilder builder;
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/// A symbol table of the MLIR module we are emitting into.
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SymbolTable symbolTable;
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/// The top-level operations ordered by their Slang source location. This is
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/// used to produce IR that follows the source file order.
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std::map<slang::SourceLocation, Operation *> orderedRootOps;
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/// How we have lowered modules to MLIR.
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DenseMap<const slang::ast::InstanceBodySymbol *, moore::SVModuleOp> moduleOps;
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/// A list of modules for which the header has been created, but the body has
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/// not been converted yet.
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std::queue<const slang::ast::InstanceBodySymbol *> moduleWorklist;
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};
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} // namespace ImportVerilog
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} // namespace circt
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#endif // CONVERSION_IMPORTVERILOG_IMPORTVERILOGINTERNALS_H
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