forked from OSchip/llvm-project
				
			Split the usage of 'EVT PartVT' into 'MVT PartVT' and 'EVT PartEVT'.
llvm-svn: 170540
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						00e7a11904
					
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					@ -89,7 +89,7 @@ static const unsigned MaxParallelChains = 64;
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static SDValue getCopyFromPartsVector(SelectionDAG &DAG, DebugLoc DL,
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					static SDValue getCopyFromPartsVector(SelectionDAG &DAG, DebugLoc DL,
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                                      const SDValue *Parts, unsigned NumParts,
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					                                      const SDValue *Parts, unsigned NumParts,
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                                      EVT PartVT, EVT ValueVT, const Value *V);
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					                                      MVT PartVT, EVT ValueVT, const Value *V);
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/// getCopyFromParts - Create a value that contains the specified legal parts
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					/// getCopyFromParts - Create a value that contains the specified legal parts
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/// combined into the value they represent.  If the parts combine to a type
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					/// combined into the value they represent.  If the parts combine to a type
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					@ -98,7 +98,7 @@ static SDValue getCopyFromPartsVector(SelectionDAG &DAG, DebugLoc DL,
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/// (ISD::AssertSext).
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					/// (ISD::AssertSext).
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static SDValue getCopyFromParts(SelectionDAG &DAG, DebugLoc DL,
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					static SDValue getCopyFromParts(SelectionDAG &DAG, DebugLoc DL,
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                                const SDValue *Parts,
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					                                const SDValue *Parts,
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                                unsigned NumParts, EVT PartVT, EVT ValueVT,
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					                                unsigned NumParts, MVT PartVT, EVT ValueVT,
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                                const Value *V,
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					                                const Value *V,
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                                ISD::NodeType AssertOp = ISD::DELETED_NODE) {
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					                                ISD::NodeType AssertOp = ISD::DELETED_NODE) {
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  if (ValueVT.isVector())
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					  if (ValueVT.isVector())
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					@ -161,7 +161,7 @@ static SDValue getCopyFromParts(SelectionDAG &DAG, DebugLoc DL,
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      }
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					      }
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    } else if (PartVT.isFloatingPoint()) {
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					    } else if (PartVT.isFloatingPoint()) {
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      // FP split into multiple FP parts (for ppcf128)
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					      // FP split into multiple FP parts (for ppcf128)
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      assert(ValueVT == EVT(MVT::ppcf128) && PartVT == EVT(MVT::f64) &&
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					      assert(ValueVT == EVT(MVT::ppcf128) && PartVT == MVT::f64 &&
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             "Unexpected split");
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					             "Unexpected split");
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      SDValue Lo, Hi;
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					      SDValue Lo, Hi;
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      Lo = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[0]);
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					      Lo = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[0]);
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					@ -179,25 +179,25 @@ static SDValue getCopyFromParts(SelectionDAG &DAG, DebugLoc DL,
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  }
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					  }
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  // There is now one part, held in Val.  Correct it to match ValueVT.
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					  // There is now one part, held in Val.  Correct it to match ValueVT.
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  PartVT = Val.getValueType();
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					  EVT PartEVT = Val.getValueType();
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  if (PartVT == ValueVT)
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					  if (PartEVT == ValueVT)
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    return Val;
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					    return Val;
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  if (PartVT.isInteger() && ValueVT.isInteger()) {
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					  if (PartEVT.isInteger() && ValueVT.isInteger()) {
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    if (ValueVT.bitsLT(PartVT)) {
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					    if (ValueVT.bitsLT(PartEVT)) {
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      // For a truncate, see if we have any information to
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					      // For a truncate, see if we have any information to
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      // indicate whether the truncated bits will always be
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					      // indicate whether the truncated bits will always be
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      // zero or sign-extension.
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					      // zero or sign-extension.
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      if (AssertOp != ISD::DELETED_NODE)
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					      if (AssertOp != ISD::DELETED_NODE)
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        Val = DAG.getNode(AssertOp, DL, PartVT, Val,
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					        Val = DAG.getNode(AssertOp, DL, PartEVT, Val,
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                          DAG.getValueType(ValueVT));
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					                          DAG.getValueType(ValueVT));
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      return DAG.getNode(ISD::TRUNCATE, DL, ValueVT, Val);
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					      return DAG.getNode(ISD::TRUNCATE, DL, ValueVT, Val);
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    }
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					    }
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    return DAG.getNode(ISD::ANY_EXTEND, DL, ValueVT, Val);
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					    return DAG.getNode(ISD::ANY_EXTEND, DL, ValueVT, Val);
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  }
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					  }
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  if (PartVT.isFloatingPoint() && ValueVT.isFloatingPoint()) {
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					  if (PartEVT.isFloatingPoint() && ValueVT.isFloatingPoint()) {
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    // FP_ROUND's are always exact here.
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					    // FP_ROUND's are always exact here.
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    if (ValueVT.bitsLT(Val.getValueType()))
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					    if (ValueVT.bitsLT(Val.getValueType()))
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      return DAG.getNode(ISD::FP_ROUND, DL, ValueVT, Val,
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					      return DAG.getNode(ISD::FP_ROUND, DL, ValueVT, Val,
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					@ -206,7 +206,7 @@ static SDValue getCopyFromParts(SelectionDAG &DAG, DebugLoc DL,
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    return DAG.getNode(ISD::FP_EXTEND, DL, ValueVT, Val);
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					    return DAG.getNode(ISD::FP_EXTEND, DL, ValueVT, Val);
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  }
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					  }
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  if (PartVT.getSizeInBits() == ValueVT.getSizeInBits())
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					  if (PartEVT.getSizeInBits() == ValueVT.getSizeInBits())
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    return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
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					    return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
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  llvm_unreachable("Unknown mismatch!");
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					  llvm_unreachable("Unknown mismatch!");
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					@ -219,7 +219,7 @@ static SDValue getCopyFromParts(SelectionDAG &DAG, DebugLoc DL,
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/// ValueVT (ISD::AssertSext).
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					/// ValueVT (ISD::AssertSext).
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static SDValue getCopyFromPartsVector(SelectionDAG &DAG, DebugLoc DL,
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					static SDValue getCopyFromPartsVector(SelectionDAG &DAG, DebugLoc DL,
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                                      const SDValue *Parts, unsigned NumParts,
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					                                      const SDValue *Parts, unsigned NumParts,
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                                      EVT PartVT, EVT ValueVT, const Value *V) {
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					                                      MVT PartVT, EVT ValueVT, const Value *V) {
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  assert(ValueVT.isVector() && "Not a vector value");
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					  assert(ValueVT.isVector() && "Not a vector value");
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  assert(NumParts > 0 && "No parts to assemble!");
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					  assert(NumParts > 0 && "No parts to assemble!");
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  const TargetLowering &TLI = DAG.getTargetLoweringInfo();
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					  const TargetLowering &TLI = DAG.getTargetLoweringInfo();
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					@ -235,8 +235,7 @@ static SDValue getCopyFromPartsVector(SelectionDAG &DAG, DebugLoc DL,
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                               NumIntermediates, RegisterVT);
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					                               NumIntermediates, RegisterVT);
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    assert(NumRegs == NumParts && "Part count doesn't match vector breakdown!");
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					    assert(NumRegs == NumParts && "Part count doesn't match vector breakdown!");
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    NumParts = NumRegs; // Silence a compiler warning.
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					    NumParts = NumRegs; // Silence a compiler warning.
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    assert(RegisterVT == PartVT.getSimpleVT() &&
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					    assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!");
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           "Part type doesn't match vector breakdown!");
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    assert(RegisterVT == Parts[0].getSimpleValueType() &&
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					    assert(RegisterVT == Parts[0].getSimpleValueType() &&
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           "Part type doesn't match part!");
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					           "Part type doesn't match part!");
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					@ -267,31 +266,31 @@ static SDValue getCopyFromPartsVector(SelectionDAG &DAG, DebugLoc DL,
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  }
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					  }
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  // There is now one part, held in Val.  Correct it to match ValueVT.
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					  // There is now one part, held in Val.  Correct it to match ValueVT.
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  PartVT = Val.getValueType();
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					  EVT PartEVT = Val.getValueType();
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  if (PartVT == ValueVT)
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					  if (PartEVT == ValueVT)
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    return Val;
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					    return Val;
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  if (PartVT.isVector()) {
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					  if (PartEVT.isVector()) {
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    // If the element type of the source/dest vectors are the same, but the
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					    // If the element type of the source/dest vectors are the same, but the
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    // parts vector has more elements than the value vector, then we have a
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					    // parts vector has more elements than the value vector, then we have a
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    // vector widening case (e.g. <2 x float> -> <4 x float>).  Extract the
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					    // vector widening case (e.g. <2 x float> -> <4 x float>).  Extract the
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    // elements we want.
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					    // elements we want.
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    if (PartVT.getVectorElementType() == ValueVT.getVectorElementType()) {
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					    if (PartEVT.getVectorElementType() == ValueVT.getVectorElementType()) {
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      assert(PartVT.getVectorNumElements() > ValueVT.getVectorNumElements() &&
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					      assert(PartEVT.getVectorNumElements() > ValueVT.getVectorNumElements() &&
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             "Cannot narrow, it would be a lossy transformation");
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					             "Cannot narrow, it would be a lossy transformation");
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      return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, ValueVT, Val,
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					      return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, ValueVT, Val,
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                         DAG.getIntPtrConstant(0));
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					                         DAG.getIntPtrConstant(0));
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    }
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					    }
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    // Vector/Vector bitcast.
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					    // Vector/Vector bitcast.
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    if (ValueVT.getSizeInBits() == PartVT.getSizeInBits())
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					    if (ValueVT.getSizeInBits() == PartEVT.getSizeInBits())
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      return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
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					      return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
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    assert(PartVT.getVectorNumElements() == ValueVT.getVectorNumElements() &&
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					    assert(PartEVT.getVectorNumElements() == ValueVT.getVectorNumElements() &&
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      "Cannot handle this kind of promotion");
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					      "Cannot handle this kind of promotion");
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    // Promoted vector extract
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					    // Promoted vector extract
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    bool Smaller = ValueVT.bitsLE(PartVT);
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					    bool Smaller = ValueVT.bitsLE(PartEVT);
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    return DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND),
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					    return DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND),
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                       DL, ValueVT, Val);
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					                       DL, ValueVT, Val);
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					@ -299,7 +298,7 @@ static SDValue getCopyFromPartsVector(SelectionDAG &DAG, DebugLoc DL,
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  // Trivial bitcast if the types are the same size and the destination
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					  // Trivial bitcast if the types are the same size and the destination
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  // vector type is legal.
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					  // vector type is legal.
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  if (PartVT.getSizeInBits() == ValueVT.getSizeInBits() &&
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					  if (PartEVT.getSizeInBits() == ValueVT.getSizeInBits() &&
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      TLI.isTypeLegal(ValueVT))
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					      TLI.isTypeLegal(ValueVT))
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    return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
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					    return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
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					@ -319,8 +318,8 @@ static SDValue getCopyFromPartsVector(SelectionDAG &DAG, DebugLoc DL,
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  }
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					  }
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  if (ValueVT.getVectorNumElements() == 1 &&
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					  if (ValueVT.getVectorNumElements() == 1 &&
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      ValueVT.getVectorElementType() != PartVT) {
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					      ValueVT.getVectorElementType() != PartEVT) {
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    bool Smaller = ValueVT.bitsLE(PartVT);
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					    bool Smaller = ValueVT.bitsLE(PartEVT);
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    Val = DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND),
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					    Val = DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND),
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                       DL, ValueVT.getScalarType(), Val);
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					                       DL, ValueVT.getScalarType(), Val);
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  }
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					  }
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					@ -330,14 +329,14 @@ static SDValue getCopyFromPartsVector(SelectionDAG &DAG, DebugLoc DL,
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static void getCopyToPartsVector(SelectionDAG &DAG, DebugLoc dl,
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					static void getCopyToPartsVector(SelectionDAG &DAG, DebugLoc dl,
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                                 SDValue Val, SDValue *Parts, unsigned NumParts,
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					                                 SDValue Val, SDValue *Parts, unsigned NumParts,
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                                 EVT PartVT, const Value *V);
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					                                 MVT PartVT, const Value *V);
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/// getCopyToParts - Create a series of nodes that contain the specified value
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					/// getCopyToParts - Create a series of nodes that contain the specified value
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/// split into legal parts.  If the parts contain more bits than Val, then, for
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					/// split into legal parts.  If the parts contain more bits than Val, then, for
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/// integers, ExtendKind can be used to specify how to generate the extra bits.
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					/// integers, ExtendKind can be used to specify how to generate the extra bits.
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static void getCopyToParts(SelectionDAG &DAG, DebugLoc DL,
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					static void getCopyToParts(SelectionDAG &DAG, DebugLoc DL,
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                           SDValue Val, SDValue *Parts, unsigned NumParts,
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					                           SDValue Val, SDValue *Parts, unsigned NumParts,
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                           EVT PartVT, const Value *V,
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					                           MVT PartVT, const Value *V,
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                           ISD::NodeType ExtendKind = ISD::ANY_EXTEND) {
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					                           ISD::NodeType ExtendKind = ISD::ANY_EXTEND) {
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  EVT ValueVT = Val.getValueType();
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					  EVT ValueVT = Val.getValueType();
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					@ -354,7 +353,8 @@ static void getCopyToParts(SelectionDAG &DAG, DebugLoc DL,
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    return;
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					    return;
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  assert(!ValueVT.isVector() && "Vector case handled elsewhere");
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					  assert(!ValueVT.isVector() && "Vector case handled elsewhere");
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  if (PartVT == ValueVT) {
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					  EVT PartEVT = PartVT;
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					  if (PartEVT == ValueVT) {
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    assert(NumParts == 1 && "No-op copy with multiple parts!");
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					    assert(NumParts == 1 && "No-op copy with multiple parts!");
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    Parts[0] = Val;
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					    Parts[0] = Val;
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    return;
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					    return;
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					@ -376,7 +376,7 @@ static void getCopyToParts(SelectionDAG &DAG, DebugLoc DL,
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    }
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					    }
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  } else if (PartBits == ValueVT.getSizeInBits()) {
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					  } else if (PartBits == ValueVT.getSizeInBits()) {
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    // Different types of the same size.
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					    // Different types of the same size.
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    assert(NumParts == 1 && PartVT != ValueVT);
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					    assert(NumParts == 1 && PartEVT != ValueVT);
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    Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val);
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					    Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val);
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  } else if (NumParts * PartBits < ValueVT.getSizeInBits()) {
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					  } else if (NumParts * PartBits < ValueVT.getSizeInBits()) {
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    // If the parts cover less bits than value has, truncate the value.
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					    // If the parts cover less bits than value has, truncate the value.
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					@ -395,7 +395,7 @@ static void getCopyToParts(SelectionDAG &DAG, DebugLoc DL,
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         "Failed to tile the value with PartVT!");
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					         "Failed to tile the value with PartVT!");
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  if (NumParts == 1) {
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					  if (NumParts == 1) {
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    if (PartVT != ValueVT) {
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					    if (PartEVT != ValueVT) {
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      LLVMContext &Ctx = *DAG.getContext();
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					      LLVMContext &Ctx = *DAG.getContext();
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      Twine ErrMsg("scalar-to-vector conversion failed");
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					      Twine ErrMsg("scalar-to-vector conversion failed");
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      if (const Instruction *I = dyn_cast_or_null<Instruction>(V)) {
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					      if (const Instruction *I = dyn_cast_or_null<Instruction>(V)) {
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					@ -468,20 +468,21 @@ static void getCopyToParts(SelectionDAG &DAG, DebugLoc DL,
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/// value split into legal parts.
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					/// value split into legal parts.
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static void getCopyToPartsVector(SelectionDAG &DAG, DebugLoc DL,
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					static void getCopyToPartsVector(SelectionDAG &DAG, DebugLoc DL,
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                                 SDValue Val, SDValue *Parts, unsigned NumParts,
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					                                 SDValue Val, SDValue *Parts, unsigned NumParts,
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                                 EVT PartVT, const Value *V) {
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					                                 MVT PartVT, const Value *V) {
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  EVT ValueVT = Val.getValueType();
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					  EVT ValueVT = Val.getValueType();
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  assert(ValueVT.isVector() && "Not a vector");
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					  assert(ValueVT.isVector() && "Not a vector");
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  const TargetLowering &TLI = DAG.getTargetLoweringInfo();
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					  const TargetLowering &TLI = DAG.getTargetLoweringInfo();
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  if (NumParts == 1) {
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					  if (NumParts == 1) {
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    if (PartVT == ValueVT) {
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					    EVT PartEVT = PartVT;
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					    if (PartEVT == ValueVT) {
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      // Nothing to do.
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					      // Nothing to do.
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    } else if (PartVT.getSizeInBits() == ValueVT.getSizeInBits()) {
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					    } else if (PartVT.getSizeInBits() == ValueVT.getSizeInBits()) {
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      // Bitconvert vector->vector case.
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					      // Bitconvert vector->vector case.
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      Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val);
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					      Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val);
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    } else if (PartVT.isVector() &&
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					    } else if (PartVT.isVector() &&
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               PartVT.getVectorElementType() == ValueVT.getVectorElementType() &&
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					               PartEVT.getVectorElementType() == ValueVT.getVectorElementType() &&
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               PartVT.getVectorNumElements() > ValueVT.getVectorNumElements()) {
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					               PartEVT.getVectorNumElements() > ValueVT.getVectorNumElements()) {
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      EVT ElementVT = PartVT.getVectorElementType();
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					      EVT ElementVT = PartVT.getVectorElementType();
 | 
				
			||||||
      // Vector widening case, e.g. <2 x float> -> <4 x float>.  Shuffle in
 | 
					      // Vector widening case, e.g. <2 x float> -> <4 x float>.  Shuffle in
 | 
				
			||||||
      // undef elements.
 | 
					      // undef elements.
 | 
				
			||||||
| 
						 | 
					@ -501,12 +502,12 @@ static void getCopyToPartsVector(SelectionDAG &DAG, DebugLoc DL,
 | 
				
			||||||
      //SDValue UndefElts = DAG.getUNDEF(VectorTy);
 | 
					      //SDValue UndefElts = DAG.getUNDEF(VectorTy);
 | 
				
			||||||
      //Val = DAG.getNode(ISD::CONCAT_VECTORS, DL, PartVT, Val, UndefElts);
 | 
					      //Val = DAG.getNode(ISD::CONCAT_VECTORS, DL, PartVT, Val, UndefElts);
 | 
				
			||||||
    } else if (PartVT.isVector() &&
 | 
					    } else if (PartVT.isVector() &&
 | 
				
			||||||
               PartVT.getVectorElementType().bitsGE(
 | 
					               PartEVT.getVectorElementType().bitsGE(
 | 
				
			||||||
                 ValueVT.getVectorElementType()) &&
 | 
					                 ValueVT.getVectorElementType()) &&
 | 
				
			||||||
               PartVT.getVectorNumElements() == ValueVT.getVectorNumElements()) {
 | 
					               PartEVT.getVectorNumElements() == ValueVT.getVectorNumElements()) {
 | 
				
			||||||
 | 
					
 | 
				
			||||||
      // Promoted vector extract
 | 
					      // Promoted vector extract
 | 
				
			||||||
      bool Smaller = PartVT.bitsLE(ValueVT);
 | 
					      bool Smaller = PartEVT.bitsLE(ValueVT);
 | 
				
			||||||
      Val = DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND),
 | 
					      Val = DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND),
 | 
				
			||||||
                        DL, PartVT, Val);
 | 
					                        DL, PartVT, Val);
 | 
				
			||||||
    } else{
 | 
					    } else{
 | 
				
			||||||
| 
						 | 
					@ -536,8 +537,7 @@ static void getCopyToPartsVector(SelectionDAG &DAG, DebugLoc DL,
 | 
				
			||||||
 | 
					
 | 
				
			||||||
  assert(NumRegs == NumParts && "Part count doesn't match vector breakdown!");
 | 
					  assert(NumRegs == NumParts && "Part count doesn't match vector breakdown!");
 | 
				
			||||||
  NumParts = NumRegs; // Silence a compiler warning.
 | 
					  NumParts = NumRegs; // Silence a compiler warning.
 | 
				
			||||||
  assert(RegisterVT == PartVT.getSimpleVT() &&
 | 
					  assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!");
 | 
				
			||||||
         "Part type doesn't match vector breakdown!");
 | 
					 | 
				
			||||||
 | 
					
 | 
				
			||||||
  // Split the vector into intermediate operands.
 | 
					  // Split the vector into intermediate operands.
 | 
				
			||||||
  SmallVector<SDValue, 8> Ops(NumIntermediates);
 | 
					  SmallVector<SDValue, 8> Ops(NumIntermediates);
 | 
				
			||||||
| 
						 | 
					
 | 
				
			||||||
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		Reference in New Issue