[NFC][PowerPC] Added a test to show current codegen of MachinePRE

llvm-svn: 365447

llvm/test/CodeGen/PowerPC/machine-pre.ll

@@ -0,0 +1,55 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \
+; RUN:   -ppc-asm-full-reg-names -verify-machineinstrs -O2 < %s | FileCheck %s \
+; RUN:   --check-prefix=CHECK-P9
+
+define i32 @t(i32 %n, i32 %delta, i32 %a) {
+; CHECK-P9-LABEL: t:
+; CHECK-P9:       # %bb.0: # %entry
+; CHECK-P9-NEXT:    lis r7, 0
+; CHECK-P9-NEXT:    li r6, 0
+; CHECK-P9-NEXT:    li r9, 0
+; CHECK-P9-NEXT:    li r10, 0
+; CHECK-P9-NEXT:    ori r7, r7, 65535
+; CHECK-P9-NEXT:    .p2align 5
+; CHECK-P9-NEXT:  .LBB0_1: # %header
+; CHECK-P9-NEXT:    #
+; CHECK-P9-NEXT:    addi r10, r10, 1
+; CHECK-P9-NEXT:    cmpw r10, r3
+; CHECK-P9-NEXT:    addi r8, r5, 1024
+; CHECK-P9-NEXT:    blt cr0, .LBB0_4
+; CHECK-P9-NEXT:  # %bb.2: # %cont
+; CHECK-P9-NEXT:    #
+; CHECK-P9-NEXT:    add r9, r9, r4
+; CHECK-P9-NEXT:    cmpw r9, r7
+; CHECK-P9-NEXT:    bgt cr0, .LBB0_1
+; CHECK-P9-NEXT:  # %bb.3: # %cont.1
+; CHECK-P9-NEXT:    mr r6, r8
+; CHECK-P9-NEXT:  .LBB0_4: # %return
+; CHECK-P9-NEXT:    mullw r3, r6, r8
+; CHECK-P9-NEXT:    blr
+entry:
+  br label %header
+
+header:
+  %sum = phi i32 [ 0, %entry ], [ %sum.1, %cont ]
+  %i = phi i32 [ 0, %entry ], [ %i.1, %cont ]
+  %i.1 = add nsw i32 %i, 1
+  %lt = icmp slt i32 %i.1, %n
+  br i1 %lt, label %return, label %cont
+
+cont:
+  %sum.1 = add nsw i32 %sum, %delta
+  %lt.1 = icmp slt i32 %sum.1, 65536
+  br i1 %lt.1, label %cont.1, label %header
+
+cont.1:
+  %delta.1 = add nsw i32 %a, 1024
+  br label %return
+
+return:
+  %delta.2 = phi i32 [ %delta.1, %cont.1 ], [ 0, %header ]
+  %delta.3 = add nsw i32 %a, 1024
+  %ret = mul i32 %delta.2, %delta.3
+  ret i32 %ret
+}