forked from OSchip/llvm-project
[SelectionDAG] fminnum should be a binary operator
Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D91163
This commit is contained in:
Chen Zheng
parent
67cc5cec77
commit
09e34048bf
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@ -1294,7 +1294,7 @@ void DAGTypeLegalizer::ExpandFloatRes_FABS(SDNode *N, SDValue &Lo,
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void DAGTypeLegalizer::ExpandFloatRes_FMINNUM(SDNode *N, SDValue &Lo,
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SDValue &Hi) {
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ExpandFloatRes_Unary(N, GetFPLibCall(N->getValueType(0),
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ExpandFloatRes_Binary(N, GetFPLibCall(N->getValueType(0),
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RTLIB::FMIN_F32, RTLIB::FMIN_F64,
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RTLIB::FMIN_F80, RTLIB::FMIN_F128,
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RTLIB::FMIN_PPCF128), Lo, Hi);
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@ -51,36 +51,48 @@ define ppc_fp128 @test_fminl(ppc_fp128 %x, ppc_fp128 %y) {
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; CHECK: # %bb.0:
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; CHECK-NEXT: mflr 0
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; CHECK-NEXT: stw 0, 4(1)
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; CHECK-NEXT: stwu 1, -80(1)
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; CHECK-NEXT: .cfi_def_cfa_offset 80
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; CHECK-NEXT: stwu 1, -112(1)
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; CHECK-NEXT: .cfi_def_cfa_offset 112
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; CHECK-NEXT: .cfi_offset lr, 4
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; CHECK-NEXT: stfd 1, 40(1)
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; CHECK-NEXT: lwz 3, 44(1)
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; CHECK-NEXT: stfd 2, 32(1)
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; CHECK-NEXT: stw 3, 60(1)
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; CHECK-NEXT: lwz 3, 40(1)
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; CHECK-NEXT: stfd 3, 72(1)
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; CHECK-NEXT: stw 3, 56(1)
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; CHECK-NEXT: lwz 3, 36(1)
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; CHECK-NEXT: lfd 1, 56(1)
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; CHECK-NEXT: stfd 4, 64(1)
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; CHECK-NEXT: stw 3, 52(1)
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; CHECK-NEXT: lwz 3, 32(1)
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; CHECK-NEXT: lfd 1, 56(1)
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; CHECK-NEXT: stw 3, 48(1)
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; CHECK-NEXT: lwz 3, 76(1)
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; CHECK-NEXT: lfd 2, 48(1)
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; CHECK-NEXT: stw 3, 92(1)
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; CHECK-NEXT: lwz 3, 72(1)
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; CHECK-NEXT: stw 3, 88(1)
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; CHECK-NEXT: lwz 3, 68(1)
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; CHECK-NEXT: lfd 3, 88(1)
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; CHECK-NEXT: stw 3, 84(1)
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; CHECK-NEXT: lwz 3, 64(1)
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; CHECK-NEXT: stw 3, 80(1)
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; CHECK-NEXT: lfd 4, 80(1)
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; CHECK-NEXT: bl fminl
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; CHECK-NEXT: stfd 1, 16(1)
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; CHECK-NEXT: lwz 3, 20(1)
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; CHECK-NEXT: stfd 2, 24(1)
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; CHECK-NEXT: stw 3, 76(1)
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; CHECK-NEXT: stw 3, 108(1)
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; CHECK-NEXT: lwz 3, 16(1)
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; CHECK-NEXT: stw 3, 72(1)
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; CHECK-NEXT: stw 3, 104(1)
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; CHECK-NEXT: lwz 3, 28(1)
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; CHECK-NEXT: lfd 1, 72(1)
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; CHECK-NEXT: stw 3, 68(1)
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; CHECK-NEXT: lfd 1, 104(1)
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; CHECK-NEXT: stw 3, 100(1)
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; CHECK-NEXT: lwz 3, 24(1)
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; CHECK-NEXT: stw 3, 64(1)
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; CHECK-NEXT: lfd 2, 64(1)
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; CHECK-NEXT: lwz 0, 84(1)
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; CHECK-NEXT: addi 1, 1, 80
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; CHECK-NEXT: stw 3, 96(1)
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; CHECK-NEXT: lfd 2, 96(1)
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; CHECK-NEXT: lwz 0, 116(1)
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; CHECK-NEXT: addi 1, 1, 112
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; CHECK-NEXT: mtlr 0
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; CHECK-NEXT: blr
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%z = call ppc_fp128 @fminl(ppc_fp128 %x, ppc_fp128 %y) readnone
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@ -126,36 +138,48 @@ define ppc_fp128 @test_intrinsic_fmin_f128(ppc_fp128 %x, ppc_fp128 %y) {
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; CHECK: # %bb.0:
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; CHECK-NEXT: mflr 0
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; CHECK-NEXT: stw 0, 4(1)
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; CHECK-NEXT: stwu 1, -80(1)
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; CHECK-NEXT: .cfi_def_cfa_offset 80
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; CHECK-NEXT: stwu 1, -112(1)
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; CHECK-NEXT: .cfi_def_cfa_offset 112
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; CHECK-NEXT: .cfi_offset lr, 4
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; CHECK-NEXT: stfd 1, 40(1)
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; CHECK-NEXT: lwz 3, 44(1)
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; CHECK-NEXT: stfd 2, 32(1)
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; CHECK-NEXT: stw 3, 60(1)
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; CHECK-NEXT: lwz 3, 40(1)
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; CHECK-NEXT: stfd 3, 72(1)
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; CHECK-NEXT: stw 3, 56(1)
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; CHECK-NEXT: lwz 3, 36(1)
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; CHECK-NEXT: lfd 1, 56(1)
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; CHECK-NEXT: stfd 4, 64(1)
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; CHECK-NEXT: stw 3, 52(1)
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; CHECK-NEXT: lwz 3, 32(1)
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; CHECK-NEXT: lfd 1, 56(1)
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; CHECK-NEXT: stw 3, 48(1)
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; CHECK-NEXT: lwz 3, 76(1)
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; CHECK-NEXT: lfd 2, 48(1)
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; CHECK-NEXT: stw 3, 92(1)
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; CHECK-NEXT: lwz 3, 72(1)
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; CHECK-NEXT: stw 3, 88(1)
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; CHECK-NEXT: lwz 3, 68(1)
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; CHECK-NEXT: lfd 3, 88(1)
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; CHECK-NEXT: stw 3, 84(1)
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; CHECK-NEXT: lwz 3, 64(1)
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; CHECK-NEXT: stw 3, 80(1)
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; CHECK-NEXT: lfd 4, 80(1)
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; CHECK-NEXT: bl fminl
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; CHECK-NEXT: stfd 1, 16(1)
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; CHECK-NEXT: lwz 3, 20(1)
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; CHECK-NEXT: stfd 2, 24(1)
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; CHECK-NEXT: stw 3, 76(1)
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; CHECK-NEXT: stw 3, 108(1)
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; CHECK-NEXT: lwz 3, 16(1)
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; CHECK-NEXT: stw 3, 72(1)
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; CHECK-NEXT: stw 3, 104(1)
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; CHECK-NEXT: lwz 3, 28(1)
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; CHECK-NEXT: lfd 1, 72(1)
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; CHECK-NEXT: stw 3, 68(1)
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; CHECK-NEXT: lfd 1, 104(1)
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; CHECK-NEXT: stw 3, 100(1)
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; CHECK-NEXT: lwz 3, 24(1)
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; CHECK-NEXT: stw 3, 64(1)
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; CHECK-NEXT: lfd 2, 64(1)
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; CHECK-NEXT: lwz 0, 84(1)
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; CHECK-NEXT: addi 1, 1, 80
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; CHECK-NEXT: stw 3, 96(1)
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; CHECK-NEXT: lfd 2, 96(1)
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; CHECK-NEXT: lwz 0, 116(1)
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; CHECK-NEXT: addi 1, 1, 112
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; CHECK-NEXT: mtlr 0
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; CHECK-NEXT: blr
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%z = call ppc_fp128 @llvm.minnum.ppcf128(ppc_fp128 %x, ppc_fp128 %y) readnone
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@ -376,36 +400,44 @@ define ppc_fp128 @fminnum_const(ppc_fp128 %0) {
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; CHECK: # %bb.0:
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; CHECK-NEXT: mflr 0
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; CHECK-NEXT: stw 0, 4(1)
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; CHECK-NEXT: stwu 1, -80(1)
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; CHECK-NEXT: .cfi_def_cfa_offset 80
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; CHECK-NEXT: stwu 1, -96(1)
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; CHECK-NEXT: .cfi_def_cfa_offset 96
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; CHECK-NEXT: .cfi_offset lr, 4
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; CHECK-NEXT: stfd 1, 40(1)
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; CHECK-NEXT: li 3, 0
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; CHECK-NEXT: stw 3, 76(1)
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; CHECK-NEXT: lis 4, 16368
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; CHECK-NEXT: stw 3, 68(1)
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; CHECK-NEXT: stw 3, 64(1)
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; CHECK-NEXT: lwz 3, 44(1)
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; CHECK-NEXT: stfd 2, 32(1)
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; CHECK-NEXT: stw 3, 60(1)
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; CHECK-NEXT: lwz 3, 40(1)
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; CHECK-NEXT: stw 4, 72(1)
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; CHECK-NEXT: stw 3, 56(1)
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; CHECK-NEXT: lwz 3, 36(1)
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; CHECK-NEXT: lfd 1, 56(1)
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; CHECK-NEXT: lfd 3, 72(1)
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; CHECK-NEXT: stw 3, 52(1)
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; CHECK-NEXT: lwz 3, 32(1)
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; CHECK-NEXT: lfd 4, 64(1)
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; CHECK-NEXT: stw 3, 48(1)
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; CHECK-NEXT: lfd 1, 56(1)
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; CHECK-NEXT: lfd 2, 48(1)
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; CHECK-NEXT: bl fminl
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; CHECK-NEXT: stfd 1, 16(1)
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; CHECK-NEXT: lwz 3, 20(1)
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; CHECK-NEXT: stfd 2, 24(1)
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; CHECK-NEXT: stw 3, 76(1)
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; CHECK-NEXT: stw 3, 92(1)
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; CHECK-NEXT: lwz 3, 16(1)
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; CHECK-NEXT: stw 3, 72(1)
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; CHECK-NEXT: stw 3, 88(1)
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; CHECK-NEXT: lwz 3, 28(1)
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; CHECK-NEXT: lfd 1, 72(1)
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; CHECK-NEXT: stw 3, 68(1)
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; CHECK-NEXT: lfd 1, 88(1)
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; CHECK-NEXT: stw 3, 84(1)
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; CHECK-NEXT: lwz 3, 24(1)
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; CHECK-NEXT: stw 3, 64(1)
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; CHECK-NEXT: lfd 2, 64(1)
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; CHECK-NEXT: lwz 0, 84(1)
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; CHECK-NEXT: addi 1, 1, 80
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; CHECK-NEXT: stw 3, 80(1)
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; CHECK-NEXT: lfd 2, 80(1)
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; CHECK-NEXT: lwz 0, 100(1)
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; CHECK-NEXT: addi 1, 1, 96
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; CHECK-NEXT: mtlr 0
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; CHECK-NEXT: blr
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%2 = tail call fast ppc_fp128 @llvm.minnum.ppcf128(ppc_fp128 %0, ppc_fp128 0xM3FF00000000000000000000000000000)
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