forked from OSchip/llvm-project
[AVX512] Add support for lowering to 512-bit SHUFPS.
llvm-svn: 275011
This commit is contained in:
parent
1b79e9a5b9
commit
0b0954570a
|
|
@ -11821,11 +11821,15 @@ static SDValue lowerV16F32VectorShuffle(SDLoc DL, ArrayRef<int> Mask,
|
|||
if (V2.isUndef())
|
||||
return DAG.getNode(X86ISD::VPERMILPI, DL, MVT::v16f32, V1,
|
||||
getV4X86ShuffleImm8ForMask(RepeatedMask, DL, DAG));
|
||||
}
|
||||
|
||||
if (SDValue Unpck =
|
||||
lowerVectorShuffleWithUNPCK(DL, MVT::v16f32, Mask, V1, V2, DAG))
|
||||
return Unpck;
|
||||
// Use dedicated unpack instructions for masks that match their pattern.
|
||||
if (SDValue Unpck =
|
||||
lowerVectorShuffleWithUNPCK(DL, MVT::v16f32, Mask, V1, V2, DAG))
|
||||
return Unpck;
|
||||
|
||||
// Otherwise, fall back to a SHUFPS sequence.
|
||||
return lowerVectorShuffleWithSHUFPS(DL, MVT::v16f32, RepeatedMask, V1, V2, DAG);
|
||||
}
|
||||
|
||||
return lowerVectorShuffleWithPERMV(DL, MVT::v16f32, Mask, V1, V2, DAG);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -121,8 +121,8 @@ define <16 x float> @test5(<16 x float> %A, <16 x float> %B) {
|
|||
; AVX512: # BB#0:
|
||||
; AVX512-NEXT: vaddps %zmm1, %zmm0, %zmm2
|
||||
; AVX512-NEXT: vsubps %zmm1, %zmm0, %zmm0
|
||||
; AVX512-NEXT: vmovdqa32 {{.*#+}} zmm1 = [0,17,2,19,4,21,6,23,8,25,10,27,12,29,14,31]
|
||||
; AVX512-NEXT: vpermt2ps %zmm2, %zmm1, %zmm0
|
||||
; AVX512-NEXT: vshufps {{.*#+}} zmm0 = zmm0[0,2],zmm2[1,3],zmm0[4,6],zmm2[5,7],zmm0[8,10],zmm2[9,11],zmm0[12,14],zmm2[13,15]
|
||||
; AVX512-NEXT: vpermilps {{.*#+}} zmm0 = zmm0[0,2,1,3,4,6,5,7,8,10,9,11,12,14,13,15]
|
||||
; AVX512-NEXT: retq
|
||||
%add = fadd <16 x float> %A, %B
|
||||
%sub = fsub <16 x float> %A, %B
|
||||
|
|
|
|||
|
|
@ -288,3 +288,12 @@ define <16 x i32> @shuffle_v16i16_3_3_0_0_7_7_4_4_11_11_8_8_15_15_12_12(<16 x i3
|
|||
%c = shufflevector <16 x i32> %a, <16 x i32> %b, <16 x i32> <i32 2, i32 3, i32 0, i32 1, i32 6, i32 7, i32 4, i32 5, i32 10, i32 11, i32 8, i32 9, i32 14, i32 15, i32 12, i32 13>
|
||||
ret <16 x i32> %c
|
||||
}
|
||||
|
||||
define <16 x float> @shuffle_v16f32_00_01_10_10_04_05_14_14_08_09_18_18_0c_0d_1c_1c(<16 x float> %a, <16 x float> %b) {
|
||||
; ALL-LABEL: shuffle_v16f32_00_01_10_10_04_05_14_14_08_09_18_18_0c_0d_1c_1c:
|
||||
; ALL: # BB#0:
|
||||
; ALL-NEXT: vshufps {{.*#+}} zmm0 = zmm0[0,1],zmm1[0,0],zmm0[4,5],zmm1[4,4],zmm0[8,9],zmm1[8,8],zmm0[12,13],zmm1[12,12]
|
||||
; ALL-NEXT: retq
|
||||
%shuffle = shufflevector <16 x float> %a, <16 x float> %b, <16 x i32> <i32 0, i32 1, i32 16, i32 16, i32 4, i32 5, i32 20, i32 20, i32 8, i32 9, i32 24, i32 24, i32 12, i32 13, i32 28, i32 28>
|
||||
ret <16 x float> %shuffle
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue