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[X86][SSE] Pull out OR(AND(~MASK,X),AND(MASK,Y)) matching into a helper function. NFC. 

First stage towards matching more variants of the bitselect pattern for combineLogicBlendIntoPBLENDV (PR37549)

llvm-svn: 333191
This commit is contained in:
Simon Pilgrim 2018-05-24 15:12:48 +00:00
parent a90c211820
commit 0c72316a21
1 changed files with 34 additions and 19 deletions
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53
llvm/lib/Target/X86/X86ISelLowering.cpp
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@ -34242,6 +34242,38 @@ static SDValue combineAnd(SDNode *N, SelectionDAG &DAG,
return SDValue(); return SDValue();
} }
// Try to match OR(AND(~MASK,X),AND(MASK,Y)) logic pattern.
static bool matchLogicBlend(SDNode *N, SDValue &X, SDValue &Y, SDValue &Mask) {
if (N->getOpcode() != ISD::OR)
return false;
SDValue N0 = N->getOperand(0);
SDValue N1 = N->getOperand(1);
// Canonicalize AND to LHS.
if (N1.getOpcode() == ISD::AND)
std::swap(N0, N1);
// Attempt to match OR(AND(M,Y),ANDNP(M,X)).
if (N0.getOpcode() != ISD::AND || N1.getOpcode() != X86ISD::ANDNP)
return false;
Mask = N1.getOperand(0);
X = N1.getOperand(1);
// Check to see if the mask appeared in both the AND and ANDNP.
if (N0.getOperand(0) == Mask)
Y = N0.getOperand(1);
else if (N0.getOperand(1) == Mask)
Y = N0.getOperand(0);
else
return false;
// TODO: Attempt to match against AND(XOR(-1,M),Y) as well, waiting for
// ANDNP combine allows other combines to happen that prevent matching.
return true;
}
// Try to fold: // Try to fold:
// (or (and (m, y), (pandn m, x))) // (or (and (m, y), (pandn m, x)))
// into: // into:
@ -34262,25 +34294,8 @@ static SDValue combineLogicBlendIntoPBLENDV(SDNode *N, SelectionDAG &DAG,
(VT.is256BitVector() && Subtarget.hasInt256()))) (VT.is256BitVector() && Subtarget.hasInt256())))
return SDValue(); return SDValue();
// Canonicalize AND to LHS. SDValue X, Y, Mask;
if (N1.getOpcode() == ISD::AND) if (!matchLogicBlend(N, X, Y, Mask))
std::swap(N0, N1);
// TODO: Attempt to match against AND(XOR(-1,X),Y) as well, waiting for
// ANDNP combine allows other combines to happen that prevent matching.
if (N0.getOpcode() != ISD::AND || N1.getOpcode() != X86ISD::ANDNP)
return SDValue();
SDValue Mask = N1.getOperand(0);
SDValue X = N1.getOperand(1);
SDValue Y;
if (N0.getOperand(0) == Mask)
Y = N0.getOperand(1);
if (N0.getOperand(1) == Mask)
Y = N0.getOperand(0);
// Check to see if the mask appeared in both the AND and ANDNP.
if (!Y.getNode())
return SDValue(); return SDValue();
// Validate that X, Y, and Mask are bitcasts, and see through them. // Validate that X, Y, and Mask are bitcasts, and see through them.