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ARM "l" constraint for inline asm means R0-R7, also for Thumb2. 

This is consistent with llvm-gcc's arm/constraints.md.

Certain instructions (e.g. CBZ, CBNZ) require a low register, even in Thumb2
mode.

llvm-svn: 93436
This commit is contained in:
Jakob Stoklund Olesen 2010-01-14 18:19:56 +00:00
parent 04b1152aac
commit 0ca14e4498
1 changed files with 2 additions and 2 deletions
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4
llvm/lib/Target/ARM/ARMISelLowering.cpp
View File

@ -4258,10 +4258,10 @@ std::pair<unsigned, const TargetRegisterClass*>
ARMTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint, ARMTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
EVT VT) const { EVT VT) const {
if (Constraint.size() == 1) { if (Constraint.size() == 1) {
// GCC RS6000 Constraint Letters // GCC ARM Constraint Letters
switch (Constraint[0]) { switch (Constraint[0]) {
case 'l': case 'l':
if (Subtarget->isThumb1Only()) if (Subtarget->isThumb())
return std::make_pair(0U, ARM::tGPRRegisterClass); return std::make_pair(0U, ARM::tGPRRegisterClass);
else else
return std::make_pair(0U, ARM::GPRRegisterClass); return std::make_pair(0U, ARM::GPRRegisterClass);