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Minor code cleanups 

llvm-svn: 4814
This commit is contained in:
Chris Lattner 2002-11-21 21:04:50 +00:00
parent 4fbd8a2f78
commit 1c80d37765
1 changed files with 1 additions and 2 deletions
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3
llvm/lib/Target/X86/Printer.cpp
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@ -295,7 +295,6 @@ void X86InstrInfo::print(const MachineInstr *MI, std::ostream &O,
const MachineInstrDescriptor &Desc = get(Opcode); const MachineInstrDescriptor &Desc = get(Opcode);
// Print instruction prefixes if neccesary // Print instruction prefixes if neccesary
if (Desc.TSFlags & X86II::OpSize) O << "66 "; // Operand size... if (Desc.TSFlags & X86II::OpSize) O << "66 "; // Operand size...
if (Desc.TSFlags & X86II::TB) O << "0F "; // Two-byte opcode prefix if (Desc.TSFlags & X86II::TB) O << "0F "; // Two-byte opcode prefix
@ -304,6 +303,7 @@ void X86InstrInfo::print(const MachineInstr *MI, std::ostream &O,
O << "\t\t\t"; O << "\t\t\t";
O << "-"; MI->print(O, TM); O << "-"; MI->print(O, TM);
break; break;
case X86II::RawFrm: case X86II::RawFrm:
toHex(O, getBaseOpcodeFor(Opcode)); toHex(O, getBaseOpcodeFor(Opcode));
O << "\n\t\t\t\t"; O << "\n\t\t\t\t";
@ -316,7 +316,6 @@ void X86InstrInfo::print(const MachineInstr *MI, std::ostream &O,
O << "\n"; O << "\n";
return; return;
case X86II::AddRegFrm: { case X86II::AddRegFrm: {
// There are currently two forms of acceptable AddRegFrm instructions. // There are currently two forms of acceptable AddRegFrm instructions.
// Either the instruction JUST takes a single register (like inc, dec, etc), // Either the instruction JUST takes a single register (like inc, dec, etc),