forked from OSchip/llvm-project
				
			Fix lowering of INSERT_VECTOR_ELT in SPU.
The IDX was treated as byte index, not element index. llvm-svn: 112422
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			@ -2053,20 +2053,21 @@ static SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) {
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  SDValue IdxOp = Op.getOperand(2);
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  DebugLoc dl = Op.getDebugLoc();
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  EVT VT = Op.getValueType();
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  EVT eltVT = ValOp.getValueType();
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  // use 0 when the lane to insert to is 'undef'
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  int64_t Idx=0;
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  int64_t Offset=0;
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  if (IdxOp.getOpcode() != ISD::UNDEF) {
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    ConstantSDNode *CN = cast<ConstantSDNode>(IdxOp);
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    assert(CN != 0 && "LowerINSERT_VECTOR_ELT: Index is not constant!");
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    Idx = (CN->getSExtValue());
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    Offset = (CN->getSExtValue()) * eltVT.getSizeInBits()/8;
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  }
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  EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
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  // Use $sp ($1) because it's always 16-byte aligned and it's available:
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  SDValue Pointer = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT,
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                                DAG.getRegister(SPU::R1, PtrVT),
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                                DAG.getConstant(Idx, PtrVT));
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                                DAG.getConstant(Offset, PtrVT));
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  // widen the mask when dealing with half vectors
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  EVT maskVT = EVT::getVectorVT(*(DAG.getContext()), VT.getVectorElementType(), 
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                                128/ VT.getVectorElementType().getSizeInBits());
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			@ -31,3 +31,11 @@ define void @test_insert( <2 x float>* %ptr, float %val1, float %val2 ) {
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  ret void 
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}
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define <4 x float>  @test_insert_1(<4 x float> %vparam, float %eltparam) {
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;CHECK: cwd     $5, 4($sp)
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;CHECK: shufb   $3, $4, $3, $5
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;CHECK: bi      $lr
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  %rv = insertelement <4 x float> %vparam, float %eltparam, i32 1
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  ret <4 x float> %rv
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}
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