From 1fae19555797cad0af7db788a30dd4cc2bc63f6c Mon Sep 17 00:00:00 2001 From: David Majnemer Date: Sun, 14 Apr 2013 21:15:43 +0000 Subject: [PATCH] Reorders two transforms that collide with each other One performs: (X == 13 | X == 14) -> X-13 (A & ~(C1 ^ C2)) == C1 The problem is that there are certain values of C1 and C2 that trigger both transforms but the first one blocks out the second, this generates suboptimal code. Reordering the transforms should be better in every case and allows us to do interesting stuff like turn: %shr = lshr i32 %X, 4 %and = and i32 %shr, 15 %add = add i32 %and, -14 %tobool = icmp ne i32 %add, 0 into: %and = and i32 %X, 240 %tobool = icmp ne i32 %and, 224 llvm-svn: 179493 --- .../InstCombine/InstCombineAndOrXor.cpp | 16 ++++++++-------- llvm/test/Transforms/InstCombine/icmp.ll | 12 ++++++++++++ llvm/test/Transforms/InstCombine/load-cmp.ll | 4 ++-- llvm/test/Transforms/InstCombine/or.ll | 6 +++--- 4 files changed, 25 insertions(+), 13 deletions(-) diff --git a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp index a7f01494874b..ec75dd2e0425 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp @@ -1547,14 +1547,6 @@ Value *InstCombiner::FoldOrOfICmps(ICmpInst *LHS, ICmpInst *RHS) { switch (RHSCC) { default: llvm_unreachable("Unknown integer condition code!"); case ICmpInst::ICMP_EQ: - if (LHSCst == SubOne(RHSCst)) { - // (X == 13 | X == 14) -> X-13 CreateAdd(Val, AddCST, Val->getName()+".off"); - AddCST = ConstantExpr::getSub(AddOne(RHSCst), LHSCst); - return Builder->CreateICmpULT(Add, AddCST); - } - if (LHS->getOperand(0) == RHS->getOperand(0)) { // if LHSCst and RHSCst differ only by one bit: // (A == C1 || A == C2) -> (A & ~(C1 ^ C2)) == C1 @@ -1568,6 +1560,14 @@ Value *InstCombiner::FoldOrOfICmps(ICmpInst *LHS, ICmpInst *RHS) { } } + if (LHSCst == SubOne(RHSCst)) { + // (X == 13 | X == 14) -> X-13 CreateAdd(Val, AddCST, Val->getName()+".off"); + AddCST = ConstantExpr::getSub(AddOne(RHSCst), LHSCst); + return Builder->CreateICmpULT(Add, AddCST); + } + break; // (X == 13 | X == 15) -> no change case ICmpInst::ICMP_UGT: // (X == 13 | X u> 14) -> no change case ICmpInst::ICMP_SGT: // (X == 13 | X s> 14) -> no change diff --git a/llvm/test/Transforms/InstCombine/icmp.ll b/llvm/test/Transforms/InstCombine/icmp.ll index 74adbba42b48..c912a576c3d2 100644 --- a/llvm/test/Transforms/InstCombine/icmp.ll +++ b/llvm/test/Transforms/InstCombine/icmp.ll @@ -964,3 +964,15 @@ define i1 @icmp_and_shl_neg_eq_0(i32 %A, i32 %B) { %cmp = icmp eq i32 %and, 0 ret i1 %cmp } + +; CHECK: @icmp_add_and_shr_ne_0 +; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %X, 240 +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ne i32 [[AND]], 224 +; CHECK-NEXT: ret i1 [[CMP]] +define i1 @icmp_add_and_shr_ne_0(i32 %X) { + %shr = lshr i32 %X, 4 + %and = and i32 %shr, 15 + %add = add i32 %and, -14 + %tobool = icmp ne i32 %add, 0 + ret i1 %tobool +} diff --git a/llvm/test/Transforms/InstCombine/load-cmp.ll b/llvm/test/Transforms/InstCombine/load-cmp.ll index d88188e4109c..869215cb58d4 100644 --- a/llvm/test/Transforms/InstCombine/load-cmp.ll +++ b/llvm/test/Transforms/InstCombine/load-cmp.ll @@ -100,8 +100,8 @@ define i1 @test8(i32 %X) { %S = icmp eq i16 %R, 0 ret i1 %S ; CHECK: @test8 -; CHECK-NEXT: add i32 %X, -8 -; CHECK-NEXT: icmp ult i32 {{.*}}, 2 +; CHECK-NEXT: and i32 %X, -2 +; CHECK-NEXT: icmp eq i32 {{.*}}, 8 ; CHECK-NEXT: ret i1 } diff --git a/llvm/test/Transforms/InstCombine/or.ll b/llvm/test/Transforms/InstCombine/or.ll index bde2a54048ad..7226bd93996f 100644 --- a/llvm/test/Transforms/InstCombine/or.ll +++ b/llvm/test/Transforms/InstCombine/or.ll @@ -178,12 +178,12 @@ define i1 @test18(i32 %A) { define i1 @test19(i32 %A) { %B = icmp eq i32 %A, 50 %C = icmp eq i32 %A, 51 - ;; (A-50) < 2 + ;; (A&-2) == 50 %D = or i1 %B, %C ret i1 %D ; CHECK: @test19 -; CHECK: add i32 -; CHECK: icmp ult +; CHECK: and i32 +; CHECK: icmp eq ; CHECK: ret i1 }