From 265328baf6a86fc0d16e303f9969cde03cfa90d7 Mon Sep 17 00:00:00 2001 From: Bill Wendling Date: Tue, 11 Oct 2011 21:40:47 +0000 Subject: [PATCH] Revert r141529. This is causing failures in the test-suite, like bigstack and ReedSolomon. Boo... llvm-svn: 141716 --- llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp | 13 ++----------- llvm/test/CodeGen/Thumb/vargs.ll | 2 +- 2 files changed, 3 insertions(+), 12 deletions(-) diff --git a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp index 0c8480d9ef22..7c42342229a2 100644 --- a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp @@ -1109,20 +1109,11 @@ bool ARMBaseRegisterInfo::isFrameOffsetLegal(const MachineInstr *MI, case ARMII::AddrMode3: NumBits = 8; break; - case ARMII::AddrModeT1_s: { - const MachineBasicBlock &MBB = *MI->getParent(); - const MachineFunction &MF = *MBB.getParent(); - unsigned FrameReg = ARM::SP; - if (MF.getFrameInfo()->hasVarSizedObjects()) - // There are alloca()'s in this function, must reference off the frame - // pointer or base pointer instead. - FrameReg = (!hasBasePointer(MF) ?BasePtr : getFrameRegister(MF)); - - NumBits = (FrameReg == ARM::SP) ? 8 : 5; + case ARMII::AddrModeT1_s: + NumBits = 5; Scale = 4; isSigned = false; break; - } default: llvm_unreachable("Unsupported addressing mode!"); break; diff --git a/llvm/test/CodeGen/Thumb/vargs.ll b/llvm/test/CodeGen/Thumb/vargs.ll index 16a9c4442d8a..c2ba208e4ae2 100644 --- a/llvm/test/CodeGen/Thumb/vargs.ll +++ b/llvm/test/CodeGen/Thumb/vargs.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -march=thumb -; RUN: llc < %s -mtriple=thumb-linux | grep pop | count 1 +; RUN: llc < %s -mtriple=thumb-linux | grep pop | count 2 ; RUN: llc < %s -mtriple=thumb-darwin | grep pop | count 2 @str = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]