forked from OSchip/llvm-project
				
			[FastISel][X86] Only fold the cmp into the select when both instructions are in the same basic block.
If the cmp is in a different basic block, then it is possible that not all operands of that compare have defined registers. This can happen when one of the operands to the cmp is a load and the load gets folded into the cmp. In this case FastISel will skip the load instruction and the vreg is never defined. llvm-svn: 211730
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			@ -1754,8 +1754,11 @@ bool X86FastISel::X86FastEmitCMoveSelect(const Instruction *I) {
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  const TargetRegisterClass *RC = TLI.getRegClassFor(RetVT);
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  bool NeedTest = true;
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  // Optimize conditons coming from a compare.
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  if (const auto *CI = dyn_cast<CmpInst>(Cond)) {
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  // Optimize conditons coming from a compare if both instructions are in the
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  // same basic block (values defined in other basic blocks may not have
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  // initialized registers).
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  const auto *CI = dyn_cast<CmpInst>(Cond);
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  if (CI && (CI->getParent() == I->getParent())) {
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    CmpInst::Predicate Predicate = optimizeCmpPredicate(CI);
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    // FCMP_OEQ and FCMP_UNE cannot be checked with a single instruction.
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			@ -1927,8 +1930,11 @@ bool X86FastISel::X86FastEmitSSESelect(const Instruction *I) {
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  if (!isTypeLegal(I->getType(), RetVT))
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    return false;
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  // Optimize conditons coming from a compare if both instructions are in the
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  // same basic block (values defined in other basic blocks may not have
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  // initialized registers).
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  const auto *CI = dyn_cast<FCmpInst>(I->getOperand(0));
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  if (!CI)
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  if (!CI || (CI->getParent() != I->getParent()))
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    return false;
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  if (I->getType() != CI->getOperand(0)->getType() ||
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			@ -2023,8 +2029,12 @@ bool X86FastISel::X86FastEmitPseudoSelect(const Instruction *I) {
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  const Value *Cond = I->getOperand(0);
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  X86::CondCode CC = X86::COND_NE;
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  // Don't emit a test if the condition comes from a compare.
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  if (const auto *CI = dyn_cast<CmpInst>(Cond)) {
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  // Optimize conditons coming from a compare if both instructions are in the
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  // same basic block (values defined in other basic blocks may not have
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  // initialized registers).
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  const auto *CI = dyn_cast<CmpInst>(Cond);
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  if (CI && (CI->getParent() == I->getParent())) {
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    bool NeedSwap;
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    std::tie(CC, NeedSwap) = getX86ConditonCode(CI->getPredicate());
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    if (CC > X86::LAST_VALID_COND)
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			@ -0,0 +1,50 @@
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; RUN: llc < %s -O0 -mtriple=x86_64-apple-darwin10 | FileCheck %s
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; Test if we do not fold the cmp into select if the instructions are in
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; different basic blocks.
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define i32 @select_cmp_cmov_i32(i32 %a, i32 %b) {
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; CHECK-LABEL: select_cmp_cmov_i32
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; CHECK-LABEL: continue
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; CHECK-NOT:   cmp
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  %1 = icmp ult i32 %a, %b
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  br i1 %1, label %continue, label %exit
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continue:
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  %2 = select i1 %1, i32 %a, i32 %b
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  ret i32 %2
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exit:
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  ret i32 -1
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}
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define float @select_fcmp_oeq_f32(float %a, float %b, float %c, float %d) {
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; CHECK-LABEL: select_fcmp_oeq_f32
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; CHECK-LABEL: continue
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; CHECK-NOT:   cmp
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  %1 = fcmp oeq float %a, %b
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  br i1 %1, label %continue, label %exit
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continue:
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  %2 = select i1 %1, float %c, float %d
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  ret float %2
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exit:
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  ret float -1.0
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}
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define float @select_fcmp_one_f32(float %a, float %b, float %c, float %d) {
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; CHECK-LABEL: select_fcmp_one_f32
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; CHECK-LABEL: continue
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; CHECK-NOT:   ucomi
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  %1 = fcmp one float %a, %b
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  br i1 %1, label %continue, label %exit
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continue:
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  %2 = select i1 %1, float %c, float %d
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  ret float %2
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exit:
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  ret float -1.0
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}
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