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AMDGPU: Support folding FrameIndex operands 

This avoids test regressions in a future commit.

llvm-svn: 281491
This commit is contained in:
Matt Arsenault 2016-09-14 15:51:33 +00:00
parent 5f6bb6cd24
commit 2bc198a333
2 changed files with 28 additions and 13 deletions
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35
llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
View File

@ -48,24 +48,36 @@ public:
struct FoldCandidate { struct FoldCandidate {
MachineInstr *UseMI; MachineInstr *UseMI;
unsigned UseOpNo; union {
MachineOperand *OpToFold; MachineOperand *OpToFold;
uint64_t ImmToFold; uint64_t ImmToFold;
int FrameIndexToFold;
};
unsigned char UseOpNo;
MachineOperand::MachineOperandType Kind;
FoldCandidate(MachineInstr *MI, unsigned OpNo, MachineOperand *FoldOp) : FoldCandidate(MachineInstr *MI, unsigned OpNo, MachineOperand *FoldOp) :
UseMI(MI), UseOpNo(OpNo) { UseMI(MI), OpToFold(nullptr), UseOpNo(OpNo), Kind(FoldOp->getType()) {
if (FoldOp->isImm()) { if (FoldOp->isImm()) {
OpToFold = nullptr;
ImmToFold = FoldOp->getImm(); ImmToFold = FoldOp->getImm();
} else if (FoldOp->isFI()) {
FrameIndexToFold = FoldOp->getIndex();
} else { } else {
assert(FoldOp->isReg()); assert(FoldOp->isReg());
OpToFold = FoldOp; OpToFold = FoldOp;
} }
} }
bool isFI() const {
return Kind == MachineOperand::MO_FrameIndex;
}
bool isImm() const { bool isImm() const {
return !OpToFold; return Kind == MachineOperand::MO_Immediate;
}
bool isReg() const {
return Kind == MachineOperand::MO_Register;
} }
}; };
@ -107,6 +119,11 @@ static bool updateOperand(FoldCandidate &Fold,
return true; return true;
} }
if (Fold.isFI()) {
Old.ChangeToFrameIndex(Fold.FrameIndexToFold);
return true;
}
MachineOperand *New = Fold.OpToFold; MachineOperand *New = Fold.OpToFold;
if (TargetRegisterInfo::isVirtualRegister(Old.getReg()) && if (TargetRegisterInfo::isVirtualRegister(Old.getReg()) &&
TargetRegisterInfo::isVirtualRegister(New->getReg())) { TargetRegisterInfo::isVirtualRegister(New->getReg())) {
@ -448,7 +465,7 @@ bool SIFoldOperands::runOnMachineFunction(MachineFunction &MF) {
unsigned OpSize = TII->getOpSize(MI, 1); unsigned OpSize = TII->getOpSize(MI, 1);
MachineOperand &OpToFold = MI.getOperand(1); MachineOperand &OpToFold = MI.getOperand(1);
bool FoldingImm = OpToFold.isImm(); bool FoldingImm = OpToFold.isImm() || OpToFold.isFI();
// FIXME: We could also be folding things like FrameIndexes and // FIXME: We could also be folding things like FrameIndexes and
// TargetIndexes. // TargetIndexes.
@ -500,7 +517,7 @@ bool SIFoldOperands::runOnMachineFunction(MachineFunction &MF) {
for (FoldCandidate &Fold : FoldList) { for (FoldCandidate &Fold : FoldList) {
if (updateOperand(Fold, TRI)) { if (updateOperand(Fold, TRI)) {
// Clear kill flags. // Clear kill flags.
if (!Fold.isImm()) { if (Fold.isReg()) {
assert(Fold.OpToFold && Fold.OpToFold->isReg()); assert(Fold.OpToFold && Fold.OpToFold->isReg());
// FIXME: Probably shouldn't bother trying to fold if not an // FIXME: Probably shouldn't bother trying to fold if not an
// SGPR. PeepholeOptimizer can eliminate redundant VGPR->VGPR // SGPR. PeepholeOptimizer can eliminate redundant VGPR->VGPR

6
llvm/test/CodeGen/AMDGPU/local-stack-slot-bug.ll
View File

@ -7,10 +7,8 @@
; ;
; CHECK-LABEL: {{^}}main: ; CHECK-LABEL: {{^}}main:
; CHECK: v_lshlrev_b32_e32 [[BYTES:v[0-9]+]], 2, v0 ; CHECK: v_lshlrev_b32_e32 [[BYTES:v[0-9]+]], 2, v0
; CHECK: v_mov_b32_e32 [[HI_CONST:v[0-9]+]], 0x200 ; CHECK: v_add_i32_e32 [[HI_OFF:v[0-9]+]], vcc, 0x200, [[BYTES]]
; CHECK: v_mov_b32_e32 [[LO_CONST:v[0-9]+]], 0 ; CHECK: v_add_i32_e32 [[LO_OFF:v[0-9]+]], vcc, 0, [[BYTES]]
; CHECK: v_add_i32_e32 [[HI_OFF:v[0-9]+]], vcc, [[BYTES]], [[HI_CONST]]
; CHECK: v_add_i32_e32 [[LO_OFF:v[0-9]+]], vcc, [[BYTES]], [[LO_CONST]]
; CHECK: buffer_load_dword {{v[0-9]+}}, [[LO_OFF]], {{s\[[0-9]+:[0-9]+\]}}, {{s[0-9]+}} offen ; CHECK: buffer_load_dword {{v[0-9]+}}, [[LO_OFF]], {{s\[[0-9]+:[0-9]+\]}}, {{s[0-9]+}} offen
; CHECK: buffer_load_dword {{v[0-9]+}}, [[HI_OFF]], {{s\[[0-9]+:[0-9]+\]}}, {{s[0-9]+}} offen ; CHECK: buffer_load_dword {{v[0-9]+}}, [[HI_OFF]], {{s\[[0-9]+:[0-9]+\]}}, {{s[0-9]+}} offen
define amdgpu_ps float @main(i32 %idx) { define amdgpu_ps float @main(i32 %idx) {