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[CostModel][X86] Declare costs variables based on type 

The alphabetical progression isn't that useful

llvm-svn: 305808
This commit is contained in:
Simon Pilgrim 2017-06-20 17:04:46 +00:00
parent 2a053a9f9d
commit 36c17935e4
1 changed files with 452 additions and 452 deletions
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904
llvm/test/Analysis/CostModel/X86/arith.ll
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@ -11,506 +11,506 @@ target triple = "x86_64-apple-macosx10.8.0"
; CHECK-LABEL: 'add' ; CHECK-LABEL: 'add'
define i32 @add(i32 %arg) { define i32 @add(i32 %arg) {
; SSSE3: cost of 1 {{.*}} %A = add ; SSSE3: cost of 1 {{.*}} %V2I64 = add
; SSE42: cost of 1 {{.*}} %A = add ; SSE42: cost of 1 {{.*}} %V2I64 = add
; AVX: cost of 1 {{.*}} %A = add ; AVX: cost of 1 {{.*}} %V2I64 = add
; AVX2: cost of 1 {{.*}} %A = add ; AVX2: cost of 1 {{.*}} %V2I64 = add
; AVX512: cost of 1 {{.*}} %A = add ; AVX512: cost of 1 {{.*}} %V2I64 = add
%A = add <2 x i64> undef, undef %V2I64 = add <2 x i64> undef, undef
; SSSE3: cost of 2 {{.*}} %B = add ; SSSE3: cost of 2 {{.*}} %V4I64 = add
; SSE42: cost of 2 {{.*}} %B = add ; SSE42: cost of 2 {{.*}} %V4I64 = add
; AVX: cost of 4 {{.*}} %B = add ; AVX: cost of 4 {{.*}} %V4I64 = add
; AVX2: cost of 1 {{.*}} %B = add ; AVX2: cost of 1 {{.*}} %V4I64 = add
; AVX512: cost of 1 {{.*}} %B = add ; AVX512: cost of 1 {{.*}} %V4I64 = add
%B = add <4 x i64> undef, undef %V4I64 = add <4 x i64> undef, undef
; SSSE3: cost of 4 {{.*}} %C = add ; SSSE3: cost of 4 {{.*}} %V8I64 = add
; SSE42: cost of 4 {{.*}} %C = add ; SSE42: cost of 4 {{.*}} %V8I64 = add
; AVX: cost of 8 {{.*}} %C = add ; AVX: cost of 8 {{.*}} %V8I64 = add
; AVX2: cost of 2 {{.*}} %C = add ; AVX2: cost of 2 {{.*}} %V8I64 = add
; AVX512: cost of 1 {{.*}} %C = add ; AVX512: cost of 1 {{.*}} %V8I64 = add
%C = add <8 x i64> undef, undef %V8I64 = add <8 x i64> undef, undef
; SSSE3: cost of 1 {{.*}} %D = add ; SSSE3: cost of 1 {{.*}} %V4I32 = add
; SSE42: cost of 1 {{.*}} %D = add ; SSE42: cost of 1 {{.*}} %V4I32 = add
; AVX: cost of 1 {{.*}} %D = add ; AVX: cost of 1 {{.*}} %V4I32 = add
; AVX2: cost of 1 {{.*}} %D = add ; AVX2: cost of 1 {{.*}} %V4I32 = add
; AVX512: cost of 1 {{.*}} %D = add ; AVX512: cost of 1 {{.*}} %V4I32 = add
%D = add <4 x i32> undef, undef %V4I32 = add <4 x i32> undef, undef
; SSSE3: cost of 2 {{.*}} %E = add ; SSSE3: cost of 2 {{.*}} %V8I32 = add
; SSE42: cost of 2 {{.*}} %E = add ; SSE42: cost of 2 {{.*}} %V8I32 = add
; AVX: cost of 4 {{.*}} %E = add ; AVX: cost of 4 {{.*}} %V8I32 = add
; AVX2: cost of 1 {{.*}} %E = add ; AVX2: cost of 1 {{.*}} %V8I32 = add
; AVX512: cost of 1 {{.*}} %E = add ; AVX512: cost of 1 {{.*}} %V8I32 = add
%E = add <8 x i32> undef, undef %V8I32 = add <8 x i32> undef, undef
; SSSE3: cost of 4 {{.*}} %F = add ; SSSE3: cost of 4 {{.*}} %V16I32 = add
; SSE42: cost of 4 {{.*}} %F = add ; SSE42: cost of 4 {{.*}} %V16I32 = add
; AVX: cost of 8 {{.*}} %F = add ; AVX: cost of 8 {{.*}} %V16I32 = add
; AVX2: cost of 2 {{.*}} %F = add ; AVX2: cost of 2 {{.*}} %V16I32 = add
; AVX512: cost of 1 {{.*}} %F = add ; AVX512: cost of 1 {{.*}} %V16I32 = add
%F = add <16 x i32> undef, undef %V16I32 = add <16 x i32> undef, undef
; SSSE3: cost of 1 {{.*}} %G = add ; SSSE3: cost of 1 {{.*}} %V8I16 = add
; SSE42: cost of 1 {{.*}} %G = add ; SSE42: cost of 1 {{.*}} %V8I16 = add
; AVX: cost of 1 {{.*}} %G = add ; AVX: cost of 1 {{.*}} %V8I16 = add
; AVX2: cost of 1 {{.*}} %G = add ; AVX2: cost of 1 {{.*}} %V8I16 = add
; AVX512: cost of 1 {{.*}} %G = add ; AVX512: cost of 1 {{.*}} %V8I16 = add
%G = add <8 x i16> undef, undef %V8I16 = add <8 x i16> undef, undef
; SSSE3: cost of 2 {{.*}} %H = add ; SSSE3: cost of 2 {{.*}} %V16I16 = add
; SSE42: cost of 2 {{.*}} %H = add ; SSE42: cost of 2 {{.*}} %V16I16 = add
; AVX: cost of 4 {{.*}} %H = add ; AVX: cost of 4 {{.*}} %V16I16 = add
; AVX2: cost of 1 {{.*}} %H = add ; AVX2: cost of 1 {{.*}} %V16I16 = add
; AVX512: cost of 1 {{.*}} %H = add ; AVX512: cost of 1 {{.*}} %V16I16 = add
%H = add <16 x i16> undef, undef %V16I16 = add <16 x i16> undef, undef
; SSSE3: cost of 4 {{.*}} %I = add ; SSSE3: cost of 4 {{.*}} %V32I16 = add
; SSE42: cost of 4 {{.*}} %I = add ; SSE42: cost of 4 {{.*}} %V32I16 = add
; AVX: cost of 8 {{.*}} %I = add ; AVX: cost of 8 {{.*}} %V32I16 = add
; AVX2: cost of 2 {{.*}} %I = add ; AVX2: cost of 2 {{.*}} %V32I16 = add
; AVX512F: cost of 2 {{.*}} %I = add ; AVX512F: cost of 2 {{.*}} %V32I16 = add
; AVX512BW: cost of 1 {{.*}} %I = add ; AVX512BW: cost of 1 {{.*}} %V32I16 = add
%I = add <32 x i16> undef, undef %V32I16 = add <32 x i16> undef, undef
; SSSE3: cost of 1 {{.*}} %J = add ; SSSE3: cost of 1 {{.*}} %V16I8 = add
; SSE42: cost of 1 {{.*}} %J = add ; SSE42: cost of 1 {{.*}} %V16I8 = add
; AVX: cost of 1 {{.*}} %J = add ; AVX: cost of 1 {{.*}} %V16I8 = add
; AVX2: cost of 1 {{.*}} %J = add ; AVX2: cost of 1 {{.*}} %V16I8 = add
; AVX512: cost of 1 {{.*}} %J = add ; AVX512: cost of 1 {{.*}} %V16I8 = add
%J = add <16 x i8> undef, undef %V16I8 = add <16 x i8> undef, undef
; SSSE3: cost of 2 {{.*}} %K = add ; SSSE3: cost of 2 {{.*}} %V32I8 = add
; SSE42: cost of 2 {{.*}} %K = add ; SSE42: cost of 2 {{.*}} %V32I8 = add
; AVX: cost of 4 {{.*}} %K = add ; AVX: cost of 4 {{.*}} %V32I8 = add
; AVX2: cost of 1 {{.*}} %K = add ; AVX2: cost of 1 {{.*}} %V32I8 = add
; AVX512: cost of 1 {{.*}} %K = add ; AVX512: cost of 1 {{.*}} %V32I8 = add
%K = add <32 x i8> undef, undef %V32I8 = add <32 x i8> undef, undef
; SSSE3: cost of 4 {{.*}} %L = add ; SSSE3: cost of 4 {{.*}} %V64I8 = add
; SSE42: cost of 4 {{.*}} %L = add ; SSE42: cost of 4 {{.*}} %V64I8 = add
; AVX: cost of 8 {{.*}} %L = add ; AVX: cost of 8 {{.*}} %V64I8 = add
; AVX2: cost of 2 {{.*}} %L = add ; AVX2: cost of 2 {{.*}} %V64I8 = add
; AVX512F: cost of 2 {{.*}} %L = add ; AVX512F: cost of 2 {{.*}} %V64I8 = add
; AVX512BW: cost of 1 {{.*}} %L = add ; AVX512BW: cost of 1 {{.*}} %V64I8 = add
%L = add <64 x i8> undef, undef %V64I8 = add <64 x i8> undef, undef
ret i32 undef ret i32 undef
} }
; CHECK-LABEL: 'sub' ; CHECK-LABEL: 'sub'
define i32 @sub(i32 %arg) { define i32 @sub(i32 %arg) {
; SSSE3: cost of 1 {{.*}} %A = sub ; SSSE3: cost of 1 {{.*}} %V2I64 = sub
; SSE42: cost of 1 {{.*}} %A = sub ; SSE42: cost of 1 {{.*}} %V2I64 = sub
; AVX: cost of 1 {{.*}} %A = sub ; AVX: cost of 1 {{.*}} %V2I64 = sub
; AVX2: cost of 1 {{.*}} %A = sub ; AVX2: cost of 1 {{.*}} %V2I64 = sub
; AVX512: cost of 1 {{.*}} %A = sub ; AVX512: cost of 1 {{.*}} %V2I64 = sub
%A = sub <2 x i64> undef, undef %V2I64 = sub <2 x i64> undef, undef
; SSSE3: cost of 2 {{.*}} %B = sub ; SSSE3: cost of 2 {{.*}} %V4I64 = sub
; SSE42: cost of 2 {{.*}} %B = sub ; SSE42: cost of 2 {{.*}} %V4I64 = sub
; AVX: cost of 4 {{.*}} %B = sub ; AVX: cost of 4 {{.*}} %V4I64 = sub
; AVX2: cost of 1 {{.*}} %B = sub ; AVX2: cost of 1 {{.*}} %V4I64 = sub
; AVX512: cost of 1 {{.*}} %B = sub ; AVX512: cost of 1 {{.*}} %V4I64 = sub
%B = sub <4 x i64> undef, undef %V4I64 = sub <4 x i64> undef, undef
; SSSE3: cost of 4 {{.*}} %C = sub ; SSSE3: cost of 4 {{.*}} %V8I64 = sub
; SSE42: cost of 4 {{.*}} %C = sub ; SSE42: cost of 4 {{.*}} %V8I64 = sub
; AVX: cost of 8 {{.*}} %C = sub ; AVX: cost of 8 {{.*}} %V8I64 = sub
; AVX2: cost of 2 {{.*}} %C = sub ; AVX2: cost of 2 {{.*}} %V8I64 = sub
; AVX512: cost of 1 {{.*}} %C = sub ; AVX512: cost of 1 {{.*}} %V8I64 = sub
%C = sub <8 x i64> undef, undef %V8I64 = sub <8 x i64> undef, undef
; SSSE3: cost of 1 {{.*}} %D = sub ; SSSE3: cost of 1 {{.*}} %V4I32 = sub
; SSE42: cost of 1 {{.*}} %D = sub ; SSE42: cost of 1 {{.*}} %V4I32 = sub
; AVX: cost of 1 {{.*}} %D = sub ; AVX: cost of 1 {{.*}} %V4I32 = sub
; AVX2: cost of 1 {{.*}} %D = sub ; AVX2: cost of 1 {{.*}} %V4I32 = sub
; AVX512: cost of 1 {{.*}} %D = sub ; AVX512: cost of 1 {{.*}} %V4I32 = sub
%D = sub <4 x i32> undef, undef %V4I32 = sub <4 x i32> undef, undef
; SSSE3: cost of 2 {{.*}} %E = sub ; SSSE3: cost of 2 {{.*}} %V8I32 = sub
; SSE42: cost of 2 {{.*}} %E = sub ; SSE42: cost of 2 {{.*}} %V8I32 = sub
; AVX: cost of 4 {{.*}} %E = sub ; AVX: cost of 4 {{.*}} %V8I32 = sub
; AVX2: cost of 1 {{.*}} %E = sub ; AVX2: cost of 1 {{.*}} %V8I32 = sub
; AVX512: cost of 1 {{.*}} %E = sub ; AVX512: cost of 1 {{.*}} %V8I32 = sub
%E = sub <8 x i32> undef, undef %V8I32 = sub <8 x i32> undef, undef
; SSSE3: cost of 4 {{.*}} %F = sub ; SSSE3: cost of 4 {{.*}} %V16I32 = sub
; SSE42: cost of 4 {{.*}} %F = sub ; SSE42: cost of 4 {{.*}} %V16I32 = sub
; AVX: cost of 8 {{.*}} %F = sub ; AVX: cost of 8 {{.*}} %V16I32 = sub
; AVX2: cost of 2 {{.*}} %F = sub ; AVX2: cost of 2 {{.*}} %V16I32 = sub
; AVX512: cost of 1 {{.*}} %F = sub ; AVX512: cost of 1 {{.*}} %V16I32 = sub
%F = sub <16 x i32> undef, undef %V16I32 = sub <16 x i32> undef, undef
; SSSE3: cost of 1 {{.*}} %G = sub ; SSSE3: cost of 1 {{.*}} %V8I16 = sub
; SSE42: cost of 1 {{.*}} %G = sub ; SSE42: cost of 1 {{.*}} %V8I16 = sub
; AVX: cost of 1 {{.*}} %G = sub ; AVX: cost of 1 {{.*}} %V8I16 = sub
; AVX2: cost of 1 {{.*}} %G = sub ; AVX2: cost of 1 {{.*}} %V8I16 = sub
; AVX512: cost of 1 {{.*}} %G = sub ; AVX512: cost of 1 {{.*}} %V8I16 = sub
%G = sub <8 x i16> undef, undef %V8I16 = sub <8 x i16> undef, undef
; SSSE3: cost of 2 {{.*}} %H = sub ; SSSE3: cost of 2 {{.*}} %V16I16 = sub
; SSE42: cost of 2 {{.*}} %H = sub ; SSE42: cost of 2 {{.*}} %V16I16 = sub
; AVX: cost of 4 {{.*}} %H = sub ; AVX: cost of 4 {{.*}} %V16I16 = sub
; AVX2: cost of 1 {{.*}} %H = sub ; AVX2: cost of 1 {{.*}} %V16I16 = sub
; AVX512: cost of 1 {{.*}} %H = sub ; AVX512: cost of 1 {{.*}} %V16I16 = sub
%H = sub <16 x i16> undef, undef %V16I16 = sub <16 x i16> undef, undef
; SSSE3: cost of 4 {{.*}} %I = sub ; SSSE3: cost of 4 {{.*}} %V32I16 = sub
; SSE42: cost of 4 {{.*}} %I = sub ; SSE42: cost of 4 {{.*}} %V32I16 = sub
; AVX: cost of 8 {{.*}} %I = sub ; AVX: cost of 8 {{.*}} %V32I16 = sub
; AVX2: cost of 2 {{.*}} %I = sub ; AVX2: cost of 2 {{.*}} %V32I16 = sub
; AVX512F: cost of 2 {{.*}} %I = sub ; AVX512F: cost of 2 {{.*}} %V32I16 = sub
; AVX512BW: cost of 1 {{.*}} %I = sub ; AVX512BW: cost of 1 {{.*}} %V32I16 = sub
%I = sub <32 x i16> undef, undef %V32I16 = sub <32 x i16> undef, undef
; SSSE3: cost of 1 {{.*}} %J = sub ; SSSE3: cost of 1 {{.*}} %V16I8 = sub
; SSE42: cost of 1 {{.*}} %J = sub ; SSE42: cost of 1 {{.*}} %V16I8 = sub
; AVX: cost of 1 {{.*}} %J = sub ; AVX: cost of 1 {{.*}} %V16I8 = sub
; AVX2: cost of 1 {{.*}} %J = sub ; AVX2: cost of 1 {{.*}} %V16I8 = sub
; AVX512: cost of 1 {{.*}} %J = sub ; AVX512: cost of 1 {{.*}} %V16I8 = sub
%J = sub <16 x i8> undef, undef %V16I8 = sub <16 x i8> undef, undef
; SSSE3: cost of 2 {{.*}} %K = sub ; SSSE3: cost of 2 {{.*}} %V32I8 = sub
; SSE42: cost of 2 {{.*}} %K = sub ; SSE42: cost of 2 {{.*}} %V32I8 = sub
; AVX: cost of 4 {{.*}} %K = sub ; AVX: cost of 4 {{.*}} %V32I8 = sub
; AVX2: cost of 1 {{.*}} %K = sub ; AVX2: cost of 1 {{.*}} %V32I8 = sub
; AVX512: cost of 1 {{.*}} %K = sub ; AVX512: cost of 1 {{.*}} %V32I8 = sub
%K = sub <32 x i8> undef, undef %V32I8 = sub <32 x i8> undef, undef
; SSSE3: cost of 4 {{.*}} %L = sub ; SSSE3: cost of 4 {{.*}} %V64I8 = sub
; SSE42: cost of 4 {{.*}} %L = sub ; SSE42: cost of 4 {{.*}} %V64I8 = sub
; AVX: cost of 8 {{.*}} %L = sub ; AVX: cost of 8 {{.*}} %V64I8 = sub
; AVX2: cost of 2 {{.*}} %L = sub ; AVX2: cost of 2 {{.*}} %V64I8 = sub
; AVX512F: cost of 2 {{.*}} %L = sub ; AVX512F: cost of 2 {{.*}} %V64I8 = sub
; AVX512BW: cost of 1 {{.*}} %L = sub ; AVX512BW: cost of 1 {{.*}} %V64I8 = sub
%L = sub <64 x i8> undef, undef %V64I8 = sub <64 x i8> undef, undef
ret i32 undef ret i32 undef
} }
; CHECK-LABEL: 'or' ; CHECK-LABEL: 'or'
define i32 @or(i32 %arg) { define i32 @or(i32 %arg) {
; SSSE3: cost of 1 {{.*}} %A = or ; SSSE3: cost of 1 {{.*}} %V2I64 = or
; SSE42: cost of 1 {{.*}} %A = or ; SSE42: cost of 1 {{.*}} %V2I64 = or
; AVX: cost of 1 {{.*}} %A = or ; AVX: cost of 1 {{.*}} %V2I64 = or
; AVX2: cost of 1 {{.*}} %A = or ; AVX2: cost of 1 {{.*}} %V2I64 = or
; AVX512: cost of 1 {{.*}} %A = or ; AVX512: cost of 1 {{.*}} %V2I64 = or
%A = or <2 x i64> undef, undef %V2I64 = or <2 x i64> undef, undef
; SSSE3: cost of 2 {{.*}} %B = or ; SSSE3: cost of 2 {{.*}} %V4I64 = or
; SSE42: cost of 2 {{.*}} %B = or ; SSE42: cost of 2 {{.*}} %V4I64 = or
; AVX: cost of 1 {{.*}} %B = or ; AVX: cost of 1 {{.*}} %V4I64 = or
; AVX2: cost of 1 {{.*}} %B = or ; AVX2: cost of 1 {{.*}} %V4I64 = or
; AVX512: cost of 1 {{.*}} %B = or ; AVX512: cost of 1 {{.*}} %V4I64 = or
%B = or <4 x i64> undef, undef %V4I64 = or <4 x i64> undef, undef
; SSSE3: cost of 4 {{.*}} %C = or ; SSSE3: cost of 4 {{.*}} %V8I64 = or
; SSE42: cost of 4 {{.*}} %C = or ; SSE42: cost of 4 {{.*}} %V8I64 = or
; AVX: cost of 2 {{.*}} %C = or ; AVX: cost of 2 {{.*}} %V8I64 = or
; AVX2: cost of 2 {{.*}} %C = or ; AVX2: cost of 2 {{.*}} %V8I64 = or
; AVX512: cost of 1 {{.*}} %C = or ; AVX512: cost of 1 {{.*}} %V8I64 = or
%C = or <8 x i64> undef, undef %V8I64 = or <8 x i64> undef, undef
; SSSE3: cost of 1 {{.*}} %D = or ; SSSE3: cost of 1 {{.*}} %V4I32 = or
; SSE42: cost of 1 {{.*}} %D = or ; SSE42: cost of 1 {{.*}} %V4I32 = or
; AVX: cost of 1 {{.*}} %D = or ; AVX: cost of 1 {{.*}} %V4I32 = or
; AVX2: cost of 1 {{.*}} %D = or ; AVX2: cost of 1 {{.*}} %V4I32 = or
; AVX512: cost of 1 {{.*}} %D = or ; AVX512: cost of 1 {{.*}} %V4I32 = or
%D = or <4 x i32> undef, undef %V4I32 = or <4 x i32> undef, undef
; SSSE3: cost of 2 {{.*}} %E = or ; SSSE3: cost of 2 {{.*}} %V8I32 = or
; SSE42: cost of 2 {{.*}} %E = or ; SSE42: cost of 2 {{.*}} %V8I32 = or
; AVX: cost of 1 {{.*}} %E = or ; AVX: cost of 1 {{.*}} %V8I32 = or
; AVX2: cost of 1 {{.*}} %E = or ; AVX2: cost of 1 {{.*}} %V8I32 = or
; AVX512: cost of 1 {{.*}} %E = or ; AVX512: cost of 1 {{.*}} %V8I32 = or
%E = or <8 x i32> undef, undef %V8I32 = or <8 x i32> undef, undef
; SSSE3: cost of 4 {{.*}} %F = or ; SSSE3: cost of 4 {{.*}} %V16I32 = or
; SSE42: cost of 4 {{.*}} %F = or ; SSE42: cost of 4 {{.*}} %V16I32 = or
; AVX: cost of 2 {{.*}} %F = or ; AVX: cost of 2 {{.*}} %V16I32 = or
; AVX2: cost of 2 {{.*}} %F = or ; AVX2: cost of 2 {{.*}} %V16I32 = or
; AVX512: cost of 1 {{.*}} %F = or ; AVX512: cost of 1 {{.*}} %V16I32 = or
%F = or <16 x i32> undef, undef %V16I32 = or <16 x i32> undef, undef
; SSSE3: cost of 1 {{.*}} %G = or ; SSSE3: cost of 1 {{.*}} %V8I16 = or
; SSE42: cost of 1 {{.*}} %G = or ; SSE42: cost of 1 {{.*}} %V8I16 = or
; AVX: cost of 1 {{.*}} %G = or ; AVX: cost of 1 {{.*}} %V8I16 = or
; AVX2: cost of 1 {{.*}} %G = or ; AVX2: cost of 1 {{.*}} %V8I16 = or
; AVX512: cost of 1 {{.*}} %G = or ; AVX512: cost of 1 {{.*}} %V8I16 = or
%G = or <8 x i16> undef, undef %V8I16 = or <8 x i16> undef, undef
; SSSE3: cost of 2 {{.*}} %H = or ; SSSE3: cost of 2 {{.*}} %V16I16 = or
; SSE42: cost of 2 {{.*}} %H = or ; SSE42: cost of 2 {{.*}} %V16I16 = or
; AVX: cost of 1 {{.*}} %H = or ; AVX: cost of 1 {{.*}} %V16I16 = or
; AVX2: cost of 1 {{.*}} %H = or ; AVX2: cost of 1 {{.*}} %V16I16 = or
; AVX512: cost of 1 {{.*}} %H = or ; AVX512: cost of 1 {{.*}} %V16I16 = or
%H = or <16 x i16> undef, undef %V16I16 = or <16 x i16> undef, undef
; SSSE3: cost of 4 {{.*}} %I = or ; SSSE3: cost of 4 {{.*}} %V32I16 = or
; SSE42: cost of 4 {{.*}} %I = or ; SSE42: cost of 4 {{.*}} %V32I16 = or
; AVX: cost of 2 {{.*}} %I = or ; AVX: cost of 2 {{.*}} %V32I16 = or
; AVX2: cost of 2 {{.*}} %I = or ; AVX2: cost of 2 {{.*}} %V32I16 = or
; AVX512F: cost of 2 {{.*}} %I = or ; AVX512F: cost of 2 {{.*}} %V32I16 = or
; AVX512BW: cost of 1 {{.*}} %I = or ; AVX512BW: cost of 1 {{.*}} %V32I16 = or
%I = or <32 x i16> undef, undef %V32I16 = or <32 x i16> undef, undef
; SSSE3: cost of 1 {{.*}} %J = or ; SSSE3: cost of 1 {{.*}} %V16I8 = or
; SSE42: cost of 1 {{.*}} %J = or ; SSE42: cost of 1 {{.*}} %V16I8 = or
; AVX: cost of 1 {{.*}} %J = or ; AVX: cost of 1 {{.*}} %V16I8 = or
; AVX2: cost of 1 {{.*}} %J = or ; AVX2: cost of 1 {{.*}} %V16I8 = or
; AVX512: cost of 1 {{.*}} %J = or ; AVX512: cost of 1 {{.*}} %V16I8 = or
%J = or <16 x i8> undef, undef %V16I8 = or <16 x i8> undef, undef
; SSSE3: cost of 2 {{.*}} %K = or ; SSSE3: cost of 2 {{.*}} %V32I8 = or
; SSE42: cost of 2 {{.*}} %K = or ; SSE42: cost of 2 {{.*}} %V32I8 = or
; AVX: cost of 1 {{.*}} %K = or ; AVX: cost of 1 {{.*}} %V32I8 = or
; AVX2: cost of 1 {{.*}} %K = or ; AVX2: cost of 1 {{.*}} %V32I8 = or
; AVX512: cost of 1 {{.*}} %K = or ; AVX512: cost of 1 {{.*}} %V32I8 = or
%K = or <32 x i8> undef, undef %V32I8 = or <32 x i8> undef, undef
; SSSE3: cost of 4 {{.*}} %L = or ; SSSE3: cost of 4 {{.*}} %V64I8 = or
; SSE42: cost of 4 {{.*}} %L = or ; SSE42: cost of 4 {{.*}} %V64I8 = or
; AVX: cost of 2 {{.*}} %L = or ; AVX: cost of 2 {{.*}} %V64I8 = or
; AVX2: cost of 2 {{.*}} %L = or ; AVX2: cost of 2 {{.*}} %V64I8 = or
; AVX512F: cost of 2 {{.*}} %L = or ; AVX512F: cost of 2 {{.*}} %V64I8 = or
; AVX512BW: cost of 1 {{.*}} %L = or ; AVX512BW: cost of 1 {{.*}} %V64I8 = or
%L = or <64 x i8> undef, undef %V64I8 = or <64 x i8> undef, undef
ret i32 undef ret i32 undef
} }
; CHECK-LABEL: 'xor' ; CHECK-LABEL: 'xor'
define i32 @xor(i32 %arg) { define i32 @xor(i32 %arg) {
; SSSE3: cost of 1 {{.*}} %A = xor ; SSSE3: cost of 1 {{.*}} %V2I64 = xor
; SSE42: cost of 1 {{.*}} %A = xor ; SSE42: cost of 1 {{.*}} %V2I64 = xor
; AVX: cost of 1 {{.*}} %A = xor ; AVX: cost of 1 {{.*}} %V2I64 = xor
; AVX2: cost of 1 {{.*}} %A = xor ; AVX2: cost of 1 {{.*}} %V2I64 = xor
; AVX512: cost of 1 {{.*}} %A = xor ; AVX512: cost of 1 {{.*}} %V2I64 = xor
%A = xor <2 x i64> undef, undef %V2I64 = xor <2 x i64> undef, undef
; SSSE3: cost of 2 {{.*}} %B = xor ; SSSE3: cost of 2 {{.*}} %V4I64 = xor
; SSE42: cost of 2 {{.*}} %B = xor ; SSE42: cost of 2 {{.*}} %V4I64 = xor
; AVX: cost of 1 {{.*}} %B = xor ; AVX: cost of 1 {{.*}} %V4I64 = xor
; AVX2: cost of 1 {{.*}} %B = xor ; AVX2: cost of 1 {{.*}} %V4I64 = xor
; AVX512: cost of 1 {{.*}} %B = xor ; AVX512: cost of 1 {{.*}} %V4I64 = xor
%B = xor <4 x i64> undef, undef %V4I64 = xor <4 x i64> undef, undef
; SSSE3: cost of 4 {{.*}} %C = xor ; SSSE3: cost of 4 {{.*}} %V8I64 = xor
; SSE42: cost of 4 {{.*}} %C = xor ; SSE42: cost of 4 {{.*}} %V8I64 = xor
; AVX: cost of 2 {{.*}} %C = xor ; AVX: cost of 2 {{.*}} %V8I64 = xor
; AVX2: cost of 2 {{.*}} %C = xor ; AVX2: cost of 2 {{.*}} %V8I64 = xor
; AVX512: cost of 1 {{.*}} %C = xor ; AVX512: cost of 1 {{.*}} %V8I64 = xor
%C = xor <8 x i64> undef, undef %V8I64 = xor <8 x i64> undef, undef
; SSSE3: cost of 1 {{.*}} %D = xor ; SSSE3: cost of 1 {{.*}} %V4I32 = xor
; SSE42: cost of 1 {{.*}} %D = xor ; SSE42: cost of 1 {{.*}} %V4I32 = xor
; AVX: cost of 1 {{.*}} %D = xor ; AVX: cost of 1 {{.*}} %V4I32 = xor
; AVX2: cost of 1 {{.*}} %D = xor ; AVX2: cost of 1 {{.*}} %V4I32 = xor
; AVX512: cost of 1 {{.*}} %D = xor ; AVX512: cost of 1 {{.*}} %V4I32 = xor
%D = xor <4 x i32> undef, undef %V4I32 = xor <4 x i32> undef, undef
; SSSE3: cost of 2 {{.*}} %E = xor ; SSSE3: cost of 2 {{.*}} %V8I32 = xor
; SSE42: cost of 2 {{.*}} %E = xor ; SSE42: cost of 2 {{.*}} %V8I32 = xor
; AVX: cost of 1 {{.*}} %E = xor ; AVX: cost of 1 {{.*}} %V8I32 = xor
; AVX2: cost of 1 {{.*}} %E = xor ; AVX2: cost of 1 {{.*}} %V8I32 = xor
; AVX512: cost of 1 {{.*}} %E = xor ; AVX512: cost of 1 {{.*}} %V8I32 = xor
%E = xor <8 x i32> undef, undef %V8I32 = xor <8 x i32> undef, undef
; SSSE3: cost of 4 {{.*}} %F = xor ; SSSE3: cost of 4 {{.*}} %V16I32 = xor
; SSE42: cost of 4 {{.*}} %F = xor ; SSE42: cost of 4 {{.*}} %V16I32 = xor
; AVX: cost of 2 {{.*}} %F = xor ; AVX: cost of 2 {{.*}} %V16I32 = xor
; AVX2: cost of 2 {{.*}} %F = xor ; AVX2: cost of 2 {{.*}} %V16I32 = xor
; AVX512: cost of 1 {{.*}} %F = xor ; AVX512: cost of 1 {{.*}} %V16I32 = xor
%F = xor <16 x i32> undef, undef %V16I32 = xor <16 x i32> undef, undef
; SSSE3: cost of 1 {{.*}} %G = xor ; SSSE3: cost of 1 {{.*}} %V8I16 = xor
; SSE42: cost of 1 {{.*}} %G = xor ; SSE42: cost of 1 {{.*}} %V8I16 = xor
; AVX: cost of 1 {{.*}} %G = xor ; AVX: cost of 1 {{.*}} %V8I16 = xor
; AVX2: cost of 1 {{.*}} %G = xor ; AVX2: cost of 1 {{.*}} %V8I16 = xor
; AVX512: cost of 1 {{.*}} %G = xor ; AVX512: cost of 1 {{.*}} %V8I16 = xor
%G = xor <8 x i16> undef, undef %V8I16 = xor <8 x i16> undef, undef
; SSSE3: cost of 2 {{.*}} %H = xor ; SSSE3: cost of 2 {{.*}} %V16I16 = xor
; SSE42: cost of 2 {{.*}} %H = xor ; SSE42: cost of 2 {{.*}} %V16I16 = xor
; AVX: cost of 1 {{.*}} %H = xor ; AVX: cost of 1 {{.*}} %V16I16 = xor
; AVX2: cost of 1 {{.*}} %H = xor ; AVX2: cost of 1 {{.*}} %V16I16 = xor
; AVX512: cost of 1 {{.*}} %H = xor ; AVX512: cost of 1 {{.*}} %V16I16 = xor
%H = xor <16 x i16> undef, undef %V16I16 = xor <16 x i16> undef, undef
; SSSE3: cost of 4 {{.*}} %I = xor ; SSSE3: cost of 4 {{.*}} %V32I16 = xor
; SSE42: cost of 4 {{.*}} %I = xor ; SSE42: cost of 4 {{.*}} %V32I16 = xor
; AVX: cost of 2 {{.*}} %I = xor ; AVX: cost of 2 {{.*}} %V32I16 = xor
; AVX2: cost of 2 {{.*}} %I = xor ; AVX2: cost of 2 {{.*}} %V32I16 = xor
; AVX512F: cost of 2 {{.*}} %I = xor ; AVX512F: cost of 2 {{.*}} %V32I16 = xor
; AVX512BW: cost of 1 {{.*}} %I = xor ; AVX512BW: cost of 1 {{.*}} %V32I16 = xor
%I = xor <32 x i16> undef, undef %V32I16 = xor <32 x i16> undef, undef
; SSSE3: cost of 1 {{.*}} %J = xor ; SSSE3: cost of 1 {{.*}} %V16I8 = xor
; SSE42: cost of 1 {{.*}} %J = xor ; SSE42: cost of 1 {{.*}} %V16I8 = xor
; AVX: cost of 1 {{.*}} %J = xor ; AVX: cost of 1 {{.*}} %V16I8 = xor
; AVX2: cost of 1 {{.*}} %J = xor ; AVX2: cost of 1 {{.*}} %V16I8 = xor
; AVX512: cost of 1 {{.*}} %J = xor ; AVX512: cost of 1 {{.*}} %V16I8 = xor
%J = xor <16 x i8> undef, undef %V16I8 = xor <16 x i8> undef, undef
; SSSE3: cost of 2 {{.*}} %K = xor ; SSSE3: cost of 2 {{.*}} %V32I8 = xor
; SSE42: cost of 2 {{.*}} %K = xor ; SSE42: cost of 2 {{.*}} %V32I8 = xor
; AVX: cost of 1 {{.*}} %K = xor ; AVX: cost of 1 {{.*}} %V32I8 = xor
; AVX2: cost of 1 {{.*}} %K = xor ; AVX2: cost of 1 {{.*}} %V32I8 = xor
; AVX512: cost of 1 {{.*}} %K = xor ; AVX512: cost of 1 {{.*}} %V32I8 = xor
%K = xor <32 x i8> undef, undef %V32I8 = xor <32 x i8> undef, undef
; SSSE3: cost of 4 {{.*}} %L = xor ; SSSE3: cost of 4 {{.*}} %V64I8 = xor
; SSE42: cost of 4 {{.*}} %L = xor ; SSE42: cost of 4 {{.*}} %V64I8 = xor
; AVX: cost of 2 {{.*}} %L = xor ; AVX: cost of 2 {{.*}} %V64I8 = xor
; AVX2: cost of 2 {{.*}} %L = xor ; AVX2: cost of 2 {{.*}} %V64I8 = xor
; AVX512F: cost of 2 {{.*}} %L = xor ; AVX512F: cost of 2 {{.*}} %V64I8 = xor
; AVX512BW: cost of 1 {{.*}} %L = xor ; AVX512BW: cost of 1 {{.*}} %V64I8 = xor
%L = xor <64 x i8> undef, undef %V64I8 = xor <64 x i8> undef, undef
ret i32 undef ret i32 undef
} }
; CHECK-LABEL: 'and' ; CHECK-LABEL: 'and'
define i32 @and(i32 %arg) { define i32 @and(i32 %arg) {
; SSSE3: cost of 1 {{.*}} %A = and ; SSSE3: cost of 1 {{.*}} %V2I64 = and
; SSE42: cost of 1 {{.*}} %A = and ; SSE42: cost of 1 {{.*}} %V2I64 = and
; AVX: cost of 1 {{.*}} %A = and ; AVX: cost of 1 {{.*}} %V2I64 = and
; AVX2: cost of 1 {{.*}} %A = and ; AVX2: cost of 1 {{.*}} %V2I64 = and
; AVX512: cost of 1 {{.*}} %A = and ; AVX512: cost of 1 {{.*}} %V2I64 = and
%A = and <2 x i64> undef, undef %V2I64 = and <2 x i64> undef, undef
; SSSE3: cost of 2 {{.*}} %B = and ; SSSE3: cost of 2 {{.*}} %V4I64 = and
; SSE42: cost of 2 {{.*}} %B = and ; SSE42: cost of 2 {{.*}} %V4I64 = and
; AVX: cost of 1 {{.*}} %B = and ; AVX: cost of 1 {{.*}} %V4I64 = and
; AVX2: cost of 1 {{.*}} %B = and ; AVX2: cost of 1 {{.*}} %V4I64 = and
; AVX512: cost of 1 {{.*}} %B = and ; AVX512: cost of 1 {{.*}} %V4I64 = and
%B = and <4 x i64> undef, undef %V4I64 = and <4 x i64> undef, undef
; SSSE3: cost of 4 {{.*}} %C = and ; SSSE3: cost of 4 {{.*}} %V8I64 = and
; SSE42: cost of 4 {{.*}} %C = and ; SSE42: cost of 4 {{.*}} %V8I64 = and
; AVX: cost of 2 {{.*}} %C = and ; AVX: cost of 2 {{.*}} %V8I64 = and
; AVX2: cost of 2 {{.*}} %C = and ; AVX2: cost of 2 {{.*}} %V8I64 = and
; AVX512: cost of 1 {{.*}} %C = and ; AVX512: cost of 1 {{.*}} %V8I64 = and
%C = and <8 x i64> undef, undef %V8I64 = and <8 x i64> undef, undef
; SSSE3: cost of 1 {{.*}} %D = and ; SSSE3: cost of 1 {{.*}} %V4I32 = and
; SSE42: cost of 1 {{.*}} %D = and ; SSE42: cost of 1 {{.*}} %V4I32 = and
; AVX: cost of 1 {{.*}} %D = and ; AVX: cost of 1 {{.*}} %V4I32 = and
; AVX2: cost of 1 {{.*}} %D = and ; AVX2: cost of 1 {{.*}} %V4I32 = and
; AVX512: cost of 1 {{.*}} %D = and ; AVX512: cost of 1 {{.*}} %V4I32 = and
%D = and <4 x i32> undef, undef %V4I32 = and <4 x i32> undef, undef
; SSSE3: cost of 2 {{.*}} %E = and ; SSSE3: cost of 2 {{.*}} %V8I32 = and
; SSE42: cost of 2 {{.*}} %E = and ; SSE42: cost of 2 {{.*}} %V8I32 = and
; AVX: cost of 1 {{.*}} %E = and ; AVX: cost of 1 {{.*}} %V8I32 = and
; AVX2: cost of 1 {{.*}} %E = and ; AVX2: cost of 1 {{.*}} %V8I32 = and
; AVX512: cost of 1 {{.*}} %E = and ; AVX512: cost of 1 {{.*}} %V8I32 = and
%E = and <8 x i32> undef, undef %V8I32 = and <8 x i32> undef, undef
; SSSE3: cost of 4 {{.*}} %F = and ; SSSE3: cost of 4 {{.*}} %V16I32 = and
; SSE42: cost of 4 {{.*}} %F = and ; SSE42: cost of 4 {{.*}} %V16I32 = and
; AVX: cost of 2 {{.*}} %F = and ; AVX: cost of 2 {{.*}} %V16I32 = and
; AVX2: cost of 2 {{.*}} %F = and ; AVX2: cost of 2 {{.*}} %V16I32 = and
; AVX512: cost of 1 {{.*}} %F = and ; AVX512: cost of 1 {{.*}} %V16I32 = and
%F = and <16 x i32> undef, undef %V16I32 = and <16 x i32> undef, undef
; SSSE3: cost of 1 {{.*}} %G = and ; SSSE3: cost of 1 {{.*}} %V8I16 = and
; SSE42: cost of 1 {{.*}} %G = and ; SSE42: cost of 1 {{.*}} %V8I16 = and
; AVX: cost of 1 {{.*}} %G = and ; AVX: cost of 1 {{.*}} %V8I16 = and
; AVX2: cost of 1 {{.*}} %G = and ; AVX2: cost of 1 {{.*}} %V8I16 = and
; AVX512: cost of 1 {{.*}} %G = and ; AVX512: cost of 1 {{.*}} %V8I16 = and
%G = and <8 x i16> undef, undef %V8I16 = and <8 x i16> undef, undef
; SSSE3: cost of 2 {{.*}} %H = and ; SSSE3: cost of 2 {{.*}} %V16I16 = and
; SSE42: cost of 2 {{.*}} %H = and ; SSE42: cost of 2 {{.*}} %V16I16 = and
; AVX: cost of 1 {{.*}} %H = and ; AVX: cost of 1 {{.*}} %V16I16 = and
; AVX2: cost of 1 {{.*}} %H = and ; AVX2: cost of 1 {{.*}} %V16I16 = and
; AVX512: cost of 1 {{.*}} %H = and ; AVX512: cost of 1 {{.*}} %V16I16 = and
%H = and <16 x i16> undef, undef %V16I16 = and <16 x i16> undef, undef
; SSSE3: cost of 4 {{.*}} %I = and ; SSSE3: cost of 4 {{.*}} %V32I16 = and
; SSE42: cost of 4 {{.*}} %I = and ; SSE42: cost of 4 {{.*}} %V32I16 = and
; AVX: cost of 2 {{.*}} %I = and ; AVX: cost of 2 {{.*}} %V32I16 = and
; AVX2: cost of 2 {{.*}} %I = and ; AVX2: cost of 2 {{.*}} %V32I16 = and
; AVX512F: cost of 2 {{.*}} %I = and ; AVX512F: cost of 2 {{.*}} %V32I16 = and
; AVX512BW: cost of 1 {{.*}} %I = and ; AVX512BW: cost of 1 {{.*}} %V32I16 = and
%I = and <32 x i16> undef, undef %V32I16 = and <32 x i16> undef, undef
; SSSE3: cost of 1 {{.*}} %J = and ; SSSE3: cost of 1 {{.*}} %V16I8 = and
; SSE42: cost of 1 {{.*}} %J = and ; SSE42: cost of 1 {{.*}} %V16I8 = and
; AVX: cost of 1 {{.*}} %J = and ; AVX: cost of 1 {{.*}} %V16I8 = and
; AVX2: cost of 1 {{.*}} %J = and ; AVX2: cost of 1 {{.*}} %V16I8 = and
; AVX512: cost of 1 {{.*}} %J = and ; AVX512: cost of 1 {{.*}} %V16I8 = and
%J = and <16 x i8> undef, undef %V16I8 = and <16 x i8> undef, undef
; SSSE3: cost of 2 {{.*}} %K = and ; SSSE3: cost of 2 {{.*}} %V32I8 = and
; SSE42: cost of 2 {{.*}} %K = and ; SSE42: cost of 2 {{.*}} %V32I8 = and
; AVX: cost of 1 {{.*}} %K = and ; AVX: cost of 1 {{.*}} %V32I8 = and
; AVX2: cost of 1 {{.*}} %K = and ; AVX2: cost of 1 {{.*}} %V32I8 = and
; AVX512: cost of 1 {{.*}} %K = and ; AVX512: cost of 1 {{.*}} %V32I8 = and
%K = and <32 x i8> undef, undef %V32I8 = and <32 x i8> undef, undef
; SSSE3: cost of 4 {{.*}} %L = and ; SSSE3: cost of 4 {{.*}} %V64I8 = and
; SSE42: cost of 4 {{.*}} %L = and ; SSE42: cost of 4 {{.*}} %V64I8 = and
; AVX: cost of 2 {{.*}} %L = and ; AVX: cost of 2 {{.*}} %V64I8 = and
; AVX2: cost of 2 {{.*}} %L = and ; AVX2: cost of 2 {{.*}} %V64I8 = and
; AVX512F: cost of 2 {{.*}} %L = and ; AVX512F: cost of 2 {{.*}} %V64I8 = and
; AVX512BW: cost of 1 {{.*}} %L = and ; AVX512BW: cost of 1 {{.*}} %V64I8 = and
%L = and <64 x i8> undef, undef %V64I8 = and <64 x i8> undef, undef
ret i32 undef ret i32 undef
} }
; CHECK-LABEL: 'mul' ; CHECK-LABEL: 'mul'
define i32 @mul(i32 %arg) { define i32 @mul(i32 %arg) {
; SSSE3: cost of 8 {{.*}} %A = mul ; SSSE3: cost of 8 {{.*}} %V2I64 = mul
; SSE42: cost of 8 {{.*}} %A = mul ; SSE42: cost of 8 {{.*}} %V2I64 = mul
; AVX: cost of 8 {{.*}} %A = mul ; AVX: cost of 8 {{.*}} %V2I64 = mul
; AVX2: cost of 8 {{.*}} %A = mul ; AVX2: cost of 8 {{.*}} %V2I64 = mul
; AVX512F: cost of 8 {{.*}} %A = mul ; AVX512F: cost of 8 {{.*}} %V2I64 = mul
; AVX512BW: cost of 8 {{.*}} %A = mul ; AVX512BW: cost of 8 {{.*}} %V2I64 = mul
; AVX512DQ: cost of 1 {{.*}} %A = mul ; AVX512DQ: cost of 1 {{.*}} %V2I64 = mul
%A = mul <2 x i64> undef, undef %V2I64 = mul <2 x i64> undef, undef
; SSSE3: cost of 16 {{.*}} %B = mul ; SSSE3: cost of 16 {{.*}} %V4I64 = mul
; SSE42: cost of 16 {{.*}} %B = mul ; SSE42: cost of 16 {{.*}} %V4I64 = mul
; AVX: cost of 18 {{.*}} %B = mul ; AVX: cost of 18 {{.*}} %V4I64 = mul
; AVX2: cost of 8 {{.*}} %B = mul ; AVX2: cost of 8 {{.*}} %V4I64 = mul
; AVX512F: cost of 8 {{.*}} %B = mul ; AVX512F: cost of 8 {{.*}} %V4I64 = mul
; AVX512BW: cost of 8 {{.*}} %B = mul ; AVX512BW: cost of 8 {{.*}} %V4I64 = mul
; AVX512DQ: cost of 1 {{.*}} %B = mul ; AVX512DQ: cost of 1 {{.*}} %V4I64 = mul
%B = mul <4 x i64> undef, undef %V4I64 = mul <4 x i64> undef, undef
; SSSE3: cost of 32 {{.*}} %C = mul ; SSSE3: cost of 32 {{.*}} %V8I64 = mul
; SSE42: cost of 32 {{.*}} %C = mul ; SSE42: cost of 32 {{.*}} %V8I64 = mul
; AVX: cost of 36 {{.*}} %C = mul ; AVX: cost of 36 {{.*}} %V8I64 = mul
; AVX2: cost of 16 {{.*}} %C = mul ; AVX2: cost of 16 {{.*}} %V8I64 = mul
; AVX512F: cost of 8 {{.*}} %C = mul ; AVX512F: cost of 8 {{.*}} %V8I64 = mul
; AVX512BW: cost of 8 {{.*}} %C = mul ; AVX512BW: cost of 8 {{.*}} %V8I64 = mul
; AVX512DQ: cost of 1 {{.*}} %C = mul ; AVX512DQ: cost of 1 {{.*}} %V8I64 = mul
%C = mul <8 x i64> undef, undef %V8I64 = mul <8 x i64> undef, undef
; SSSE3: cost of 6 {{.*}} %D = mul ; SSSE3: cost of 6 {{.*}} %V4I32 = mul
; SSE42: cost of 1 {{.*}} %D = mul ; SSE42: cost of 1 {{.*}} %V4I32 = mul
; AVX: cost of 1 {{.*}} %D = mul ; AVX: cost of 1 {{.*}} %V4I32 = mul
; AVX2: cost of 1 {{.*}} %D = mul ; AVX2: cost of 1 {{.*}} %V4I32 = mul
; AVX512: cost of 1 {{.*}} %D = mul ; AVX512: cost of 1 {{.*}} %V4I32 = mul
%D = mul <4 x i32> undef, undef %V4I32 = mul <4 x i32> undef, undef
; SSSE3: cost of 12 {{.*}} %E = mul ; SSSE3: cost of 12 {{.*}} %V8I32 = mul
; SSE42: cost of 2 {{.*}} %E = mul ; SSE42: cost of 2 {{.*}} %V8I32 = mul
; AVX: cost of 4 {{.*}} %E = mul ; AVX: cost of 4 {{.*}} %V8I32 = mul
; AVX2: cost of 1 {{.*}} %E = mul ; AVX2: cost of 1 {{.*}} %V8I32 = mul
; AVX512: cost of 1 {{.*}} %E = mul ; AVX512: cost of 1 {{.*}} %V8I32 = mul
%E = mul <8 x i32> undef, undef %V8I32 = mul <8 x i32> undef, undef
; SSSE3: cost of 24 {{.*}} %F = mul ; SSSE3: cost of 24 {{.*}} %V16I32 = mul
; SSE42: cost of 4 {{.*}} %F = mul ; SSE42: cost of 4 {{.*}} %V16I32 = mul
; AVX: cost of 8 {{.*}} %F = mul ; AVX: cost of 8 {{.*}} %V16I32 = mul
; AVX2: cost of 2 {{.*}} %F = mul ; AVX2: cost of 2 {{.*}} %V16I32 = mul
; AVX512: cost of 1 {{.*}} %F = mul ; AVX512: cost of 1 {{.*}} %V16I32 = mul
%F = mul <16 x i32> undef, undef %V16I32 = mul <16 x i32> undef, undef
; SSSE3: cost of 1 {{.*}} %G = mul ; SSSE3: cost of 1 {{.*}} %V8I16 = mul
; SSE42: cost of 1 {{.*}} %G = mul ; SSE42: cost of 1 {{.*}} %V8I16 = mul
; AVX: cost of 1 {{.*}} %G = mul ; AVX: cost of 1 {{.*}} %V8I16 = mul
; AVX2: cost of 1 {{.*}} %G = mul ; AVX2: cost of 1 {{.*}} %V8I16 = mul
; AVX512: cost of 1 {{.*}} %G = mul ; AVX512: cost of 1 {{.*}} %V8I16 = mul
%G = mul <8 x i16> undef, undef %V8I16 = mul <8 x i16> undef, undef
; SSSE3: cost of 2 {{.*}} %H = mul ; SSSE3: cost of 2 {{.*}} %V16I16 = mul
; SSE42: cost of 2 {{.*}} %H = mul ; SSE42: cost of 2 {{.*}} %V16I16 = mul
; AVX: cost of 4 {{.*}} %H = mul ; AVX: cost of 4 {{.*}} %V16I16 = mul
; AVX2: cost of 1 {{.*}} %H = mul ; AVX2: cost of 1 {{.*}} %V16I16 = mul
; AVX512: cost of 1 {{.*}} %H = mul ; AVX512: cost of 1 {{.*}} %V16I16 = mul
%H = mul <16 x i16> undef, undef %V16I16 = mul <16 x i16> undef, undef
; SSSE3: cost of 4 {{.*}} %I = mul ; SSSE3: cost of 4 {{.*}} %V32I16 = mul
; SSE42: cost of 4 {{.*}} %I = mul ; SSE42: cost of 4 {{.*}} %V32I16 = mul
; AVX: cost of 8 {{.*}} %I = mul ; AVX: cost of 8 {{.*}} %V32I16 = mul
; AVX2: cost of 2 {{.*}} %I = mul ; AVX2: cost of 2 {{.*}} %V32I16 = mul
; AVX512F: cost of 2 {{.*}} %I = mul ; AVX512F: cost of 2 {{.*}} %V32I16 = mul
; AVX512BW: cost of 1 {{.*}} %I = mul ; AVX512BW: cost of 1 {{.*}} %V32I16 = mul
%I = mul <32 x i16> undef, undef %V32I16 = mul <32 x i16> undef, undef
; SSSE3: cost of 12 {{.*}} %J = mul ; SSSE3: cost of 12 {{.*}} %V16I8 = mul
; SSE42: cost of 12 {{.*}} %J = mul ; SSE42: cost of 12 {{.*}} %V16I8 = mul
; AVX: cost of 12 {{.*}} %J = mul ; AVX: cost of 12 {{.*}} %V16I8 = mul
; AVX2: cost of 7 {{.*}} %J = mul ; AVX2: cost of 7 {{.*}} %V16I8 = mul
; AVX512F: cost of 5 {{.*}} %J = mul ; AVX512F: cost of 5 {{.*}} %V16I8 = mul
; AVX512BW: cost of 4 {{.*}} %J = mul ; AVX512BW: cost of 4 {{.*}} %V16I8 = mul
%J = mul <16 x i8> undef, undef %V16I8 = mul <16 x i8> undef, undef
; SSSE3: cost of 24 {{.*}} %K = mul ; SSSE3: cost of 24 {{.*}} %V32I8 = mul
; SSE42: cost of 24 {{.*}} %K = mul ; SSE42: cost of 24 {{.*}} %V32I8 = mul
; AVX: cost of 26 {{.*}} %K = mul ; AVX: cost of 26 {{.*}} %V32I8 = mul
; AVX2: cost of 17 {{.*}} %K = mul ; AVX2: cost of 17 {{.*}} %V32I8 = mul
; AVX512F: cost of 13 {{.*}} %K = mul ; AVX512F: cost of 13 {{.*}} %V32I8 = mul
; AVX512BW: cost of 4 {{.*}} %K = mul ; AVX512BW: cost of 4 {{.*}} %V32I8 = mul
%K = mul <32 x i8> undef, undef %V32I8 = mul <32 x i8> undef, undef
; SSSE3: cost of 48 {{.*}} %L = mul ; SSSE3: cost of 48 {{.*}} %V64I8 = mul
; SSE42: cost of 48 {{.*}} %L = mul ; SSE42: cost of 48 {{.*}} %V64I8 = mul
; AVX: cost of 52 {{.*}} %L = mul ; AVX: cost of 52 {{.*}} %V64I8 = mul
; AVX2: cost of 34 {{.*}} %L = mul ; AVX2: cost of 34 {{.*}} %V64I8 = mul
; AVX512F: cost of 26 {{.*}} %L = mul ; AVX512F: cost of 26 {{.*}} %V64I8 = mul
; AVX512BW: cost of 11 {{.*}} %L = mul ; AVX512BW: cost of 11 {{.*}} %V64I8 = mul
%L = mul <64 x i8> undef, undef %V64I8 = mul <64 x i8> undef, undef
ret i32 undef ret i32 undef
} }