gn build: Simplify Target build files

Now that the cycle between MCTargetDesc and TargetInfo is gone
(see revisions 360709 360718 360722 360724 360726 360731 360733 360735 360736),
remove the dependency from TargetInfo on MCTargetDesc:tablegen. In most
targets, this makes MCTargetDesc:tablegen have just a single use, so
inline it there.

For AArch64, ARM, and RISCV there's still a similar cycle between
MCTargetDesc and Utils, so the MCTargetDesc:tablegen indirection is
still needed there.

Differential Revision: https://reviews.llvm.org/D63200

llvm-svn: 363436

llvm/utils/gn/secondary/llvm/lib/Target/AArch64/MCTargetDesc/BUILD.gn

@@ -45,7 +45,6 @@ tablegen("AArch64GenSubtargetInfo") {
 group("tablegen") {
   visibility = [
     ":MCTargetDesc",
-    "../TargetInfo",
     "../Utils",
   ]
   public_deps = [

llvm/utils/gn/secondary/llvm/lib/Target/AArch64/TargetInfo/BUILD.gn

@@ -2,10 +2,6 @@ static_library("TargetInfo") {
   output_name = "LLVMAArch64Info"
   deps = [
     "//llvm/lib/Support",
-
-    # MCTargetDesc depends on TargetInfo, so we can't depend on the full
-    # MCTargetDesc target here: it would form a cycle.
-    "//llvm/lib/Target/AArch64/MCTargetDesc:tablegen",
   ]
   include_dirs = [ ".." ]
   sources = [

llvm/utils/gn/secondary/llvm/lib/Target/AArch64/Utils/BUILD.gn

@@ -13,6 +13,9 @@ static_library("Utils") {
   ]
   deps = [
     "//llvm/lib/Support",
+
+    # MCTargetDesc depends on Utils, so we can't depend on the full
+    # MCTargetDesc target here: it would form a cycle.
     "//llvm/lib/Target/AArch64/MCTargetDesc:tablegen",
   ]
 

llvm/utils/gn/secondary/llvm/lib/Target/ARM/MCTargetDesc/BUILD.gn

@@ -36,7 +36,6 @@ tablegen("ARMGenSubtargetInfo") {
 group("tablegen") {
   visibility = [
     ":MCTargetDesc",
-    "../TargetInfo",
     "../Utils",
   ]
   public_deps = [
@@ -45,6 +44,7 @@ group("tablegen") {
     ":ARMGenSubtargetInfo",
   ]
 }
+
 static_library("MCTargetDesc") {
   output_name = "LLVMARMDesc"
   public_deps = [

llvm/utils/gn/secondary/llvm/lib/Target/ARM/TargetInfo/BUILD.gn

@@ -2,10 +2,6 @@ static_library("TargetInfo") {
   output_name = "LLVMARMInfo"
   deps = [
     "//llvm/lib/Support",
-
-    # MCTargetDesc depends on TargetInfo, so we can't depend on the full
-    # MCTargetDesc target here: it would form a cycle.
-    "//llvm/lib/Target/ARM/MCTargetDesc:tablegen",
   ]
   include_dirs = [ ".." ]
   sources = [

llvm/utils/gn/secondary/llvm/lib/Target/ARM/Utils/BUILD.gn

@@ -13,6 +13,9 @@ static_library("Utils") {
   ]
   deps = [
     "//llvm/lib/Support",
+
+    # MCTargetDesc depends on Utils, so we can't depend on the full
+    # MCTargetDesc target here: it would form a cycle.
     "//llvm/lib/Target/ARM/MCTargetDesc:tablegen",
   ]
 

llvm/utils/gn/secondary/llvm/lib/Target/BPF/MCTargetDesc/BUILD.gn

@@ -7,7 +7,7 @@ tablegen("BPFGenAsmWriter") {
 }
 
 tablegen("BPFGenInstrInfo") {
-  visibility = [ ":tablegen" ]
+  visibility = [ ":MCTargetDesc" ]
   args = [ "-gen-instr-info" ]
   td_file = "../BPF.td"
 }
@@ -19,37 +19,28 @@ tablegen("BPFGenMCCodeEmitter") {
 }
 
 tablegen("BPFGenRegisterInfo") {
-  visibility = [ ":tablegen" ]
+  visibility = [ ":MCTargetDesc" ]
   args = [ "-gen-register-info" ]
   td_file = "../BPF.td"
 }
 
 tablegen("BPFGenSubtargetInfo") {
-  visibility = [ ":tablegen" ]
+  visibility = [ ":MCTargetDesc" ]
   args = [ "-gen-subtarget" ]
   td_file = "../BPF.td"
 }
 
-# This should contain tablegen targets generating .inc files included
-# by other targets. .inc files only used by .cpp files in this directory
-# should be in deps on the static_library instead.
-group("tablegen") {
-  visibility = [
-    ":MCTargetDesc",
-    "../TargetInfo",
-  ]
+static_library("MCTargetDesc") {
+  output_name = "LLVMBPFDesc"
+
+  # This should contain tablegen targets generating .inc files included
+  # by other targets. .inc files only used by .cpp files in this directory
+  # should be in deps instead.
   public_deps = [
     ":BPFGenInstrInfo",
     ":BPFGenRegisterInfo",
     ":BPFGenSubtargetInfo",
   ]
-}
-
-static_library("MCTargetDesc") {
-  output_name = "LLVMBPFDesc"
-  public_deps = [
-    ":tablegen",
-  ]
   deps = [
     ":BPFGenAsmWriter",
     ":BPFGenMCCodeEmitter",

llvm/utils/gn/secondary/llvm/lib/Target/BPF/TargetInfo/BUILD.gn

@@ -2,10 +2,6 @@ static_library("TargetInfo") {
   output_name = "LLVMBPFInfo"
   deps = [
     "//llvm/lib/Support",
-
-    # MCTargetDesc depends on TargetInfo, so we can't depend on the full
-    # MCTargetDesc target here: it would form a cycle.
-    "//llvm/lib/Target/BPF/MCTargetDesc:tablegen",
   ]
   include_dirs = [ ".." ]
   sources = [

llvm/utils/gn/secondary/llvm/lib/Target/Hexagon/MCTargetDesc/BUILD.gn

@@ -7,7 +7,7 @@ tablegen("HexagonGenAsmWriter") {
 }
 
 tablegen("HexagonGenInstrInfo") {
-  visibility = [ ":tablegen" ]
+  visibility = [ ":MCTargetDesc" ]
   args = [ "-gen-instr-info" ]
   td_file = "../Hexagon.td"
 }
@@ -19,34 +19,28 @@ tablegen("HexagonGenMCCodeEmitter") {
 }
 
 tablegen("HexagonGenRegisterInfo") {
-  visibility = [ ":tablegen" ]
+  visibility = [ ":MCTargetDesc" ]
   args = [ "-gen-register-info" ]
   td_file = "../Hexagon.td"
 }
 
 tablegen("HexagonGenSubtargetInfo") {
-  visibility = [ ":tablegen" ]
+  visibility = [ ":MCTargetDesc" ]
   args = [ "-gen-subtarget" ]
   td_file = "../Hexagon.td"
 }
 
-group("tablegen") {
-  visibility = [
-    ":MCTargetDesc",
-    "../TargetInfo",
-  ]
+static_library("MCTargetDesc") {
+  output_name = "LLVMHexagonDesc"
+
+  # This should contain tablegen targets generating .inc files included
+  # by other targets. .inc files only used by .cpp files in this directory
+  # should be in deps instead.
   public_deps = [
     ":HexagonGenInstrInfo",
     ":HexagonGenRegisterInfo",
     ":HexagonGenSubtargetInfo",
   ]
-}
-
-static_library("MCTargetDesc") {
-  output_name = "LLVMHexagonDesc"
-  public_deps = [
-    ":tablegen",
-  ]
   deps = [
     ":HexagonGenAsmWriter",
     ":HexagonGenMCCodeEmitter",

llvm/utils/gn/secondary/llvm/lib/Target/Hexagon/TargetInfo/BUILD.gn

@@ -1,12 +1,7 @@
 static_library("TargetInfo") {
   output_name = "LLVMHexagonInfo"
   deps = [
-    "//llvm/lib/IR",
     "//llvm/lib/Support",
-
-    # MCTargetDesc depends on TargetInfo, so we can't depend on the full
-    # MCTargetDesc target here: it would form a cycle.
-    "//llvm/lib/Target/Hexagon/MCTargetDesc:tablegen",
   ]
   include_dirs = [ ".." ]
   sources = [

llvm/utils/gn/secondary/llvm/lib/Target/Lanai/MCTargetDesc/BUILD.gn

@@ -7,7 +7,7 @@ tablegen("LanaiGenAsmWriter") {
 }
 
 tablegen("LanaiGenInstrInfo") {
-  visibility = [ ":tablegen" ]
+  visibility = [ ":MCTargetDesc" ]
   args = [ "-gen-instr-info" ]
   td_file = "../Lanai.td"
 }
@@ -19,37 +19,28 @@ tablegen("LanaiGenMCCodeEmitter") {
 }
 
 tablegen("LanaiGenRegisterInfo") {
-  visibility = [ ":tablegen" ]
+  visibility = [ ":MCTargetDesc" ]
   args = [ "-gen-register-info" ]
   td_file = "../Lanai.td"
 }
 
 tablegen("LanaiGenSubtargetInfo") {
-  visibility = [ ":tablegen" ]
+  visibility = [ ":MCTargetDesc" ]
   args = [ "-gen-subtarget" ]
   td_file = "../Lanai.td"
 }
 
-# This should contain tablegen targets generating .inc files included
-# by other targets. .inc files only used by .cpp files in this directory
-# should be in deps on the static_library instead.
-group("tablegen") {
-  visibility = [
-    ":MCTargetDesc",
-    "../TargetInfo",
-  ]
+static_library("MCTargetDesc") {
+  output_name = "LLVMLanaiDesc"
+
+  # This should contain tablegen targets generating .inc files included
+  # by other targets. .inc files only used by .cpp files in this directory
+  # should be in deps instead.
   public_deps = [
     ":LanaiGenInstrInfo",
     ":LanaiGenRegisterInfo",
     ":LanaiGenSubtargetInfo",
   ]
-}
-
-static_library("MCTargetDesc") {
-  output_name = "LLVMLanaiDesc"
-  public_deps = [
-    ":tablegen",
-  ]
   deps = [
     ":LanaiGenAsmWriter",
     ":LanaiGenMCCodeEmitter",

llvm/utils/gn/secondary/llvm/lib/Target/Lanai/TargetInfo/BUILD.gn

@@ -1,7 +1,6 @@
 static_library("TargetInfo") {
   output_name = "LLVMLanaiInfo"
   deps = [
-    "//llvm/lib/IR",
     "//llvm/lib/Support",
   ]
   include_dirs = [ ".." ]

llvm/utils/gn/secondary/llvm/lib/Target/PowerPC/MCTargetDesc/BUILD.gn

@@ -7,7 +7,7 @@ tablegen("PPCGenAsmWriter") {
 }
 
 tablegen("PPCGenInstrInfo") {
-  visibility = [ ":tablegen" ]
+  visibility = [ ":MCTargetDesc" ]
   args = [ "-gen-instr-info" ]
   td_file = "../PPC.td"
 }
@@ -19,38 +19,28 @@ tablegen("PPCGenMCCodeEmitter") {
 }
 
 tablegen("PPCGenRegisterInfo") {
-  visibility = [ ":tablegen" ]
+  visibility = [ ":MCTargetDesc" ]
   args = [ "-gen-register-info" ]
   td_file = "../PPC.td"
 }
 
 tablegen("PPCGenSubtargetInfo") {
-  visibility = [ ":tablegen" ]
+  visibility = [ ":MCTargetDesc" ]
   args = [ "-gen-subtarget" ]
   td_file = "../PPC.td"
 }
 
-# This should contain tablegen targets generating .inc files included
-# by other targets. .inc files only used by .cpp files in this directory
-# should be in deps on the static_library instead.
-group("tablegen") {
-  visibility = [
-    ":MCTargetDesc",
-    "../InstPrinter",
-    "../TargetInfo",
-  ]
+static_library("MCTargetDesc") {
+  output_name = "LLVMPowerPCDesc"
+
+  # This should contain tablegen targets generating .inc files included
+  # by other targets. .inc files only used by .cpp files in this directory
+  # should be in deps instead.
   public_deps = [
     ":PPCGenInstrInfo",
     ":PPCGenRegisterInfo",
     ":PPCGenSubtargetInfo",
   ]
-}
-
-static_library("MCTargetDesc") {
-  output_name = "LLVMPowerPCDesc"
-  public_deps = [
-    ":tablegen",
-  ]
   deps = [
     ":PPCGenAsmWriter",
     ":PPCGenMCCodeEmitter",

llvm/utils/gn/secondary/llvm/lib/Target/PowerPC/TargetInfo/BUILD.gn

@@ -2,10 +2,6 @@ static_library("TargetInfo") {
   output_name = "LLVMPowerPCInfo"
   deps = [
     "//llvm/lib/Support",
-
-    # MCTargetDesc depends on TargetInfo, so we can't depend on the full
-    # MCTargetDesc target here: it would form a cycle.
-    "//llvm/lib/Target/PowerPC/MCTargetDesc:tablegen",
   ]
   include_dirs = [ ".." ]
   sources = [

llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Utils/BUILD.gn

@@ -14,6 +14,9 @@ static_library("Utils") {
   deps = [
     "//llvm/lib/MC",
     "//llvm/lib/Support",
+
+    # MCTargetDesc depends on Utils, so we can't depend on the full
+    # MCTargetDesc target here: it would form a cycle.
     "//llvm/lib/Target/RISCV/MCTargetDesc:tablegen",
   ]
 

llvm/utils/gn/secondary/llvm/lib/Target/Sparc/MCTargetDesc/BUILD.gn

@@ -7,7 +7,7 @@ tablegen("SparcGenAsmWriter") {
 }
 
 tablegen("SparcGenInstrInfo") {
-  visibility = [ ":tablegen" ]
+  visibility = [ ":MCTargetDesc" ]
   args = [ "-gen-instr-info" ]
   td_file = "../Sparc.td"
 }
@@ -19,37 +19,28 @@ tablegen("SparcGenMCCodeEmitter") {
 }
 
 tablegen("SparcGenRegisterInfo") {
-  visibility = [ ":tablegen" ]
+  visibility = [ ":MCTargetDesc" ]
   args = [ "-gen-register-info" ]
   td_file = "../Sparc.td"
 }
 
 tablegen("SparcGenSubtargetInfo") {
-  visibility = [ ":tablegen" ]
+  visibility = [ ":MCTargetDesc" ]
   args = [ "-gen-subtarget" ]
   td_file = "../Sparc.td"
 }
 
-# This should contain tablegen targets generating .inc files included
-# by other targets. .inc files only used by .cpp files in this directory
-# should be in deps on the static_library instead.
-group("tablegen") {
-  visibility = [
-    ":MCTargetDesc",
-    "../TargetInfo",
-  ]
+static_library("MCTargetDesc") {
+  output_name = "LLVMSparcDesc"
+
+  # This should contain tablegen targets generating .inc files included
+  # by other targets. .inc files only used by .cpp files in this directory
+  # should be in deps instead.
   public_deps = [
     ":SparcGenInstrInfo",
     ":SparcGenRegisterInfo",
     ":SparcGenSubtargetInfo",
   ]
-}
-
-static_library("MCTargetDesc") {
-  output_name = "LLVMSparcDesc"
-  public_deps = [
-    ":tablegen",
-  ]
   deps = [
     ":SparcGenAsmWriter",
     ":SparcGenMCCodeEmitter",

llvm/utils/gn/secondary/llvm/lib/Target/Sparc/TargetInfo/BUILD.gn

@@ -1,9 +1,7 @@
 static_library("TargetInfo") {
   output_name = "LLVMSparcInfo"
   deps = [
-    "//llvm/lib/IR",
     "//llvm/lib/Support",
-    "//llvm/lib/Target/Sparc/MCTargetDesc",
   ]
   include_dirs = [ ".." ]
   sources = [

llvm/utils/gn/secondary/llvm/lib/Target/WebAssembly/MCTargetDesc/BUILD.gn

@@ -7,7 +7,7 @@ tablegen("WebAssemblyGenAsmWriter") {
 }
 
 tablegen("WebAssemblyGenInstrInfo") {
-  visibility = [ ":tablegen" ]
+  visibility = [ ":MCTargetDesc" ]
   args = [ "-gen-instr-info" ]
   td_file = "../WebAssembly.td"
 }
@@ -19,38 +19,28 @@ tablegen("WebAssemblyGenMCCodeEmitter") {
 }
 
 tablegen("WebAssemblyGenRegisterInfo") {
-  visibility = [ ":tablegen" ]
+  visibility = [ ":MCTargetDesc" ]
   args = [ "-gen-register-info" ]
   td_file = "../WebAssembly.td"
 }
 
 tablegen("WebAssemblyGenSubtargetInfo") {
-  visibility = [ ":tablegen" ]
+  visibility = [ ":MCTargetDesc" ]
   args = [ "-gen-subtarget" ]
   td_file = "../WebAssembly.td"
 }
 
-# This should contain tablegen targets generating .inc files included
-# by other targets. .inc files only used by .cpp files in this directory
-# should be in deps on the static_library instead.
-group("tablegen") {
-  visibility = [
-    ":MCTargetDesc",
-    "../InstPrinter",
-    "../TargetInfo",
-    "../Utils",
-  ]
+static_library("MCTargetDesc") {
+  output_name = "LLVMWebAssemblyDesc"
+
+  # This should contain tablegen targets generating .inc files included
+  # by other targets. .inc files only used by .cpp files in this directory
+  # should be in deps instead.
   public_deps = [
     ":WebAssemblyGenInstrInfo",
     ":WebAssemblyGenRegisterInfo",
     ":WebAssemblyGenSubtargetInfo",
   ]
-}
-static_library("MCTargetDesc") {
-  output_name = "LLVMWebAssemblyDesc"
-  public_deps = [
-    ":tablegen",
-  ]
   deps = [
     ":WebAssemblyGenAsmWriter",
     ":WebAssemblyGenMCCodeEmitter",

llvm/utils/gn/secondary/llvm/lib/Target/WebAssembly/TargetInfo/BUILD.gn

@@ -2,10 +2,6 @@ static_library("TargetInfo") {
   output_name = "LLVMWebAssemblyInfo"
   deps = [
     "//llvm/lib/Support",
-
-    # MCTargetDesc depends on TargetInfo, so we can't depend on the full
-    # MCTargetDesc target here: it would form a cycle.
-    "//llvm/lib/Target/WebAssembly/MCTargetDesc:tablegen",
   ]
   include_dirs = [ ".." ]
   sources = [

llvm/utils/gn/secondary/llvm/lib/Target/X86/MCTargetDesc/BUILD.gn

@@ -16,43 +16,34 @@ tablegen("X86GenAsmWriter1") {
 }
 
 tablegen("X86GenInstrInfo") {
-  visibility = [ ":tablegen" ]
+  visibility = [ ":MCTargetDesc" ]
   args = [ "-gen-instr-info" ]
   td_file = "../X86.td"
 }
 
 tablegen("X86GenRegisterInfo") {
-  visibility = [ ":tablegen" ]
+  visibility = [ ":MCTargetDesc" ]
   args = [ "-gen-register-info" ]
   td_file = "../X86.td"
 }
 
 tablegen("X86GenSubtargetInfo") {
-  visibility = [ ":tablegen" ]
+  visibility = [ ":MCTargetDesc" ]
   args = [ "-gen-subtarget" ]
   td_file = "../X86.td"
 }
 
-# This should contain tablegen targets generating .inc files included
-# by other targets. .inc files only used by .cpp files in this directory
-# should be in deps on the static_library instead.
-group("tablegen") {
-  visibility = [
-    ":MCTargetDesc",
-    "../TargetInfo",
-  ]
+static_library("MCTargetDesc") {
+  output_name = "LLVMX86Desc"
+
+  # This should contain tablegen targets generating .inc files included
+  # by other targets. .inc files only used by .cpp files in this directory
+  # should be in deps instead.
   public_deps = [
     ":X86GenInstrInfo",
     ":X86GenRegisterInfo",
     ":X86GenSubtargetInfo",
   ]
-}
-
-static_library("MCTargetDesc") {
-  output_name = "LLVMX86Desc"
-  public_deps = [
-    ":tablegen",
-  ]
   deps = [
     ":X86GenAsmWriter",
     ":X86GenAsmWriter1",

llvm/utils/gn/secondary/llvm/lib/Target/X86/TargetInfo/BUILD.gn

@@ -2,10 +2,6 @@ static_library("TargetInfo") {
   output_name = "LLVMX86Info"
   deps = [
     "//llvm/lib/Support",
-
-    # MCTargetDesc depends on TargetInfo, so we can't depend on the full
-    # MCTargetDesc target here: it would form a cycle.
-    "//llvm/lib/Target/X86/MCTargetDesc:tablegen",
   ]
   include_dirs = [ ".." ]
   sources = [