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[RISCV] Correct types in tablegen multiclasses found by D95874.

This commit is contained in:
Craig Topper 2021-02-05 11:55:11 -08:00
parent 526c0955c0
commit 3c767b96dc
1 changed files with 1 additions and 1 deletions
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llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
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@ -52,7 +52,7 @@ def SDTRVVVecReduce : SDTypeProfile<1, 2, [
foreach kind = ["ADD", "UMAX", "SMAX", "UMIN", "SMIN", "AND", "OR", "XOR"] in foreach kind = ["ADD", "UMAX", "SMAX", "UMIN", "SMIN", "AND", "OR", "XOR"] in
def rvv_vecreduce_#kind : SDNode<"RISCVISD::VECREDUCE_"#kind, SDTRVVVecReduce>; def rvv_vecreduce_#kind : SDNode<"RISCVISD::VECREDUCE_"#kind, SDTRVVVecReduce>;
multiclass VPatUSLoadStoreSDNode<LLVMType type, multiclass VPatUSLoadStoreSDNode<ValueType type,
int sew, int sew,
LMULInfo vlmul, LMULInfo vlmul,
OutPatFrag avl, OutPatFrag avl,