forked from OSchip/llvm-project
the code in question is now:
cmpw cr0, r7, r3
ble cr0, LBB1_5 ;bb25
LBB1_8: ;bb17
cmpw cr0, r8, r5
bgt cr0, LBB1_2 ;bb
which is just as good as crnand.
llvm-svn: 31235
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59085445e3
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4c0cc53da1
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@ -150,36 +150,6 @@ Probably not a win on x86.
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===-------------------------------------------------------------------------===
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PowerPC i1/setcc stuff (depends on subreg stuff):
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Check out the PPC code we get for 'compare' in this testcase:
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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19672
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oof. on top of not doing the logical crnand instead of (mfcr, mfcr,
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invert, invert, or), we then have to compare it against zero instead of
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using the value already in a CR!
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that should be something like
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cmpw cr7, r8, r5
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cmpw cr0, r7, r3
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crnand cr0, cr0, cr7
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bne cr0, LBB_compare_4
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instead of
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cmpw cr7, r8, r5
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cmpw cr0, r7, r3
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mfcr r7, 1
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mcrf cr7, cr0
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mfcr r8, 1
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rlwinm r7, r7, 30, 31, 31
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rlwinm r8, r8, 30, 31, 31
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xori r7, r7, 1
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xori r8, r8, 1
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addi r2, r2, 1
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or r7, r8, r7
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cmpwi cr0, r7, 0
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bne cr0, LBB_compare_4 ; loopexit
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FreeBench/mason has a basic block that looks like this:
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%tmp.130 = seteq int %p.0__, 5 ; <bool> [#uses=1]
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