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[AVX512] Pull pattern for subvector insert into the instruction definition 

No functional change intended.

Very similar to the change I made for subvector extract in r218480.

test/CodeGen/X86/avx512-insert-extract.ll covers this.

llvm-svn: 218928
This commit is contained in:
Adam Nemet 2014-10-02 23:18:30 +00:00
parent 4e2ef472d2
commit 4dca3ce4b0
1 changed files with 4 additions and 8 deletions
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12
llvm/lib/Target/X86/X86InstrAVX512.td
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@ -309,7 +309,10 @@ multiclass vinsert_for_size<int Opcode,
(ins VR512:$src1, From.RC:$src2, i8imm:$src3), (ins VR512:$src1, From.RC:$src2, i8imm:$src3),
"vinsert" # From.EltTypeName # "x4\t{$src3, $src2, $src1, $dst|" "vinsert" # From.EltTypeName # "x4\t{$src3, $src2, $src1, $dst|"
"$dst, $src1, $src2, $src3}", "$dst, $src1, $src2, $src3}",
[]>, EVEX_4V, EVEX_V512; [(set To.RC:$dst, (vinsert_insert:$src3 (To.VT VR512:$src1),
(From.VT From.RC:$src2),
(iPTR imm)))]>,
EVEX_4V, EVEX_V512;
let mayLoad = 1 in let mayLoad = 1 in
def rm : AVX512AIi8<Opcode, MRMSrcMem, (outs VR512:$dst), def rm : AVX512AIi8<Opcode, MRMSrcMem, (outs VR512:$dst),
@ -319,13 +322,6 @@ multiclass vinsert_for_size<int Opcode,
[]>, EVEX_4V, EVEX_V512, EVEX_CD8<From.EltSize, CD8VT4>; []>, EVEX_4V, EVEX_V512, EVEX_CD8<From.EltSize, CD8VT4>;
} }
// Codegen pattern, e.g. v4i32 -> v16i32 for vinserti32x4
def : Pat<(vinsert_insert:$ins
(To.VT VR512:$src1), (From.VT From.RC:$src2), (iPTR imm)),
(To.VT (!cast<Instruction>(NAME # From.EltSize # "x4rr")
VR512:$src1, From.RC:$src2,
(INSERT_get_vinsert_imm VR512:$ins)))>;
// Codegen pattern with the alternative types, e.g. v2i64 -> v8i64 for // Codegen pattern with the alternative types, e.g. v2i64 -> v8i64 for
// vinserti32x4 // vinserti32x4
def : Pat<(vinsert_insert:$ins def : Pat<(vinsert_insert:$ins