forked from OSchip/llvm-project
Disable trunc-store simplification on vectors.
llvm-svn: 132984
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@ -6425,7 +6425,7 @@ SDValue DAGCombiner::visitSTORE(SDNode *N) {
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// FIXME: is there such a thing as a truncating indexed store?
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if (ST->isTruncatingStore() && ST->isUnindexed() &&
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Value.getValueType().isInteger()) {
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Value.getValueType().isInteger() && !Value.getValueType().isVector()) {
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// See if we can simplify the input to this truncstore with knowledge that
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// only the low bits are being used. For example:
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// "truncstore (or (shl x, 8), y), i8" -> "truncstore y, i8"
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