forked from OSchip/llvm-project
Add comments about address word offset and the calculation of byte address select mask for WCR.
llvm-svn: 151305
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@ -2329,6 +2329,22 @@ DNBArchMachARM::EnableHardwareWatchpoint (nub_addr_t addr, nub_size_t size, bool
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// We can only watch up to four bytes that follow a 4 byte aligned address
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// per watchpoint register pair. Since we can only watch until the next 4
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// byte boundary, we need to make sure we can properly encode this.
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// addr_word_offset = addr % 4, i.e, is in set([0, 1, 2, 3])
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//
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// +---+---+---+---+
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// | 0 | 1 | 2 | 3 |
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// +---+---+---+---+
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// ^
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// |
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// word address (4-byte aligned) = addr & 0xFFFFFFFC => goes into WVR
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//
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// examples:
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// 1. addr_word_offset = 1, size = 1 to watch a uint_8 => byte_mask = (0b0001 << 1) = 0b0010
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// 2. addr_word_offset = 2, size = 2 to watch a uint_16 => byte_mask = (0b0011 << 2) = 0b1100
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//
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// where byte_mask goes into WCR[8:5]
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uint32_t addr_word_offset = addr % 4;
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DNBLogThreadedIf(LOG_WATCHPOINTS, "DNBArchMachARM::EnableHardwareWatchpoint() - addr_word_offset = 0x%8.8x", addr_word_offset);
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@ -2348,10 +2364,10 @@ DNBArchMachARM::EnableHardwareWatchpoint (nub_addr_t addr, nub_size_t size, bool
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for (i=0; i<num_hw_watchpoints; ++i)
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{
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if ((m_state.dbg.__wcr[i] & WCR_ENABLE) == 0)
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break; // We found an available hw breakpoint slot (in i)
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break; // We found an available hw watchpoint slot (in i)
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}
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// See if we found an available hw breakpoint slot above
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// See if we found an available hw watchpoint slot above
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if (i < num_hw_watchpoints)
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{
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// Make the byte_mask into a valid Byte Address Select mask
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