forked from OSchip/llvm-project
parent
a58a3f930a
commit
6bce6bbf40
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@ -52,6 +52,10 @@ namespace {
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return "MSP430 DAG->DAG Pattern Instruction Selection";
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return "MSP430 DAG->DAG Pattern Instruction Selection";
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}
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}
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virtual bool
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SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode,
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std::vector<SDValue> &OutOps);
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// Include the pieces autogenerated from the target description.
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// Include the pieces autogenerated from the target description.
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#include "MSP430GenDAGISel.inc"
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#include "MSP430GenDAGISel.inc"
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@ -122,6 +126,22 @@ bool MSP430DAGToDAGISel::SelectAddr(SDValue Op, SDValue Addr,
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}
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}
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bool MSP430DAGToDAGISel::
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SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode,
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std::vector<SDValue> &OutOps) {
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SDValue Op0, Op1;
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switch (ConstraintCode) {
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default: return true;
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case 'm': // memory
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if (!SelectAddr(Op, Op, Op0, Op1))
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return true;
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break;
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}
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OutOps.push_back(Op0);
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OutOps.push_back(Op1);
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return false;
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}
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/// InstructionSelect - This callback is invoked by
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/// InstructionSelect - This callback is invoked by
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/// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
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/// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
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@ -1,16 +1,25 @@
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; RUN: llc < %s
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; RUN: llc < %s
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; PR4778
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target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
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target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
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target triple = "msp430-generic-generic"
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target triple = "msp430-generic-generic"
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define signext i8 @__nesc_atomic_start() nounwind {
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define void @imm() nounwind {
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entry:
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call void asm sideeffect "bic\09$0,r2", "i"(i16 32) nounwind
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%0 = tail call i16 asm sideeffect "mov r2, $0", "=r"() nounwind ; <i16> [#uses=1]
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ret void
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%1 = trunc i16 %0 to i8 ; <i8> [#uses=1]
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}
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%and3 = lshr i8 %1, 3 ; <i8> [#uses=1]
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%conv1 = and i8 %and3, 1 ; <i8> [#uses=1]
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define void @reg(i16 %a) nounwind {
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tail call void asm sideeffect "dint", ""() nounwind
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call void asm sideeffect "bic\09$0,r2", "r"(i16 %a) nounwind
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tail call void asm sideeffect "nop", ""() nounwind
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ret void
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tail call void asm sideeffect "", "~{memory}"() nounwind
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}
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ret i8 %conv1
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@foo = global i16 0, align 2
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define void @immmem() nounwind {
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call void asm sideeffect "bic\09$0,r2", "i"(i16* getelementptr(i16* @foo, i32 1)) nounwind
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ret void
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}
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define void @mem() nounwind {
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call void asm sideeffect "bic\09$0,r2", "m"(i16* @foo) nounwind
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ret void
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}
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}
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