forked from OSchip/llvm-project
Set the destination register field based on the target specific flags
llvm-svn: 4442
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@ -12,8 +12,11 @@
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// descriptors
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// descriptors
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//
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//
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static const MachineInstrDescriptor X86Insts[] = {
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static const MachineInstrDescriptor X86Insts[] = {
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#define I(ENUM, NAME, FLAGS, TSFLAGS) \
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#define I(ENUM, NAME, FLAGS, TSFLAGS) \
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{ NAME, -1, -1, 0, false, 0, 0, TSFLAGS, FLAGS },
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{ NAME, \
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-1, /* Always vararg */ \
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((TSFLAGS) & X86II::Void) ? -1 : 0, /* Result is in 0 */ \
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0, false, 0, 0, TSFLAGS, FLAGS, TSFLAGS },
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#include "X86InstrInfo.def"
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#include "X86InstrInfo.def"
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};
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};
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@ -5,6 +5,10 @@
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// specified below, and is used to make all of the information relevant to an
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// specified below, and is used to make all of the information relevant to an
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// instruction be in one place.
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// instruction be in one place.
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//
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//
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// Note that X86 Instructions always have the destination register listed as
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// operand 0, unless it does not produce a value (in which case the TSFlags will
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// include X86II::Void).
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// NOTE: No include guards desired
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// NOTE: No include guards desired
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