forked from OSchip/llvm-project
Use SubRegIndex in SystemZ.
Anton, please review the change to SystemZAsmPrinter.cpp. It could be a bug. llvm-svn: 104515
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@ -124,9 +124,9 @@ void SystemZAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
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unsigned Reg = MO.getReg();
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unsigned Reg = MO.getReg();
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if (Modifier && strncmp(Modifier, "subreg", 6) == 0) {
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if (Modifier && strncmp(Modifier, "subreg", 6) == 0) {
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if (strncmp(Modifier + 7, "even", 4) == 0)
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if (strncmp(Modifier + 7, "even", 4) == 0)
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Reg = TM.getRegisterInfo()->getSubReg(Reg, SystemZ::SUBREG_EVEN);
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Reg = TM.getRegisterInfo()->getSubReg(Reg, SystemZ::subreg_even32);
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else if (strncmp(Modifier + 7, "odd", 3) == 0)
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else if (strncmp(Modifier + 7, "odd", 3) == 0)
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Reg = TM.getRegisterInfo()->getSubReg(Reg, SystemZ::SUBREG_ODD);
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Reg = TM.getRegisterInfo()->getSubReg(Reg, SystemZ::subreg_odd32);
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else
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else
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assert(0 && "Invalid subreg modifier");
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assert(0 && "Invalid subreg modifier");
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}
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}
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@ -1,4 +1,4 @@
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//===- SystemZRegisterInfo.h - SystemZ Register Information Impl ----*- C++ -*-===//
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//===-- SystemZRegisterInfo.h - SystemZ Register Information ----*- C++ -*-===//
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//
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//
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// The LLVM Compiler Infrastructure
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// The LLVM Compiler Infrastructure
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//
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//
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@ -19,15 +19,6 @@
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namespace llvm {
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namespace llvm {
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namespace SystemZ {
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/// SubregIndex - The index of various sized subregister classes. Note that
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/// these indices must be kept in sync with the class indices in the
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/// SystemZRegisterInfo.td file.
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enum SubregIndex {
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SUBREG_32BIT = 1, SUBREG_EVEN = 1, SUBREG_ODD = 2
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};
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}
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class SystemZSubtarget;
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class SystemZSubtarget;
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class SystemZInstrInfo;
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class SystemZInstrInfo;
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class Type;
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class Type;
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@ -145,11 +145,13 @@ def F15L : FPRL<15, "f15", [F15S]>, DwarfRegNum<[31]>;
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// Status register
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// Status register
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def PSW : SystemZReg<"psw">;
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def PSW : SystemZReg<"psw">;
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def subreg_32bit : PatLeaf<(i32 1)>;
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let Namespace = "SystemZ" in {
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def subreg_even32 : PatLeaf<(i32 1)>;
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def subreg_32bit : SubRegIndex { let NumberHack = 1; }
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def subreg_odd32 : PatLeaf<(i32 2)>;
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def subreg_even32 : SubRegIndex { let NumberHack = 1; }
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def subreg_even : PatLeaf<(i32 3)>;
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def subreg_odd32 : SubRegIndex { let NumberHack = 2; }
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def subreg_odd : PatLeaf<(i32 4)>;
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def subreg_even : SubRegIndex { let NumberHack = 3; }
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def subreg_odd : SubRegIndex { let NumberHack = 4; }
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}
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def : SubRegSet<1, [R0D, R1D, R2D, R3D, R4D, R5D, R6D, R7D,
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def : SubRegSet<1, [R0D, R1D, R2D, R3D, R4D, R5D, R6D, R7D,
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R8D, R9D, R10D, R11D, R12D, R13D, R14D, R15D],
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R8D, R9D, R10D, R11D, R12D, R13D, R14D, R15D],
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