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Rename function to be more specific and be more strict about its usage 

llvm-svn: 135725
This commit is contained in:
Bruno Cardoso Lopes 2011-07-22 00:14:53 +00:00
parent 44860314d2
commit 95d037721b
1 changed files with 9 additions and 6 deletions
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15
llvm/lib/Target/X86/X86ISelLowering.cpp
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@ -5376,15 +5376,17 @@ static SDValue getVZextMovL(EVT VT, EVT OpVT,
OpVT, SrcOp))); OpVT, SrcOp)));
} }
/// LowerVECTOR_SHUFFLE_4wide - Handle all 4 wide cases with a number of /// LowerVECTOR_SHUFFLE_128v4 - Handle all 128-bit wide vectors with
/// shuffles. /// 4 elements, and match them with several different shuffle types.
static SDValue static SDValue
LowerVECTOR_SHUFFLE_4wide(ShuffleVectorSDNode *SVOp, SelectionDAG &DAG) { LowerVECTOR_SHUFFLE_128v4(ShuffleVectorSDNode *SVOp, SelectionDAG &DAG) {
SDValue V1 = SVOp->getOperand(0); SDValue V1 = SVOp->getOperand(0);
SDValue V2 = SVOp->getOperand(1); SDValue V2 = SVOp->getOperand(1);
DebugLoc dl = SVOp->getDebugLoc(); DebugLoc dl = SVOp->getDebugLoc();
EVT VT = SVOp->getValueType(0); EVT VT = SVOp->getValueType(0);
assert(VT.getSizeInBits() == 128 && "Unsupported vector size");
SmallVector<std::pair<int, int>, 8> Locs; SmallVector<std::pair<int, int>, 8> Locs;
Locs.resize(4); Locs.resize(4);
SmallVector<int, 8> Mask1(4U, -1); SmallVector<int, 8> Mask1(4U, -1);
@ -6094,9 +6096,10 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const {
return NewOp; return NewOp;
} }
// Handle all 4 wide cases with a number of shuffles. // Handle all 128-bit wide vectors with 4 elements, and match them with
if (NumElems == 4) // several different shuffle types.
return LowerVECTOR_SHUFFLE_4wide(SVOp, DAG); if (NumElems == 4 && VT.getSizeInBits() == 128)
return LowerVECTOR_SHUFFLE_128v4(SVOp, DAG);
// Handle VPERMIL permutations // Handle VPERMIL permutations
if (isVPERMILMask(M, VT)) { if (isVPERMILMask(M, VT)) {