forked from OSchip/llvm-project
				
			fix minsize detection: minsize attribute implies optimizing for size
llvm-svn: 244458
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					@ -5188,9 +5188,7 @@ static SDValue LowerVectorBroadcast(SDValue Op, const X86Subtarget* Subtarget,
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  // TODO: If multiple splats are generated to load the same constant,
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					  // TODO: If multiple splats are generated to load the same constant,
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  // it may be detrimental to overall size. There needs to be a way to detect
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					  // it may be detrimental to overall size. There needs to be a way to detect
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  // that condition to know if this is truly a size win.
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					  // that condition to know if this is truly a size win.
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  const Function *F = DAG.getMachineFunction().getFunction();
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					  bool OptForSize = DAG.getMachineFunction().getFunction()->optForSize();
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  // FIXME: Use Function::optForSize().
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  bool OptForSize = F->hasFnAttribute(Attribute::OptimizeForSize);
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  // Handle broadcasting a single constant scalar from the constant pool
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					  // Handle broadcasting a single constant scalar from the constant pool
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  // into a vector.
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					  // into a vector.
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					@ -14,7 +14,7 @@ define <2 x double> @splat_v2f64(<2 x double> %x) #0 {
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; CHECK-NEXT: retq
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					; CHECK-NEXT: retq
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}
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					}
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define <4 x double> @splat_v4f64(<4 x double> %x) #0 {
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					define <4 x double> @splat_v4f64(<4 x double> %x) #1 {
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  %add = fadd <4 x double> %x, <double 1.0, double 1.0, double 1.0, double 1.0>
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					  %add = fadd <4 x double> %x, <double 1.0, double 1.0, double 1.0, double 1.0>
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  ret <4 x double> %add
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					  ret <4 x double> %add
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; CHECK-LABEL: splat_v4f64
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					; CHECK-LABEL: splat_v4f64
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					@ -32,7 +32,7 @@ define <4 x float> @splat_v4f32(<4 x float> %x) #0 {
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; CHECK-NEXT: retq
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					; CHECK-NEXT: retq
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}
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					}
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define <8 x float> @splat_v8f32(<8 x float> %x) #0 {
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					define <8 x float> @splat_v8f32(<8 x float> %x) #1 {
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  %add = fadd <8 x float> %x, <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>
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					  %add = fadd <8 x float> %x, <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>
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  ret <8 x float> %add
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					  ret <8 x float> %add
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; CHECK-LABEL: splat_v8f32
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					; CHECK-LABEL: splat_v8f32
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					@ -67,7 +67,7 @@ define <4 x i64> @splat_v4i64(<4 x i64> %x) #0 {
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}
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					}
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; AVX can't do integer splats, so fake it: use vbroadcastss to splat 32-bit value.
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					; AVX can't do integer splats, so fake it: use vbroadcastss to splat 32-bit value.
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define <4 x i32> @splat_v4i32(<4 x i32> %x) #0 {
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					define <4 x i32> @splat_v4i32(<4 x i32> %x) #1 {
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  %add = add <4 x i32> %x, <i32 1, i32 1, i32 1, i32 1>
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					  %add = add <4 x i32> %x, <i32 1, i32 1, i32 1, i32 1>
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  ret <4 x i32> %add
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					  ret <4 x i32> %add
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; CHECK-LABEL: splat_v4i32
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					; CHECK-LABEL: splat_v4i32
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					@ -91,7 +91,7 @@ define <8 x i32> @splat_v8i32(<8 x i32> %x) #0 {
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}
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					}
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; AVX can't do integer splats, and there's no broadcast fakery for 16-bit. Could use pshuflw, etc?
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					; AVX can't do integer splats, and there's no broadcast fakery for 16-bit. Could use pshuflw, etc?
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define <8 x i16> @splat_v8i16(<8 x i16> %x) #0 {
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					define <8 x i16> @splat_v8i16(<8 x i16> %x) #1 {
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  %add = add <8 x i16> %x, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
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					  %add = add <8 x i16> %x, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
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  ret <8 x i16> %add
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					  ret <8 x i16> %add
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; CHECK-LABEL: splat_v8i16
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					; CHECK-LABEL: splat_v8i16
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					@ -115,7 +115,7 @@ define <16 x i16> @splat_v16i16(<16 x i16> %x) #0 {
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}
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					}
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; AVX can't do integer splats, and there's no broadcast fakery for 8-bit. Could use pshufb, etc?
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					; AVX can't do integer splats, and there's no broadcast fakery for 8-bit. Could use pshufb, etc?
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define <16 x i8> @splat_v16i8(<16 x i8> %x) #0 {
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					define <16 x i8> @splat_v16i8(<16 x i8> %x) #1 {
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  %add = add <16 x i8> %x, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
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					  %add = add <16 x i8> %x, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
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  ret <16 x i8> %add
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					  ret <16 x i8> %add
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; CHECK-LABEL: splat_v16i8
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					; CHECK-LABEL: splat_v16i8
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					@ -144,7 +144,7 @@ define <32 x i8> @splat_v32i8(<32 x i8> %x) #0 {
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@A = common global <3 x i64> zeroinitializer, align 32
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					@A = common global <3 x i64> zeroinitializer, align 32
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define <8 x i64> @pr23259() #0 {
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					define <8 x i64> @pr23259() #1 {
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entry:
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					entry:
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  %0 = load <4 x i64>, <4 x i64>* bitcast (<3 x i64>* @A to <4 x i64>*), align 32
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					  %0 = load <4 x i64>, <4 x i64>* bitcast (<3 x i64>* @A to <4 x i64>*), align 32
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  %1 = shufflevector <4 x i64> %0, <4 x i64> undef, <3 x i32> <i32 undef, i32 undef, i32 2>
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					  %1 = shufflevector <4 x i64> %0, <4 x i64> undef, <3 x i32> <i32 undef, i32 undef, i32 2>
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					@ -153,3 +153,4 @@ entry:
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}
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					}
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attributes #0 = { optsize }
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					attributes #0 = { optsize }
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					attributes #1 = { minsize }
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