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[AArch64][SVE] Asm: Support for WHILE(LE|LO|LS|LT) instructions. 

The WHILE instructions generate a predicate that is true while the 
comparison of the first scalar operand (incremented for each predicate
element) with the second scalar operand is true and false thereafter.

  WHILELE  While incrementing signed scalar less than or equal to scalar
  WHILELO  While incrementing unsigned scalar lower than scalar
  WHILELS  While incrementing unsigned scalar lower than or same as scalar
  WHILELT  While incrementing signed scalar less than scalar

e.g.

  whilele  p0.s, x0, x1

  generates predicate p0 (for 32bit elements) by incrementing
  (signed) x0 and comparing that vector to splat(x1).

llvm-svn: 338211
This commit is contained in:
Sander de Smalen 2018-07-29 08:51:08 +00:00
parent e70ed3187c
commit ad88a99956
10 changed files with 397 additions and 0 deletions
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10
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
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@ -751,6 +751,16 @@ let Predicates = [HasSVE] in {
defm FCMEQ_PPzZ0 : sve_fp_2op_p_pd<0b100, "fcmeq">;
defm FCMNE_PPzZ0 : sve_fp_2op_p_pd<0b110, "fcmne">;
defm WHILELT_PWW : sve_int_while4_rr<0b010, "whilelt">;
defm WHILELE_PWW : sve_int_while4_rr<0b011, "whilele">;
defm WHILELO_PWW : sve_int_while4_rr<0b110, "whilelo">;
defm WHILELS_PWW : sve_int_while4_rr<0b111, "whilels">;
defm WHILELT_PXX : sve_int_while8_rr<0b010, "whilelt">;
defm WHILELE_PXX : sve_int_while8_rr<0b011, "whilele">;
defm WHILELO_PXX : sve_int_while8_rr<0b110, "whilelo">;
defm WHILELS_PXX : sve_int_while8_rr<0b111, "whilels">;
def CTERMEQ_WW : sve_int_cterm<0b0, 0b0, "ctermeq", GPR32>;
def CTERMNE_WW : sve_int_cterm<0b0, 0b1, "ctermne", GPR32>;
def CTERMEQ_XX : sve_int_cterm<0b1, 0b0, "ctermeq", GPR64>;

35
llvm/lib/Target/AArch64/SVEInstrFormats.td
View File

@ -2178,6 +2178,41 @@ class sve_int_cterm<bit sz, bit opc, string asm, RegisterClass rt>
let Defs = [NZCV];
}
class sve_int_while_rr<bits<2> sz8_64, bits<4> opc, string asm,
RegisterClass gprty, PPRRegOp pprty>
: I<(outs pprty:$Pd), (ins gprty:$Rn, gprty:$Rm),
asm, "\t$Pd, $Rn, $Rm",
"", []>, Sched<[]> {
bits<4> Pd;
bits<5> Rm;
bits<5> Rn;
let Inst{31-24} = 0b00100101;
let Inst{23-22} = sz8_64;
let Inst{21} = 0b1;
let Inst{20-16} = Rm;
let Inst{15-13} = 0b000;
let Inst{12-10} = opc{3-1};
let Inst{9-5} = Rn;
let Inst{4} = opc{0};
let Inst{3-0} = Pd;
let Defs = [NZCV];
}
multiclass sve_int_while4_rr<bits<3> opc, string asm> {
def _B : sve_int_while_rr<0b00, { 0, opc }, asm, GPR32, PPR8>;
def _H : sve_int_while_rr<0b01, { 0, opc }, asm, GPR32, PPR16>;
def _S : sve_int_while_rr<0b10, { 0, opc }, asm, GPR32, PPR32>;
def _D : sve_int_while_rr<0b11, { 0, opc }, asm, GPR32, PPR64>;
}
multiclass sve_int_while8_rr<bits<3> opc, string asm> {
def _B : sve_int_while_rr<0b00, { 1, opc }, asm, GPR64, PPR8>;
def _H : sve_int_while_rr<0b01, { 1, opc }, asm, GPR64, PPR16>;
def _S : sve_int_while_rr<0b10, { 1, opc }, asm, GPR64, PPR32>;
def _D : sve_int_while_rr<0b11, { 1, opc }, asm, GPR64, PPR64>;
}
//===----------------------------------------------------------------------===//
// SVE Floating Point Fast Reduction Group

20
llvm/test/MC/AArch64/SVE/whilele-diagnostics.s Normal file
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@ -0,0 +1,20 @@
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
// ------------------------------------------------------------------------- //
// Invalid scalar registers
whilele p15.b, xzr, sp
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilele p15.b, xzr, sp
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
whilele p15.b, xzr, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilele p15.b, xzr, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
whilele p15.b, w0, x0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilele p15.b, w0, x0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

68
llvm/test/MC/AArch64/SVE/whilele.s Normal file
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@ -0,0 +1,68 @@
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
whilele p15.b, xzr, x0
// CHECK-INST: whilele p15.b, xzr, x0
// CHECK-ENCODING: [0xff,0x17,0x20,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 17 20 25 <unknown>
whilele p15.b, x0, xzr
// CHECK-INST: whilele p15.b, x0, xzr
// CHECK-ENCODING: [0x1f,0x14,0x3f,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 1f 14 3f 25 <unknown>
whilele p15.b, wzr, w0
// CHECK-INST: whilele p15.b, wzr, w0
// CHECK-ENCODING: [0xff,0x07,0x20,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 07 20 25 <unknown>
whilele p15.b, w0, wzr
// CHECK-INST: whilele p15.b, w0, wzr
// CHECK-ENCODING: [0x1f,0x04,0x3f,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 1f 04 3f 25 <unknown>
whilele p15.h, x0, xzr
// CHECK-INST: whilele p15.h, x0, xzr
// CHECK-ENCODING: [0x1f,0x14,0x7f,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 1f 14 7f 25 <unknown>
whilele p15.h, w0, wzr
// CHECK-INST: whilele p15.h, w0, wzr
// CHECK-ENCODING: [0x1f,0x04,0x7f,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 1f 04 7f 25 <unknown>
whilele p15.s, x0, xzr
// CHECK-INST: whilele p15.s, x0, xzr
// CHECK-ENCODING: [0x1f,0x14,0xbf,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 1f 14 bf 25 <unknown>
whilele p15.s, w0, wzr
// CHECK-INST: whilele p15.s, w0, wzr
// CHECK-ENCODING: [0x1f,0x04,0xbf,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 1f 04 bf 25 <unknown>
whilele p15.d, w0, wzr
// CHECK-INST: whilele p15.d, w0, wzr
// CHECK-ENCODING: [0x1f,0x04,0xff,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 1f 04 ff 25 <unknown>
whilele p15.d, x0, xzr
// CHECK-INST: whilele p15.d, x0, xzr
// CHECK-ENCODING: [0x1f,0x14,0xff,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 1f 14 ff 25 <unknown>

20
llvm/test/MC/AArch64/SVE/whilelo-diagnostics.s Normal file
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@ -0,0 +1,20 @@
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
// ------------------------------------------------------------------------- //
// Invalid scalar registers
whilelo p15.b, xzr, sp
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilelo p15.b, xzr, sp
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
whilelo p15.b, xzr, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilelo p15.b, xzr, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
whilelo p15.b, w0, x0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilelo p15.b, w0, x0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

68
llvm/test/MC/AArch64/SVE/whilelo.s Normal file
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@ -0,0 +1,68 @@
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
whilelo p15.b, xzr, x0
// CHECK-INST: whilelo p15.b, xzr, x0
// CHECK-ENCODING: [0xef,0x1f,0x20,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ef 1f 20 25 <unknown>
whilelo p15.b, x0, xzr
// CHECK-INST: whilelo p15.b, x0, xzr
// CHECK-ENCODING: [0x0f,0x1c,0x3f,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 0f 1c 3f 25 <unknown>
whilelo p15.b, wzr, w0
// CHECK-INST: whilelo p15.b, wzr, w0
// CHECK-ENCODING: [0xef,0x0f,0x20,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ef 0f 20 25 <unknown>
whilelo p15.b, w0, wzr
// CHECK-INST: whilelo p15.b, w0, wzr
// CHECK-ENCODING: [0x0f,0x0c,0x3f,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 0f 0c 3f 25 <unknown>
whilelo p15.h, x0, xzr
// CHECK-INST: whilelo p15.h, x0, xzr
// CHECK-ENCODING: [0x0f,0x1c,0x7f,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 0f 1c 7f 25 <unknown>
whilelo p15.h, w0, wzr
// CHECK-INST: whilelo p15.h, w0, wzr
// CHECK-ENCODING: [0x0f,0x0c,0x7f,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 0f 0c 7f 25 <unknown>
whilelo p15.s, x0, xzr
// CHECK-INST: whilelo p15.s, x0, xzr
// CHECK-ENCODING: [0x0f,0x1c,0xbf,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 0f 1c bf 25 <unknown>
whilelo p15.s, w0, wzr
// CHECK-INST: whilelo p15.s, w0, wzr
// CHECK-ENCODING: [0x0f,0x0c,0xbf,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 0f 0c bf 25 <unknown>
whilelo p15.d, w0, wzr
// CHECK-INST: whilelo p15.d, w0, wzr
// CHECK-ENCODING: [0x0f,0x0c,0xff,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 0f 0c ff 25 <unknown>
whilelo p15.d, x0, xzr
// CHECK-INST: whilelo p15.d, x0, xzr
// CHECK-ENCODING: [0x0f,0x1c,0xff,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 0f 1c ff 25 <unknown>

20
llvm/test/MC/AArch64/SVE/whilels-diagnostics.s Normal file
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@ -0,0 +1,20 @@
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
// ------------------------------------------------------------------------- //
// Invalid scalar registers
whilels p15.b, xzr, sp
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilels p15.b, xzr, sp
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
whilels p15.b, xzr, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilels p15.b, xzr, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
whilels p15.b, w0, x0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilels p15.b, w0, x0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

68
llvm/test/MC/AArch64/SVE/whilels.s Normal file
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@ -0,0 +1,68 @@
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
whilels p15.b, xzr, x0
// CHECK-INST: whilels p15.b, xzr, x0
// CHECK-ENCODING: [0xff,0x1f,0x20,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 1f 20 25 <unknown>
whilels p15.b, x0, xzr
// CHECK-INST: whilels p15.b, x0, xzr
// CHECK-ENCODING: [0x1f,0x1c,0x3f,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 1f 1c 3f 25 <unknown>
whilels p15.b, wzr, w0
// CHECK-INST: whilels p15.b, wzr, w0
// CHECK-ENCODING: [0xff,0x0f,0x20,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 0f 20 25 <unknown>
whilels p15.b, w0, wzr
// CHECK-INST: whilels p15.b, w0, wzr
// CHECK-ENCODING: [0x1f,0x0c,0x3f,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 1f 0c 3f 25 <unknown>
whilels p15.h, x0, xzr
// CHECK-INST: whilels p15.h, x0, xzr
// CHECK-ENCODING: [0x1f,0x1c,0x7f,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 1f 1c 7f 25 <unknown>
whilels p15.h, w0, wzr
// CHECK-INST: whilels p15.h, w0, wzr
// CHECK-ENCODING: [0x1f,0x0c,0x7f,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 1f 0c 7f 25 <unknown>
whilels p15.s, x0, xzr
// CHECK-INST: whilels p15.s, x0, xzr
// CHECK-ENCODING: [0x1f,0x1c,0xbf,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 1f 1c bf 25 <unknown>
whilels p15.s, w0, wzr
// CHECK-INST: whilels p15.s, w0, wzr
// CHECK-ENCODING: [0x1f,0x0c,0xbf,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 1f 0c bf 25 <unknown>
whilels p15.d, w0, wzr
// CHECK-INST: whilels p15.d, w0, wzr
// CHECK-ENCODING: [0x1f,0x0c,0xff,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 1f 0c ff 25 <unknown>
whilels p15.d, x0, xzr
// CHECK-INST: whilels p15.d, x0, xzr
// CHECK-ENCODING: [0x1f,0x1c,0xff,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 1f 1c ff 25 <unknown>

20
llvm/test/MC/AArch64/SVE/whilelt-diagnostics.s Normal file
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@ -0,0 +1,20 @@
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
// ------------------------------------------------------------------------- //
// Invalid scalar registers
whilelt p15.b, xzr, sp
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilelt p15.b, xzr, sp
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
whilelt p15.b, xzr, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilelt p15.b, xzr, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
whilelt p15.b, w0, x0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilelt p15.b, w0, x0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

68
llvm/test/MC/AArch64/SVE/whilelt.s Normal file
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@ -0,0 +1,68 @@
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
whilelt p15.b, xzr, x0
// CHECK-INST: whilelt p15.b, xzr, x0
// CHECK-ENCODING: [0xef,0x17,0x20,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ef 17 20 25 <unknown>
whilelt p15.b, x0, xzr
// CHECK-INST: whilelt p15.b, x0, xzr
// CHECK-ENCODING: [0x0f,0x14,0x3f,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 0f 14 3f 25 <unknown>
whilelt p15.b, wzr, w0
// CHECK-INST: whilelt p15.b, wzr, w0
// CHECK-ENCODING: [0xef,0x07,0x20,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ef 07 20 25 <unknown>
whilelt p15.b, w0, wzr
// CHECK-INST: whilelt p15.b, w0, wzr
// CHECK-ENCODING: [0x0f,0x04,0x3f,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 0f 04 3f 25 <unknown>
whilelt p15.h, x0, xzr
// CHECK-INST: whilelt p15.h, x0, xzr
// CHECK-ENCODING: [0x0f,0x14,0x7f,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 0f 14 7f 25 <unknown>
whilelt p15.h, w0, wzr
// CHECK-INST: whilelt p15.h, w0, wzr
// CHECK-ENCODING: [0x0f,0x04,0x7f,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 0f 04 7f 25 <unknown>
whilelt p15.s, x0, xzr
// CHECK-INST: whilelt p15.s, x0, xzr
// CHECK-ENCODING: [0x0f,0x14,0xbf,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 0f 14 bf 25 <unknown>
whilelt p15.s, w0, wzr
// CHECK-INST: whilelt p15.s, w0, wzr
// CHECK-ENCODING: [0x0f,0x04,0xbf,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 0f 04 bf 25 <unknown>
whilelt p15.d, w0, wzr
// CHECK-INST: whilelt p15.d, w0, wzr
// CHECK-ENCODING: [0x0f,0x04,0xff,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 0f 04 ff 25 <unknown>
whilelt p15.d, x0, xzr
// CHECK-INST: whilelt p15.d, x0, xzr
// CHECK-ENCODING: [0x0f,0x14,0xff,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 0f 14 ff 25 <unknown>