forked from OSchip/llvm-project
ELF: Handle R_ARM_V4BX correctly in PIC output files.
Previously we considered R_ARM_V4BX to be an absolute relocation, which meant that we rejected it in read-only sections in PIC output files. Instead, treat it as a hint relocation so that relocation processing ignores it entirely. Also fix a problem with the test case where it was never being run because it has a .yaml extension and we don't run tests with that extension. Differential Revision: https://reviews.llvm.org/D55728 llvm-svn: 349216
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@ -134,6 +134,12 @@ RelExpr ARM::getRelExpr(RelType Type, const Symbol &S,
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return R_NONE;
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case R_ARM_TLS_LE32:
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return R_TLS;
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case R_ARM_V4BX:
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// V4BX is just a marker to indicate there's a "bx rN" instruction at the
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// given address. It can be used to implement a special linker mode which
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// rewrites ARMv4T inputs to ARMv4. Since we support only ARMv4 input and
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// not ARMv4 output, we can just ignore it.
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return R_HINT;
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default:
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return R_ABS;
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}
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@ -514,12 +520,6 @@ void ARM::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
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((Val << 4) & 0x7000) | // imm3
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(Val & 0x00ff)); // imm8
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break;
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case R_ARM_V4BX:
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// V4BX is just a marker to indicate there's a "bx rN" instruction at the
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// given address. It can be used to implement a special linker mode which
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// rewrites ARMv4T inputs to ARMv4. Since we support only ARMv4 input and
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// not ARMv4 output, we can just ignore it.
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break;
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default:
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error(getErrorLocation(Loc) + "unrecognized reloc " + Twine(Type));
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}
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@ -2,6 +2,8 @@
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# RUN: yaml2obj %s -o %t.o
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# RUN: ld.lld %t.o -o %t
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# RUN: llvm-readelf -sections %t | FileCheck %s
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# RUN: ld.lld -shared %t.o -o %t
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# RUN: llvm-readelf -sections %t | FileCheck %s
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# CHECK: .text
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